Lines Matching refs:AMDGPU
36 (isGFX10Plus() ? AMDGPU::EncValues::SGPR_MAX_GFX10 \
37 : AMDGPU::EncValues::SGPR_MAX_SI)
48 if (!STI.getFeatureBits()[AMDGPU::FeatureGCN3Encoding] && !isGFX10Plus()) in AMDGPUDisassembler()
62 int OpIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), NameIdx); in insertNamedMCOperand()
276 unsigned Sub = MRI->getSubReg(Op.getReg(), AMDGPU::sub0); in IsAGPROperand()
278 return Reg >= AMDGPU::AGPR0 && Reg <= AMDGPU::AGPR255; in IsAGPROperand()
296 uint16_t DataNameIdx = (TSFlags & SIInstrFlags::DS) ? AMDGPU::OpName::data0 in decodeOperand_AVLdSt_Any()
297 : AMDGPU::OpName::vdata; in decodeOperand_AVLdSt_Any()
299 int DataIdx = AMDGPU::getNamedOperandIdx(Opc, DataNameIdx); in decodeOperand_AVLdSt_Any()
301 int DstIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::vdst); in decodeOperand_AVLdSt_Any()
307 int Data2Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::data1); in decodeOperand_AVLdSt_Any()
405 using namespace llvm::AMDGPU::DPP; in isValidDPP8()
406 int FiIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::fi); in isValidDPP8()
434 if (STI.getFeatureBits()[AMDGPU::FeatureGFX10_BEncoding]) { in getInstruction()
437 if (AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::dpp8) in getInstruction()
464 if (STI.getFeatureBits()[AMDGPU::FeatureUnpackedD16VMem]) { in getInstruction()
473 if (STI.getFeatureBits()[AMDGPU::FeatureFmaMixInsts]) { in getInstruction()
495 if (STI.getFeatureBits()[AMDGPU::FeatureGFX90AInsts]) { in getInstruction()
501 if (STI.getFeatureBits()[AMDGPU::FeatureGFX10_BEncoding]) { in getInstruction()
512 if (STI.getFeatureBits()[AMDGPU::FeatureGFX90AInsts]) { in getInstruction()
530 if (Res && (MI.getOpcode() == AMDGPU::V_MAC_F32_e64_vi || in getInstruction()
531 MI.getOpcode() == AMDGPU::V_MAC_F32_e64_gfx6_gfx7 || in getInstruction()
532 MI.getOpcode() == AMDGPU::V_MAC_F32_e64_gfx10 || in getInstruction()
533 MI.getOpcode() == AMDGPU::V_MAC_LEGACY_F32_e64_gfx6_gfx7 || in getInstruction()
534 MI.getOpcode() == AMDGPU::V_MAC_LEGACY_F32_e64_gfx10 || in getInstruction()
535 MI.getOpcode() == AMDGPU::V_MAC_F16_e64_vi || in getInstruction()
536 MI.getOpcode() == AMDGPU::V_FMAC_F64_e64_gfx90a || in getInstruction()
537 MI.getOpcode() == AMDGPU::V_FMAC_F32_e64_vi || in getInstruction()
538 MI.getOpcode() == AMDGPU::V_FMAC_F32_e64_gfx10 || in getInstruction()
539 MI.getOpcode() == AMDGPU::V_FMAC_LEGACY_F32_e64_gfx10 || in getInstruction()
540 MI.getOpcode() == AMDGPU::V_FMAC_F16_e64_gfx10)) { in getInstruction()
543 AMDGPU::OpName::src2_modifiers); in getInstruction()
548 int CPolPos = AMDGPU::getNamedOperandIdx(MI.getOpcode(), in getInstruction()
549 AMDGPU::OpName::cpol); in getInstruction()
553 AMDGPU::CPol::GLC : 0; in getInstruction()
556 AMDGPU::OpName::cpol); in getInstruction()
565 (STI.getFeatureBits()[AMDGPU::FeatureGFX90AInsts])) { in getInstruction()
568 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::tfe); in getInstruction()
579 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::swz); in getInstruction()
589 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vaddr0); in getInstruction()
591 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::srsrc); in getInstruction()
613 int VDstIn_Idx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), in getInstruction()
614 AMDGPU::OpName::vdst_in); in getInstruction()
625 AMDGPU::OpName::vdst_in); in getInstruction()
637 if (STI.getFeatureBits()[AMDGPU::FeatureGFX9] || in convertSDWAInst()
638 STI.getFeatureBits()[AMDGPU::FeatureGFX10]) { in convertSDWAInst()
639 if (AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::sdst) != -1) in convertSDWAInst()
641 insertNamedMCOperand(MI, MCOperand::createImm(0), AMDGPU::OpName::clamp); in convertSDWAInst()
642 } else if (STI.getFeatureBits()[AMDGPU::FeatureVolcanicIslands]) { in convertSDWAInst()
643 int SDst = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::sdst); in convertSDWAInst()
646 insertNamedMCOperand(MI, createRegOperand(AMDGPU::VCC), in convertSDWAInst()
647 AMDGPU::OpName::sdst); in convertSDWAInst()
650 insertNamedMCOperand(MI, MCOperand::createImm(0), AMDGPU::OpName::omod); in convertSDWAInst()
664 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0_modifiers) != -1) in convertDPP8Inst()
666 AMDGPU::OpName::src0_modifiers); in convertDPP8Inst()
669 AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src1_modifiers) != -1) in convertDPP8Inst()
671 AMDGPU::OpName::src1_modifiers); in convertDPP8Inst()
681 int VDstIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), in convertMIMGInst()
682 AMDGPU::OpName::vdst); in convertMIMGInst()
684 int VDataIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), in convertMIMGInst()
685 AMDGPU::OpName::vdata); in convertMIMGInst()
687 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vaddr0); in convertMIMGInst()
688 int DMaskIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), in convertMIMGInst()
689 AMDGPU::OpName::dmask); in convertMIMGInst()
691 int TFEIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), in convertMIMGInst()
692 AMDGPU::OpName::tfe); in convertMIMGInst()
693 int D16Idx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), in convertMIMGInst()
694 AMDGPU::OpName::d16); in convertMIMGInst()
698 if (AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::a16) > -1) { in convertMIMGInst()
699 assert(MI.getOpcode() == AMDGPU::IMAGE_BVH_INTERSECT_RAY_a16_sa || in convertMIMGInst()
700 MI.getOpcode() == AMDGPU::IMAGE_BVH_INTERSECT_RAY_a16_nsa || in convertMIMGInst()
701 MI.getOpcode() == AMDGPU::IMAGE_BVH64_INTERSECT_RAY_a16_sa || in convertMIMGInst()
702 MI.getOpcode() == AMDGPU::IMAGE_BVH64_INTERSECT_RAY_a16_nsa); in convertMIMGInst()
708 const AMDGPU::MIMGInfo *Info = AMDGPU::getMIMGInfo(MI.getOpcode()); in convertMIMGInst()
715 if (STI.getFeatureBits()[AMDGPU::FeatureGFX10]) { in convertMIMGInst()
717 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::dim); in convertMIMGInst()
719 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::a16); in convertMIMGInst()
720 const AMDGPU::MIMGBaseOpcodeInfo *BaseOpcode = in convertMIMGInst()
721 AMDGPU::getMIMGBaseOpcodeInfo(Info->BaseOpcode); in convertMIMGInst()
722 const AMDGPU::MIMGDimInfo *Dim = in convertMIMGInst()
723 AMDGPU::getMIMGDimInfoByEncoding(MI.getOperand(DimIdx).getImm()); in convertMIMGInst()
727 AMDGPU::getAddrSizeMIMGOp(BaseOpcode, Dim, IsA16, AMDGPU::hasG16(STI)); in convertMIMGInst()
729 IsNSA = Info->MIMGEncoding == AMDGPU::MIMGEncGfx10NSA; in convertMIMGInst()
746 if (D16 && AMDGPU::hasPackedD16(STI)) { in convertMIMGInst()
757 AMDGPU::getMIMGOpcode(Info->BaseOpcode, Info->MIMGEncoding, DstSize, AddrSize); in convertMIMGInst()
762 unsigned NewVdata = AMDGPU::NoRegister; in convertMIMGInst()
768 unsigned VdataSub0 = MRI.getSubReg(Vdata0, AMDGPU::sub0); in convertMIMGInst()
771 NewVdata = MRI.getMatchingSuperReg(Vdata0, AMDGPU::sub0, in convertMIMGInst()
773 if (NewVdata == AMDGPU::NoRegister) { in convertMIMGInst()
780 unsigned NewVAddr0 = AMDGPU::NoRegister; in convertMIMGInst()
781 if (STI.getFeatureBits()[AMDGPU::FeatureGFX10] && !IsNSA && in convertMIMGInst()
784 unsigned VAddrSub0 = MRI.getSubReg(VAddr0, AMDGPU::sub0); in convertMIMGInst()
788 NewVAddr0 = MRI.getMatchingSuperReg(VAddr0, AMDGPU::sub0, in convertMIMGInst()
790 if (NewVAddr0 == AMDGPU::NoRegister) in convertMIMGInst()
796 if (NewVdata != AMDGPU::NoRegister) { in convertMIMGInst()
805 if (NewVAddr0 != AMDGPU::NoRegister) { in convertMIMGInst()
833 return MCOperand::createReg(AMDGPU::getMCReg(RegId, STI)); in createRegOperand()
853 case AMDGPU::SGPR_32RegClassID: in createSRegOperand()
854 case AMDGPU::TTMP_32RegClassID: in createSRegOperand()
856 case AMDGPU::SGPR_64RegClassID: in createSRegOperand()
857 case AMDGPU::TTMP_64RegClassID: in createSRegOperand()
860 case AMDGPU::SGPR_128RegClassID: in createSRegOperand()
861 case AMDGPU::TTMP_128RegClassID: in createSRegOperand()
864 case AMDGPU::SGPR_256RegClassID: in createSRegOperand()
865 case AMDGPU::TTMP_256RegClassID: in createSRegOperand()
868 case AMDGPU::SGPR_512RegClassID: in createSRegOperand()
869 case AMDGPU::TTMP_512RegClassID: in createSRegOperand()
916 return createRegOperand(AMDGPU::VGPR_32RegClassID, Val); in decodeOperand_VGPR_32()
924 return createRegOperand(AMDGPU::AGPR_32RegClassID, Val & 255); in decodeOperand_AGPR_32()
928 return createRegOperand(AMDGPU::AReg_64RegClassID, Val & 255); in decodeOperand_AReg_64()
932 return createRegOperand(AMDGPU::AReg_128RegClassID, Val & 255); in decodeOperand_AReg_128()
936 return createRegOperand(AMDGPU::AReg_256RegClassID, Val & 255); in decodeOperand_AReg_256()
940 return createRegOperand(AMDGPU::AReg_512RegClassID, Val & 255); in decodeOperand_AReg_512()
944 return createRegOperand(AMDGPU::AReg_1024RegClassID, Val & 255); in decodeOperand_AReg_1024()
956 return createRegOperand(AMDGPU::VReg_64RegClassID, Val); in decodeOperand_VReg_64()
960 return createRegOperand(AMDGPU::VReg_96RegClassID, Val); in decodeOperand_VReg_96()
964 return createRegOperand(AMDGPU::VReg_128RegClassID, Val); in decodeOperand_VReg_128()
968 return createRegOperand(AMDGPU::VReg_256RegClassID, Val); in decodeOperand_VReg_256()
972 return createRegOperand(AMDGPU::VReg_512RegClassID, Val); in decodeOperand_VReg_512()
976 return createRegOperand(AMDGPU::VReg_1024RegClassID, Val); in decodeOperand_VReg_1024()
1041 using namespace AMDGPU::EncValues; in decodeIntImmed()
1126 assert(Imm >= AMDGPU::EncValues::INLINE_FLOATING_C_MIN in decodeFPImmed()
1127 && Imm <= AMDGPU::EncValues::INLINE_FLOATING_C_MAX); in decodeFPImmed()
1149 using namespace AMDGPU; in getVgprClassId()
1170 using namespace AMDGPU; in getAgprClassId()
1192 using namespace AMDGPU; in getSgprClassId()
1212 using namespace AMDGPU; in getTtmpClassId()
1230 using namespace AMDGPU::EncValues; in getTTmpIdx()
1239 using namespace AMDGPU::EncValues; in decodeSrcOp()
1284 using namespace AMDGPU::EncValues; in decodeDstOp()
1304 using namespace AMDGPU; in decodeSpecialReg32()
1336 using namespace AMDGPU; in decodeSpecialReg64()
1361 using namespace AMDGPU::SDWA; in decodeSDWASrc()
1362 using namespace AMDGPU::EncValues; in decodeSDWASrc()
1364 if (STI.getFeatureBits()[AMDGPU::FeatureGFX9] || in decodeSDWASrc()
1365 STI.getFeatureBits()[AMDGPU::FeatureGFX10]) { in decodeSDWASrc()
1394 } else if (STI.getFeatureBits()[AMDGPU::FeatureVolcanicIslands]) { in decodeSDWASrc()
1409 using namespace AMDGPU::SDWA; in decodeSDWAVopcDst()
1411 assert((STI.getFeatureBits()[AMDGPU::FeatureGFX9] || in decodeSDWAVopcDst()
1412 STI.getFeatureBits()[AMDGPU::FeatureGFX10]) && in decodeSDWAVopcDst()
1415 bool IsWave64 = STI.getFeatureBits()[AMDGPU::FeatureWavefrontSize64]; in decodeSDWAVopcDst()
1431 return createRegOperand(IsWave64 ? AMDGPU::VCC : AMDGPU::VCC_LO); in decodeSDWAVopcDst()
1436 return STI.getFeatureBits()[AMDGPU::FeatureWavefrontSize64] ? in decodeBoolReg()
1441 return STI.getFeatureBits()[AMDGPU::FeatureVolcanicIslands]; in isVI()
1444 bool AMDGPUDisassembler::isGFX9() const { return AMDGPU::isGFX9(STI); } in isGFX9()
1447 return STI.getFeatureBits()[AMDGPU::FeatureGFX90AInsts]; in isGFX90A()
1450 bool AMDGPUDisassembler::isGFX9Plus() const { return AMDGPU::isGFX9Plus(STI); } in isGFX9Plus()
1452 bool AMDGPUDisassembler::isGFX10() const { return AMDGPU::isGFX10(STI); } in isGFX10()
1455 return AMDGPU::isGFX10Plus(STI); in isGFX10Plus()
1459 return STI.getFeatureBits()[AMDGPU::FeatureArchitectedFlatScratch]; in hasArchitectedFlatScratch()
1487 AMDGPU::IsaInfo::getVGPREncodingGranule(&STI); in decodeCOMPUTE_PGM_RSRC1()
1518 AMDGPU::IsaInfo::getSGPREncodingGranule(&STI); in decodeCOMPUTE_PGM_RSRC1()