250     return isRegClass(RCID) || isInlinableImm(type) || isLiteralImm(type);  in isRegOrImmWithInputMods()
278     return isRegClass(AMDGPU::VGPR_32RegClassID) ||  in isVReg()
279            isRegClass(AMDGPU::VReg_64RegClassID) ||  in isVReg()
280            isRegClass(AMDGPU::VReg_96RegClassID) ||  in isVReg()
281            isRegClass(AMDGPU::VReg_128RegClassID) ||  in isVReg()
282            isRegClass(AMDGPU::VReg_160RegClassID) ||  in isVReg()
283            isRegClass(AMDGPU::VReg_192RegClassID) ||  in isVReg()
284            isRegClass(AMDGPU::VReg_256RegClassID) ||  in isVReg()
285            isRegClass(AMDGPU::VReg_512RegClassID) ||  in isVReg()
286            isRegClass(AMDGPU::VReg_1024RegClassID);  in isVReg()
290     return isRegClass(AMDGPU::VGPR_32RegClassID);  in isVReg32()
370   bool isRegClass(unsigned RCID) const;
375     return (isRegClass(RCID) || isInlinableImm(type)) && !hasModifiers();  in isRegOrInlineNoMods()
1898 bool AMDGPUOperand::isRegClass(unsigned RCID) const {  in isRegClass()  function in AMDGPUOperand
1903   return isRegClass(AMDGPU::VGPR_32RegClassID) ||  in isVRegWithInputMods()
1905          (isRegClass(AMDGPU::VReg_64RegClassID) &&  in isVRegWithInputMods()
1913     return isRegClass(AMDGPU::VS_32RegClassID) || isInlinableImm(type);  in isSDWAOperand()