Lines Matching refs:TokError

4448     return TokError("invalid major version");  in ParseDirectiveMajorMinor()
4451 return TokError("minor version number required, comma expected"); in ParseDirectiveMajorMinor()
4454 return TokError("invalid minor version"); in ParseDirectiveMajorMinor()
4461 return TokError("directive only supported for amdgcn architecture"); in ParseDirectiveAMDGCNTarget()
4525 return TokError("directive only supported for amdgcn architecture"); in ParseDirectiveAMDHSAKernel()
4528 return TokError("directive only supported for amdhsa OS"); in ParseDirectiveAMDHSAKernel()
4562 return TokError(".amdhsa_ directives cannot be repeated"); in ParseDirectiveAMDHSAKernel()
4800 return TokError(".amdhsa_next_free_vgpr directive is required"); in ParseDirectiveAMDHSAKernel()
4803 return TokError(".amdhsa_next_free_sgpr directive is required"); in ParseDirectiveAMDHSAKernel()
4828 return TokError("too many user SGPRs enabled"); in ParseDirectiveAMDHSAKernel()
4834 return TokError(".amdhsa_accum_offset directive is required"); in ParseDirectiveAMDHSAKernel()
4836 return TokError("accum_offset should be in range [4..256] in " in ParseDirectiveAMDHSAKernel()
4839 return TokError("accum_offset exceeds total VGPR allocation"); in ParseDirectiveAMDHSAKernel()
4882 return TokError("stepping version number required, comma expected"); in ParseDirectiveHSACodeObjectISA()
4885 return TokError("invalid stepping version"); in ParseDirectiveHSACodeObjectISA()
4888 return TokError("vendor name required, comma expected"); in ParseDirectiveHSACodeObjectISA()
4894 return TokError("arch name required, comma expected"); in ParseDirectiveHSACodeObjectISA()
4916 return TokError(Err.str()); in ParseAMDKernelCodeTValue()
4923 return TokError("enable_wavefront_size32=1 is only allowed on GFX10+"); in ParseAMDKernelCodeTValue()
4925 return TokError("enable_wavefront_size32=1 requires +WavefrontSize32"); in ParseAMDKernelCodeTValue()
4928 return TokError("enable_wavefront_size32=0 requires +WavefrontSize64"); in ParseAMDKernelCodeTValue()
4935 return TokError("wavefront_size=5 is only allowed on GFX10+"); in ParseAMDKernelCodeTValue()
4937 return TokError("wavefront_size=5 requires +WavefrontSize32"); in ParseAMDKernelCodeTValue()
4940 return TokError("wavefront_size=6 requires +WavefrontSize64"); in ParseAMDKernelCodeTValue()
4947 return TokError("enable_wgp_mode=1 is only allowed on GFX10+"); in ParseAMDKernelCodeTValue()
4953 return TokError("enable_mem_ordered=1 is only allowed on GFX10+"); in ParseAMDKernelCodeTValue()
4959 return TokError("enable_fwd_progress=1 is only allowed on GFX10+"); in ParseAMDKernelCodeTValue()
5082 return TokError(Twine("expected directive ") + in ParseToEndDirective()
5116 return TokError(Twine("invalid value in ") + in ParseDirectivePALMetadata()
5120 return TokError(Twine("expected an even number of values in ") + in ParseDirectivePALMetadata()
5124 return TokError(Twine("invalid value in ") + in ParseDirectivePALMetadata()
5143 return TokError("expected identifier in directive"); in ParseDirectiveAMDGPULDS()