Lines Matching refs:MRI
100 MachineRegisterInfo &MRI; member in __anon4b888c320111::ApplyRegBankMapping
107 : RBI(RBI_), MRI(MRI_), NewBank(RB) {} in ApplyRegBankMapping()
124 const RegisterBank *SrcBank = RBI.getRegBank(SrcReg, MRI, *RBI.TRI); in applyBank()
127 assert(MRI.getType(SrcReg) == LLT::scalar(1)); in applyBank()
128 assert(MRI.getType(DstReg) == S32); in applyBank()
137 MRI.setRegBank(True.getReg(0), *NewBank); in applyBank()
138 MRI.setRegBank(False.getReg(0), *NewBank); in applyBank()
142 assert(!MRI.getRegClassOrRegBank(DstReg)); in applyBank()
143 MRI.setRegBank(DstReg, *NewBank); in applyBank()
150 const RegisterBank *DstBank = RBI.getRegBank(DstReg, MRI, *RBI.TRI); in applyBank()
161 if (Reg.isPhysical() || MRI.getRegClassOrRegBank(Reg)) in applyBank()
165 if (MRI.getType(Reg) == LLT::scalar(1)) { in applyBank()
174 MRI.setRegBank(Reg, *RB); in applyBank()
299 const MachineInstr &MI, const MachineRegisterInfo &MRI, in addMappingFromTable() argument
310 Sizes[I] = getSizeInBits(Reg, MRI, *TRI); in addMappingFromTable()
314 unsigned SizeI = getSizeInBits(MI.getOperand(I).getReg(), MRI, *TRI); in addMappingFromTable()
336 const MachineInstr &MI, const MachineRegisterInfo &MRI) const { in getInstrAlternativeMappingsIntrinsic()
348 return addMappingFromTable<3>(MI, MRI, RegSrcOpIdx, makeArrayRef(Table)); in getInstrAlternativeMappingsIntrinsic()
367 return addMappingFromTable<4>(MI, MRI, RegSrcOpIdx, makeArrayRef(Table)); in getInstrAlternativeMappingsIntrinsic()
376 const MachineInstr &MI, const MachineRegisterInfo &MRI) const { in getInstrAlternativeMappingsIntrinsicWSideEffects()
396 return addMappingFromTable<2>(MI, MRI, RegSrcOpIdx, makeArrayRef(Table)); in getInstrAlternativeMappingsIntrinsicWSideEffects()
410 return addMappingFromTable<3>(MI, MRI, RegSrcOpIdx, makeArrayRef(Table)); in getInstrAlternativeMappingsIntrinsicWSideEffects()
424 return addMappingFromTable<1>(MI, MRI, RegSrcOpIdx, makeArrayRef(Table)); in getInstrAlternativeMappingsIntrinsicWSideEffects()
463 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrAlternativeMappings() local
469 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrAlternativeMappings()
477 return addMappingFromTable<1>(MI, MRI, {{ 0 }}, Table); in getInstrAlternativeMappings()
490 return addMappingFromTable<1>(MI, MRI, {{ 0 }}, Table); in getInstrAlternativeMappings()
495 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrAlternativeMappings()
540 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrAlternativeMappings()
541 LLT PtrTy = MRI.getType(MI.getOperand(1).getReg()); in getInstrAlternativeMappings()
574 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrAlternativeMappings()
597 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrAlternativeMappings()
619 assert(MRI.getType(MI.getOperand(0).getReg()).getSizeInBits() == 1); in getInstrAlternativeMappings()
636 return getInstrAlternativeMappingsIntrinsic(MI, MRI); in getInstrAlternativeMappings()
638 return getInstrAlternativeMappingsIntrinsicWSideEffects(MI, MRI); in getInstrAlternativeMappings()
651 MachineRegisterInfo *MRI = B.getMRI(); in split64BitValueForMapping() local
652 Register LoLHS = MRI->createGenericVirtualRegister(HalfTy); in split64BitValueForMapping()
653 Register HiLHS = MRI->createGenericVirtualRegister(HalfTy); in split64BitValueForMapping()
654 const RegisterBank *Bank = getRegBank(Reg, *MRI, *TRI); in split64BitValueForMapping()
655 MRI->setRegBank(LoLHS, *Bank); in split64BitValueForMapping()
656 MRI->setRegBank(HiLHS, *Bank); in split64BitValueForMapping()
668 static void setRegsToType(MachineRegisterInfo &MRI, ArrayRef<Register> Regs, in setRegsToType() argument
671 assert(MRI.getType(Reg).getSizeInBits() == NewTy.getSizeInBits()); in setRegsToType()
672 MRI.setType(Reg, NewTy); in setRegsToType()
709 MachineRegisterInfo &MRI) const { in executeInWaterfallLoop()
739 if (MRI.use_nodbg_empty(Def.getReg())) in executeInWaterfallLoop()
742 LLT ResTy = MRI.getType(Def.getReg()); in executeInWaterfallLoop()
743 const RegisterBank *DefBank = getRegBank(Def.getReg(), MRI, *TRI); in executeInWaterfallLoop()
746 Register PhiReg = MRI.createGenericVirtualRegister(ResTy); in executeInWaterfallLoop()
749 MRI.setRegBank(PhiReg, *DefBank); in executeInWaterfallLoop()
750 MRI.setRegBank(InitReg, *DefBank); in executeInWaterfallLoop()
754 Register SaveExecReg = MRI.createVirtualRegister(WaveRC); in executeInWaterfallLoop()
755 Register InitSaveExecReg = MRI.createVirtualRegister(WaveRC); in executeInWaterfallLoop()
761 Register PhiExec = MRI.createVirtualRegister(WaveRC); in executeInWaterfallLoop()
762 Register NewExec = MRI.createVirtualRegister(WaveRC); in executeInWaterfallLoop()
840 LLT OpTy = MRI.getType(OpReg); in executeInWaterfallLoop()
842 const RegisterBank *OpBank = getRegBank(OpReg, MRI, *TRI); in executeInWaterfallLoop()
847 MRI.setRegBank(OpReg, AMDGPU::VGPRRegBank); in executeInWaterfallLoop()
857 = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass); in executeInWaterfallLoop()
858 MRI.setType(CurrentLaneOpReg, OpTy); in executeInWaterfallLoop()
860 constrainGenericRegister(OpReg, AMDGPU::VGPR_32RegClass, MRI); in executeInWaterfallLoop()
866 Register NewCondReg = MRI.createVirtualRegister(WaveRC); in executeInWaterfallLoop()
879 Register AndReg = MRI.createVirtualRegister(WaveRC); in executeInWaterfallLoop()
916 Register CurrentLaneOpRegLo = MRI.createGenericVirtualRegister(S32); in executeInWaterfallLoop()
917 Register CurrentLaneOpRegHi = MRI.createGenericVirtualRegister(S32); in executeInWaterfallLoop()
919 MRI.setRegClass(UnmergePiece, &AMDGPU::VReg_64RegClass); in executeInWaterfallLoop()
920 MRI.setRegClass(CurrentLaneOpRegLo, &AMDGPU::SReg_32_XM0RegClass); in executeInWaterfallLoop()
921 MRI.setRegClass(CurrentLaneOpRegHi, &AMDGPU::SReg_32_XM0RegClass); in executeInWaterfallLoop()
938 MRI.setRegClass(CurrentLaneOpReg, &AMDGPU::SReg_64_XEXECRegClass); in executeInWaterfallLoop()
950 CurrentLaneOpReg = MRI.createGenericVirtualRegister(S32); in executeInWaterfallLoop()
951 MRI.setRegClass(UnmergePiece, &AMDGPU::VGPR_32RegClass); in executeInWaterfallLoop()
952 MRI.setRegClass(CurrentLaneOpReg, &AMDGPU::SReg_32_XM0RegClass); in executeInWaterfallLoop()
961 Register NewCondReg = MRI.createVirtualRegister(WaveRC); in executeInWaterfallLoop()
972 Register AndReg = MRI.createVirtualRegister(WaveRC); in executeInWaterfallLoop()
993 MRI.setRegBank(Op.getReg(), AMDGPU::SGPRRegBank); in executeInWaterfallLoop()
1008 MRI.setSimpleHint(NewExec, CondReg); in executeInWaterfallLoop()
1046 MachineRegisterInfo &MRI, ArrayRef<unsigned> OpIndices) const { in collectWaterfallOperands() argument
1050 const RegisterBank *OpBank = getRegBank(Reg, MRI, *TRI); in collectWaterfallOperands()
1060 MachineIRBuilder &B, MachineInstr &MI, MachineRegisterInfo &MRI, in executeInWaterfallLoop() argument
1066 if (!collectWaterfallOperands(SGPROperandRegs, MI, MRI, OpIndices)) in executeInWaterfallLoop()
1071 SGPROperandRegs, MRI); in executeInWaterfallLoop()
1075 MachineInstr &MI, MachineRegisterInfo &MRI, in executeInWaterfallLoop() argument
1078 return executeInWaterfallLoop(B, MI, MRI, OpIndices); in executeInWaterfallLoop()
1083 MachineInstr &MI, MachineRegisterInfo &MRI, unsigned OpIdx) const { in constrainOpWithReadfirstlane() argument
1085 const RegisterBank *Bank = getRegBank(Reg, MRI, *TRI); in constrainOpWithReadfirstlane()
1089 LLT Ty = MRI.getType(Reg); in constrainOpWithReadfirstlane()
1095 MRI.setRegBank(Reg, AMDGPU::VGPRRegBank); in constrainOpWithReadfirstlane()
1098 Register SGPR = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass); in constrainOpWithReadfirstlane()
1103 MRI.setType(SGPR, Ty); in constrainOpWithReadfirstlane()
1106 constrainGenericRegister(Reg, AMDGPU::VGPR_32RegClass, MRI); in constrainOpWithReadfirstlane()
1142 MachineRegisterInfo &MRI) const { in applyMappingLoad()
1144 const LLT LoadTy = MRI.getType(DstReg); in applyMappingLoad()
1168 ApplyRegBankMapping O(*this, MRI, &AMDGPU::SGPRRegBank); in applyMappingLoad()
1224 LLT PtrTy = MRI.getType(MI.getOperand(1).getReg()); in applyMappingLoad()
1225 MRI.setType(BasePtrReg, PtrTy); in applyMappingLoad()
1229 ApplyRegBankMapping Observer(*this, MRI, &AMDGPU::VGPRRegBank); in applyMappingLoad()
1241 MRI.setRegBank(DstReg, AMDGPU::VGPRRegBank); in applyMappingLoad()
1248 MachineRegisterInfo &MRI) const { in applyMappingDynStackAlloc()
1262 const RegisterBank *SizeBank = getRegBank(AllocSize, MRI, *TRI); in applyMappingDynStackAlloc()
1268 LLT PtrTy = MRI.getType(Dst); in applyMappingDynStackAlloc()
1273 ApplyRegBankMapping ApplyBank(*this, MRI, &AMDGPU::SGPRRegBank); in applyMappingDynStackAlloc()
1294 MachineRegisterInfo &MRI, int RsrcIdx) const { in applyMappingImage() argument
1315 executeInWaterfallLoop(MI, MRI, SGPRIndexes); in applyMappingImage()
1319 static Register getSrcRegIgnoringCopies(const MachineRegisterInfo &MRI, in getSrcRegIgnoringCopies() argument
1321 MachineInstr *Def = getDefIgnoringCopies(Reg, MRI); in getSrcRegIgnoringCopies()
1337 MachineRegisterInfo *MRI = B.getMRI(); in setBufferOffsets() local
1339 if (Optional<int64_t> Imm = getConstantVRegSExtVal(CombinedOffset, *MRI)) { in setBufferOffsets()
1357 AMDGPU::getBaseWithConstantOffset(*MRI, CombinedOffset); in setBufferOffsets()
1362 if (RBI.getRegBank(Base, *MRI, *RBI.TRI) == &AMDGPU::VGPRRegBank) { in setBufferOffsets()
1381 MachineInstr *Add = getOpcodeDef(AMDGPU::G_ADD, CombinedOffset, *MRI); in setBufferOffsets()
1383 Register Src0 = getSrcRegIgnoringCopies(*MRI, Add->getOperand(1).getReg()); in setBufferOffsets()
1384 Register Src1 = getSrcRegIgnoringCopies(*MRI, Add->getOperand(2).getReg()); in setBufferOffsets()
1386 const RegisterBank *Src0Bank = RBI.getRegBank(Src0, *MRI, *RBI.TRI); in setBufferOffsets()
1387 const RegisterBank *Src1Bank = RBI.getRegBank(Src1, *MRI, *RBI.TRI); in setBufferOffsets()
1404 if (RBI.getRegBank(CombinedOffset, *MRI, *RBI.TRI) == &AMDGPU::VGPRRegBank) { in setBufferOffsets()
1419 MachineRegisterInfo &MRI = OpdMapper.getMRI(); in applyMappingSBufferLoad() local
1423 LLT Ty = MRI.getType(Dst); in applyMappingSBufferLoad()
1485 LoadParts[i] = MRI.createGenericVirtualRegister(Ty); in applyMappingSBufferLoad()
1486 MRI.setRegBank(LoadParts[i], AMDGPU::VGPRRegBank); in applyMappingSBufferLoad()
1518 OpsToWaterfall, MRI); in applyMappingSBufferLoad()
1538 MachineRegisterInfo &MRI = OpdMapper.getMRI(); in applyMappingBFE() local
1544 LLT Ty = MRI.getType(DstReg); in applyMappingBFE()
1561 ApplyRegBankMapping ApplyBank(*this, MRI, &AMDGPU::VGPRRegBank); in applyMappingBFE()
1572 if (auto ConstWidth = getConstantVRegValWithLookThrough(WidthReg, MRI)) { in applyMappingBFE()
1614 ApplyRegBankMapping ApplyBank(*this, MRI, &AMDGPU::SGPRRegBank); in applyMappingBFE()
1697 MachineRegisterInfo &MRI, in handleD16VData() argument
1703 LLT StoreVT = MRI.getType(Reg); in handleD16VData()
1721 getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg) { in getBaseWithConstantOffset() argument
1723 if (mi_match(Reg, MRI, m_ICst(Const))) in getBaseWithConstantOffset()
1727 if (mi_match(Reg, MRI, m_GAdd(m_Reg(Base), m_ICst(Const)))) in getBaseWithConstantOffset()
1778 static bool isZero(Register Reg, MachineRegisterInfo &MRI) { in isZero() argument
1780 return mi_match(Reg, MRI, m_ICst(C)) && C == 0; in isZero()
1795 MachineRegisterInfo &MRI = *B.getMRI(); in selectStoreIntrinsic() local
1796 executeInWaterfallLoop(B, MI, MRI, {2, 4}); in selectStoreIntrinsic()
1801 LLT Ty = MRI.getType(VData); in selectStoreIntrinsic()
1822 const bool Offen = !isZero(VOffset, MRI); in selectStoreIntrinsic()
1871 MachineRegisterInfo &MRI = *B.getMRI(); in buildVCopy() local
1872 LLT SrcTy = MRI.getType(SrcReg); in buildVCopy()
1878 return constrainGenericRegister(DstReg, AMDGPU::VGPR_32RegClass, MRI) && in buildVCopy()
1879 constrainGenericRegister(SrcReg, AMDGPU::SReg_32RegClass, MRI); in buildVCopy()
1882 Register TmpReg0 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in buildVCopy()
1883 Register TmpReg1 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass); in buildVCopy()
1898 return constrainGenericRegister(SrcReg, AMDGPU::SReg_64RegClass, MRI) && in buildVCopy()
1899 constrainGenericRegister(DstReg, AMDGPU::VReg_64RegClass, MRI); in buildVCopy()
1908 MachineRegisterInfo &MRI = *B.getMRI(); in reinsertVectorIndexAdd() local
1916 MRI.setRegBank(MaterializedOffset.getReg(0), AMDGPU::SGPRRegBank); in reinsertVectorIndexAdd()
1917 MRI.setRegBank(Add.getReg(0), AMDGPU::SGPRRegBank); in reinsertVectorIndexAdd()
1950 MachineInstr &MI, MachineRegisterInfo &MRI, in foldExtractEltToCmpSelect() argument
1961 LLT VecTy = MRI.getType(VecReg); in foldExtractEltToCmpSelect()
1986 MRI.setRegBank(Idx, AMDGPU::VGPRRegBank); in foldExtractEltToCmpSelect()
1995 EltTy = MRI.getType(DstRegs[0]); in foldExtractEltToCmpSelect()
2004 MRI.setRegBank(IC->getOperand(0).getReg(), AMDGPU::SGPRRegBank); in foldExtractEltToCmpSelect()
2006 MRI.setRegBank(Cmp->getOperand(0).getReg(), CCBank); in foldExtractEltToCmpSelect()
2013 MRI.setRegBank(S->getOperand(N).getReg(), DstBank); in foldExtractEltToCmpSelect()
2022 MRI.setRegBank(DstReg, DstBank); in foldExtractEltToCmpSelect()
2025 MRI.setRegBank(MI.getOperand(0).getReg(), DstBank); in foldExtractEltToCmpSelect()
2033 static Register constrainRegToBank(MachineRegisterInfo &MRI, in constrainRegToBank() argument
2036 const RegisterBank *CurrBank = MRI.getRegBankOrNull(Reg); in constrainRegToBank()
2038 Register Copy = B.buildCopy(MRI.getType(Reg), Reg).getReg(0); in constrainRegToBank()
2039 MRI.setRegBank(Copy, Bank); in constrainRegToBank()
2043 MRI.setRegBank(Reg, Bank); in constrainRegToBank()
2048 MachineInstr &MI, MachineRegisterInfo &MRI, in foldInsertEltToCmpSelect() argument
2059 LLT VecTy = MRI.getType(VecReg); in foldInsertEltToCmpSelect()
2087 MRI.setRegBank(Idx, AMDGPU::VGPRRegBank); in foldInsertEltToCmpSelect()
2097 EltTy = MRI.getType(InsRegs[0]); in foldInsertEltToCmpSelect()
2105 MRI.setRegBank(IC->getOperand(0).getReg(), AMDGPU::SGPRRegBank); in foldInsertEltToCmpSelect()
2107 MRI.setRegBank(Cmp->getOperand(0).getReg(), CCBank); in foldInsertEltToCmpSelect()
2110 Register Op0 = constrainRegToBank(MRI, B, InsRegs[L], DstBank); in foldInsertEltToCmpSelect()
2112 Op1 = constrainRegToBank(MRI, B, Op1, DstBank); in foldInsertEltToCmpSelect()
2115 MRI.setRegBank(Select, DstBank); in foldInsertEltToCmpSelect()
2122 if (MergeTy == MRI.getType(MI.getOperand(0).getReg())) { in foldInsertEltToCmpSelect()
2126 MRI.setRegBank(Vec->getOperand(0).getReg(), DstBank); in foldInsertEltToCmpSelect()
2130 MRI.setRegBank(MI.getOperand(0).getReg(), DstBank); in foldInsertEltToCmpSelect()
2140 MachineRegisterInfo &MRI = OpdMapper.getMRI(); in applyMappingImpl() local
2144 LLT DstTy = MRI.getType(DstReg); in applyMappingImpl()
2162 const RegisterBank *SrcBank = getRegBank(SrcReg, MRI, *TRI); in applyMappingImpl()
2169 MRI.setRegBank(Copy.getReg(0), AMDGPU::VCCRegBank); in applyMappingImpl()
2182 ApplyRegBankMapping ApplyBank(*this, MRI, DstBank); in applyMappingImpl()
2211 Register NewDstReg = MRI.createGenericVirtualRegister(S32); in applyMappingImpl()
2212 MRI.setRegBank(NewDstReg, AMDGPU::SGPRRegBank); in applyMappingImpl()
2217 Register NewSrcReg = MRI.createGenericVirtualRegister(S32); in applyMappingImpl()
2218 MRI.setRegBank(NewSrcReg, AMDGPU::SGPRRegBank); in applyMappingImpl()
2236 LLT DstTy = MRI.getType(DstReg); in applyMappingImpl()
2245 const RegisterBank *CondBank = getRegBank(CondRegs[0], MRI, *TRI); in applyMappingImpl()
2249 Register NewCondReg = MRI.createGenericVirtualRegister(S32); in applyMappingImpl()
2250 MRI.setRegBank(NewCondReg, AMDGPU::SGPRRegBank); in applyMappingImpl()
2275 setRegsToType(MRI, Src1Regs, HalfTy); in applyMappingImpl()
2281 setRegsToType(MRI, Src2Regs, HalfTy); in applyMappingImpl()
2283 setRegsToType(MRI, DefRegs, HalfTy); in applyMappingImpl()
2288 MRI.setRegBank(DstReg, AMDGPU::VGPRRegBank); in applyMappingImpl()
2301 Register NewCondReg = MRI.createGenericVirtualRegister(S32); in applyMappingImpl()
2302 MRI.setRegBank(NewCondReg, AMDGPU::SGPRRegBank); in applyMappingImpl()
2317 LLT DstTy = MRI.getType(DstReg); in applyMappingImpl()
2326 ApplyRegBankMapping ApplyBank(*this, MRI, DstBank); in applyMappingImpl()
2362 setRegsToType(MRI, Src0Regs, HalfTy); in applyMappingImpl()
2367 setRegsToType(MRI, Src1Regs, HalfTy); in applyMappingImpl()
2369 setRegsToType(MRI, DefRegs, HalfTy); in applyMappingImpl()
2374 MRI.setRegBank(DstReg, AMDGPU::VGPRRegBank); in applyMappingImpl()
2380 const RegisterBank *SrcBank = MRI.getRegBankOrNull(SrcReg); in applyMappingImpl()
2386 ApplyRegBankMapping Apply(*this, MRI, &AMDGPU::VGPRRegBank); in applyMappingImpl()
2407 LLT DstTy = MRI.getType(DstReg); in applyMappingImpl()
2422 ApplyRegBankMapping ApplySALU(*this, MRI, &AMDGPU::SGPRRegBank); in applyMappingImpl()
2462 ApplyRegBankMapping O(*this, MRI, &AMDGPU::VGPRRegBank); in applyMappingImpl()
2489 MRI.setRegBank(DstReg, AMDGPU::VGPRRegBank); in applyMappingImpl()
2504 LLT Ty = MRI.getType(SrcReg); in applyMappingImpl()
2508 ApplyRegBankMapping ApplyVALU(*this, MRI, &AMDGPU::VGPRRegBank); in applyMappingImpl()
2522 LLT SrcTy = MRI.getType(SrcReg); in applyMappingImpl()
2532 LLT DstTy = MRI.getType(DstReg); in applyMappingImpl()
2553 MRI.setRegBank(DstReg, *SrcBank); in applyMappingImpl()
2579 MRI.setRegBank(True.getReg(0), *DstBank); in applyMappingImpl()
2580 MRI.setRegBank(False.getReg(0), *DstBank); in applyMappingImpl()
2581 MRI.setRegBank(DstReg, *DstBank); in applyMappingImpl()
2588 MRI.setRegBank(Sel.getReg(0), *DstBank); in applyMappingImpl()
2603 LLT DstTy = MRI.getType(DstReg); in applyMappingImpl()
2632 MRI.setRegBank(ZextLo, *BankLo); in applyMappingImpl()
2635 MRI.setRegBank(ZextHi, *BankHi); in applyMappingImpl()
2638 MRI.setRegBank(ShiftAmt.getReg(0), *BankHi); in applyMappingImpl()
2641 MRI.setRegBank(ShiftHi, *BankHi); in applyMappingImpl()
2644 MRI.setRegBank(MaskLo, *BankLo); in applyMappingImpl()
2647 MRI.setRegBank(ShiftAmt.getReg(0), *BankHi); in applyMappingImpl()
2650 MRI.setRegBank(ShiftHi, *BankHi); in applyMappingImpl()
2653 MRI.setRegBank(ZextLo, *BankLo); in applyMappingImpl()
2657 MRI.setRegBank(Or.getReg(0), *DstBank); in applyMappingImpl()
2672 LLT DstTy = MRI.getType(DstReg); in applyMappingImpl()
2673 LLT SrcTy = MRI.getType(SrcReg); in applyMappingImpl()
2675 if (foldExtractEltToCmpSelect(MI, MRI, OpdMapper)) in applyMappingImpl()
2691 AMDGPU::getBaseWithConstantOffset(MRI, MI.getOperand(2).getReg()); in applyMappingImpl()
2714 executeInWaterfallLoop(MI, MRI, { 2 }); in applyMappingImpl()
2718 Register TmpReg = MRI.createGenericVirtualRegister(DstTy); in applyMappingImpl()
2719 MRI.setRegBank(TmpReg, AMDGPU::SGPRRegBank); in applyMappingImpl()
2756 MRI.setRegBank(DstReg, *DstBank); in applyMappingImpl()
2757 MRI.setRegBank(CastSrc.getReg(0), *SrcBank); in applyMappingImpl()
2758 MRI.setRegBank(One.getReg(0), AMDGPU::SGPRRegBank); in applyMappingImpl()
2759 MRI.setRegBank(IdxLo.getReg(0), AMDGPU::SGPRRegBank); in applyMappingImpl()
2760 MRI.setRegBank(IdxHi.getReg(0), AMDGPU::SGPRRegBank); in applyMappingImpl()
2763 if (!collectWaterfallOperands(OpsToWaterfall, MI, MRI, { 2 })) { in applyMappingImpl()
2773 OpsToWaterfall, MRI); in applyMappingImpl()
2777 Register TmpReg0 = MRI.createGenericVirtualRegister(S32); in applyMappingImpl()
2778 Register TmpReg1 = MRI.createGenericVirtualRegister(S32); in applyMappingImpl()
2779 MRI.setRegBank(TmpReg0, AMDGPU::SGPRRegBank); in applyMappingImpl()
2780 MRI.setRegBank(TmpReg1, AMDGPU::SGPRRegBank); in applyMappingImpl()
2800 LLT VecTy = MRI.getType(DstReg); in applyMappingImpl()
2806 MRI.setType(MI.getOperand(1).getReg(), VecTy); in applyMappingImpl()
2808 if (foldInsertEltToCmpSelect(MI, MRI, OpdMapper)) in applyMappingImpl()
2816 LLT InsTy = MRI.getType(InsReg); in applyMappingImpl()
2822 AMDGPU::getBaseWithConstantOffset(MRI, MI.getOperand(3).getReg()); in applyMappingImpl()
2838 executeInWaterfallLoop(MI, MRI, { 3 }); in applyMappingImpl()
2879 MRI.setRegBank(InsReg, *InsSrcBank); in applyMappingImpl()
2880 MRI.setRegBank(CastSrc.getReg(0), *SrcBank); in applyMappingImpl()
2881 MRI.setRegBank(InsLo.getReg(0), *DstBank); in applyMappingImpl()
2882 MRI.setRegBank(InsHi.getReg(0), *DstBank); in applyMappingImpl()
2883 MRI.setRegBank(One.getReg(0), AMDGPU::SGPRRegBank); in applyMappingImpl()
2884 MRI.setRegBank(IdxLo.getReg(0), AMDGPU::SGPRRegBank); in applyMappingImpl()
2885 MRI.setRegBank(IdxHi.getReg(0), AMDGPU::SGPRRegBank); in applyMappingImpl()
2889 if (!collectWaterfallOperands(OpsToWaterfall, MI, MRI, { 3 })) { in applyMappingImpl()
2902 OpsToWaterfall, MRI); in applyMappingImpl()
2933 executeInWaterfallLoop(MI, MRI, {1, 4}); in applyMappingImpl()
2949 executeInWaterfallLoop(MI, MRI, {2, 5}); in applyMappingImpl()
2956 executeInWaterfallLoop(MI, MRI, {2, 5}); in applyMappingImpl()
2961 executeInWaterfallLoop(MI, MRI, {3, 6}); in applyMappingImpl()
2978 constrainOpWithReadfirstlane(MI, MRI, 3); // Index in applyMappingImpl()
2987 constrainOpWithReadfirstlane(MI, MRI, 2); // Source value in applyMappingImpl()
2988 constrainOpWithReadfirstlane(MI, MRI, 3); // Index in applyMappingImpl()
3000 constrainOpWithReadfirstlane(MI, MRI, MI.getNumOperands() - 1); // Index in applyMappingImpl()
3008 constrainOpWithReadfirstlane(MI, MRI, 4); in applyMappingImpl()
3009 constrainOpWithReadfirstlane(MI, MRI, 5); in applyMappingImpl()
3032 applyMappingImage(MI, OpdMapper, MRI, RSrcIntrin->RsrcArg); in applyMappingImpl()
3037 executeInWaterfallLoop(MI, MRI, { N }); in applyMappingImpl()
3048 constrainOpWithReadfirstlane(MI, MRI, 2); // M0 in applyMappingImpl()
3056 constrainOpWithReadfirstlane(MI, MRI, 2); // M0 in applyMappingImpl()
3063 constrainOpWithReadfirstlane(MI, MRI, 1); // M0 in applyMappingImpl()
3068 constrainOpWithReadfirstlane(MI, MRI, 2); // M0 in applyMappingImpl()
3074 constrainOpWithReadfirstlane(MI, MRI, 2); // M0 in applyMappingImpl()
3078 constrainOpWithReadfirstlane(MI, MRI, 2); in applyMappingImpl()
3088 applyMappingImage(MI, OpdMapper, MRI, RSrcIntrin->RsrcArg); in applyMappingImpl()
3101 if (applyMappingLoad(MI, OpdMapper, MRI)) in applyMappingImpl()
3106 applyMappingDynStackAlloc(MI, OpdMapper, MRI); in applyMappingImpl()
3156 unsigned AMDGPURegisterBankInfo::getMappingType(const MachineRegisterInfo &MRI, in getMappingType() argument
3164 if (const RegisterBank *Bank = getRegBank(Reg, MRI, *TRI)) { in getMappingType()
3176 const MachineRegisterInfo &MRI = MF.getRegInfo(); in isSALUMapping() local
3181 if (const RegisterBank *Bank = getRegBank(Reg, MRI, *TRI)) { in isSALUMapping()
3192 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getDefaultMappingSOP() local
3200 unsigned Size = getSizeInBits(SrcOp.getReg(), MRI, *TRI); in getDefaultMappingSOP()
3210 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getDefaultMappingVOP() local
3222 unsigned Size = getSizeInBits(Src.getReg(), MRI, *TRI); in getDefaultMappingVOP()
3234 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getDefaultMappingAllVGPR() local
3242 unsigned Size = getSizeInBits(Op.getReg(), MRI, *TRI); in getDefaultMappingAllVGPR()
3251 AMDGPURegisterBankInfo::getImageMapping(const MachineRegisterInfo &MRI, in getImageMapping() argument
3272 unsigned Size = getSizeInBits(OpReg, MRI, *TRI); in getImageMapping()
3282 unsigned NewBank = getRegBankID(OpReg, MRI, AMDGPU::SGPRRegBankID); in getImageMapping()
3295 AMDGPURegisterBankInfo::getValueMappingForPtr(const MachineRegisterInfo &MRI, in getValueMappingForPtr() argument
3297 LLT PtrTy = MRI.getType(PtrReg); in getValueMappingForPtr()
3305 const RegisterBank *PtrBank = getRegBank(PtrReg, MRI, *TRI); in getValueMappingForPtr()
3313 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrMappingForLoad() local
3315 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMappingForLoad()
3317 LLT PtrTy = MRI.getType(PtrReg); in getInstrMappingForLoad()
3324 const RegisterBank *PtrBank = getRegBank(PtrReg, MRI, *TRI); in getInstrMappingForLoad()
3358 const MachineRegisterInfo &MRI, in getRegBankID() argument
3360 const RegisterBank *Bank = getRegBank(Reg, MRI, *TRI); in getRegBankID()
3366 const MachineRegisterInfo &MRI, in getSGPROpMapping() argument
3370 unsigned Bank = getRegBankID(Reg, MRI, AMDGPU::SGPRRegBankID); in getSGPROpMapping()
3371 unsigned Size = getSizeInBits(Reg, MRI, TRI); in getSGPROpMapping()
3377 const MachineRegisterInfo &MRI, in getVGPROpMapping() argument
3379 unsigned Size = getSizeInBits(Reg, MRI, TRI); in getVGPROpMapping()
3385 const MachineRegisterInfo &MRI, in getAGPROpMapping() argument
3387 unsigned Size = getSizeInBits(Reg, MRI, TRI); in getAGPROpMapping()
3403 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrMapping() local
3408 const RegisterBank *DstBank = getRegBank(MI.getOperand(0).getReg(), MRI, in getInstrMapping()
3410 const RegisterBank *SrcBank = getRegBank(MI.getOperand(1).getReg(), MRI, in getInstrMapping()
3416 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
3438 auto OpBank = getRegBankID(MI.getOperand(I).getReg(), MRI); in getInstrMapping()
3446 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
3463 if (const RegisterBank *DstBank = getRegBank(DstReg, MRI, *TRI)) in getInstrMapping()
3468 const RegisterBank *Bank = getRegBank(Reg, MRI, *TRI); in getInstrMapping()
3483 unsigned Size = MRI.getType(DstReg).getSizeInBits(); in getInstrMapping()
3505 unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
3508 = getRegBank(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
3520 BankLHS = getRegBankID(MI.getOperand(1).getReg(), MRI, in getInstrMapping()
3522 BankRHS = getRegBankID(MI.getOperand(2).getReg(), MRI, in getInstrMapping()
3526 BankLHS = getRegBankID(MI.getOperand(1).getReg(), MRI, in getInstrMapping()
3528 BankRHS = getRegBankID(MI.getOperand(2).getReg(), MRI, in getInstrMapping()
3556 unsigned Bank1 = getRegBankID(MI.getOperand(1).getReg(), MRI /*, DefaultBankID*/); in getInstrMapping()
3559 unsigned Bank2 = getRegBankID(MI.getOperand(2).getReg(), MRI /*, DefaultBankID*/); in getInstrMapping()
3641 unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
3650 unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
3657 unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
3664 unsigned SrcBankID = getRegBankID(MI.getOperand(1).getReg(), MRI); in getInstrMapping()
3669 unsigned BankID = getMappingType(MRI, MI); in getInstrMapping()
3670 unsigned DstSize = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
3671 unsigned SrcSize = getSizeInBits(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping()
3672 unsigned EltSize = getSizeInBits(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
3680 unsigned BankID = getRegBankID(MI.getOperand(1).getReg(), MRI); in getInstrMapping()
3681 unsigned DstSize = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
3682 unsigned SrcSize = getSizeInBits(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping()
3690 LLT DstTy = MRI.getType(MI.getOperand(0).getReg()); in getInstrMapping()
3693 unsigned SrcSize = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in getInstrMapping()
3694 unsigned Src0BankID = getRegBankID(MI.getOperand(1).getReg(), MRI); in getInstrMapping()
3695 unsigned Src1BankID = getRegBankID(MI.getOperand(2).getReg(), MRI); in getInstrMapping()
3708 unsigned Bank = getMappingType(MRI, MI); in getInstrMapping()
3709 unsigned DstSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
3710 unsigned SrcSize = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in getInstrMapping()
3724 unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
3725 unsigned BankID = getRegBankID(MI.getOperand(1).getReg(), MRI); in getInstrMapping()
3732 unsigned Size = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in getInstrMapping()
3733 unsigned BankID = getRegBankID(MI.getOperand(1).getReg(), MRI); in getInstrMapping()
3745 unsigned Bank = getRegBankID(Src, MRI); in getInstrMapping()
3746 unsigned DstSize = getSizeInBits(Dst, MRI, *TRI); in getInstrMapping()
3747 unsigned SrcSize = getSizeInBits(Src, MRI, *TRI); in getInstrMapping()
3758 unsigned DstSize = getSizeInBits(Dst, MRI, *TRI); in getInstrMapping()
3759 unsigned SrcSize = getSizeInBits(Src, MRI, *TRI); in getInstrMapping()
3762 const RegisterBank *SrcBank = getRegBank(Src, MRI, *TRI); in getInstrMapping()
3781 unsigned Size = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in getInstrMapping()
3782 unsigned Op2Bank = getRegBankID(MI.getOperand(2).getReg(), MRI); in getInstrMapping()
3791 unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
3798 OpdsMapping[1] = getValueMappingForPtr(MRI, MI.getOperand(1).getReg()); in getInstrMapping()
3803 unsigned Size = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in getInstrMapping()
3807 unsigned DstBank = getRegBankID(MI.getOperand(0).getReg(), MRI, in getInstrMapping()
3809 unsigned Op2Bank = getRegBankID(MI.getOperand(2).getReg(), MRI); in getInstrMapping()
3810 unsigned Op3Bank = getRegBankID(MI.getOperand(3).getReg(), MRI); in getInstrMapping()
3833 unsigned SrcBankID = getRegBankID(MI.getOperand(1).getReg(), MRI); in getInstrMapping()
3834 unsigned DstSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
3835 unsigned SrcSize = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in getInstrMapping()
3836 unsigned IdxSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in getInstrMapping()
3837 unsigned IdxBank = getRegBankID(MI.getOperand(2).getReg(), MRI); in getInstrMapping()
3851 unsigned VecSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
3852 unsigned InsertSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in getInstrMapping()
3853 unsigned IdxSize = MRI.getType(MI.getOperand(3).getReg()).getSizeInBits(); in getInstrMapping()
3854 unsigned InsertEltBankID = getRegBankID(MI.getOperand(2).getReg(), MRI); in getInstrMapping()
3855 unsigned IdxBankID = getRegBankID(MI.getOperand(3).getReg(), MRI); in getInstrMapping()
3875 unsigned Bank = getMappingType(MRI, MI); in getInstrMapping()
3880 unsigned Size = getSizeInBits(MI.getOperand(i).getReg(), MRI, *TRI); in getInstrMapping()
3901 OpdsMapping[0] = getVGPROpMapping(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
3904 OpdsMapping[1] = getSGPROpMapping(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping()
3907 OpdsMapping[2] = getVGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
3910 OpdsMapping[3] = getVGPROpMapping(MI.getOperand(3).getReg(), MRI, *TRI); in getInstrMapping()
3913 OpdsMapping[4] = getSGPROpMapping(MI.getOperand(4).getReg(), MRI, *TRI); in getInstrMapping()
3935 OpdsMapping[0] = getVGPROpMapping(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
3938 OpdsMapping[1] = getVGPROpMapping(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping()
3941 OpdsMapping[2] = getSGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
3944 OpdsMapping[3] = getVGPROpMapping(MI.getOperand(3).getReg(), MRI, *TRI); in getInstrMapping()
3947 OpdsMapping[4] = getVGPROpMapping(MI.getOperand(4).getReg(), MRI, *TRI); in getInstrMapping()
3950 OpdsMapping[5] = getSGPROpMapping(MI.getOperand(5).getReg(), MRI, *TRI); in getInstrMapping()
3958 OpdsMapping[0] = getVGPROpMapping(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
3961 OpdsMapping[1] = getVGPROpMapping(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping()
3964 OpdsMapping[2] = getVGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
3967 OpdsMapping[3] = getSGPROpMapping(MI.getOperand(3).getReg(), MRI, *TRI); in getInstrMapping()
3970 OpdsMapping[4] = getVGPROpMapping(MI.getOperand(4).getReg(), MRI, *TRI); in getInstrMapping()
3973 OpdsMapping[5] = getVGPROpMapping(MI.getOperand(5).getReg(), MRI, *TRI); in getInstrMapping()
3976 OpdsMapping[6] = getSGPROpMapping(MI.getOperand(6).getReg(), MRI, *TRI); in getInstrMapping()
3985 OpdsMapping[1] = getSGPROpMapping(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping()
3986 OpdsMapping[2] = getSGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
3994 unsigned Size0 = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4079 unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4084 unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4094 unsigned Dst0Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4095 unsigned Dst1Size = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in getInstrMapping()
4099 unsigned SrcSize = MRI.getType(MI.getOperand(3).getReg()).getSizeInBits(); in getInstrMapping()
4107 unsigned Src0Size = MRI.getType(Src0Reg).getSizeInBits(); in getInstrMapping()
4108 unsigned Src1Size = MRI.getType(Src1Reg).getSizeInBits(); in getInstrMapping()
4109 unsigned DstSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4117 unsigned DstSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4120 unsigned OpSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in getInstrMapping()
4128 unsigned IdxSize = MRI.getType(IdxReg).getSizeInBits(); in getInstrMapping()
4129 unsigned IdxBank = getRegBankID(IdxReg, MRI, AMDGPU::SGPRRegBankID); in getInstrMapping()
4134 unsigned DstSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4135 unsigned SrcSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in getInstrMapping()
4141 unsigned DstSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4143 unsigned SrcSize = MRI.getType(SrcReg).getSizeInBits(); in getInstrMapping()
4144 unsigned SrcBank = getRegBankID(SrcReg, MRI, AMDGPU::SGPRRegBankID); in getInstrMapping()
4146 unsigned IdxSize = MRI.getType(IdxReg).getSizeInBits(); in getInstrMapping()
4147 unsigned IdxBank = getRegBankID(IdxReg, MRI, AMDGPU::SGPRRegBankID); in getInstrMapping()
4158 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
4166 unsigned Size = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
4170 OpdsMapping[4] = getSGPROpMapping(MI.getOperand(3).getReg(), MRI, *TRI); in getInstrMapping()
4171 OpdsMapping[5] = getSGPROpMapping(MI.getOperand(4).getReg(), MRI, *TRI); in getInstrMapping()
4207 OpdsMapping[0] = getAGPROpMapping(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
4208 OpdsMapping[2] = getVGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
4209 OpdsMapping[3] = getVGPROpMapping(MI.getOperand(3).getReg(), MRI, *TRI); in getInstrMapping()
4210 OpdsMapping[4] = getAGPROpMapping(MI.getOperand(4).getReg(), MRI, *TRI); in getInstrMapping()
4220 unsigned M0Bank = getRegBankID(M0Reg, MRI, AMDGPU::SGPRRegBankID); in getInstrMapping()
4221 unsigned DstSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4233 unsigned DstSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4234 unsigned SrcSize = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits(); in getInstrMapping()
4251 return getImageMapping(MRI, MI, RSrcIntrin->RsrcArg); in getInstrMapping()
4256 OpdsMapping[N] = getSGPROpMapping(MI.getOperand(N).getReg(), MRI, *TRI); in getInstrMapping()
4268 unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4282 unsigned DstSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4284 unsigned M0Bank = getRegBankID(MI.getOperand(2).getReg(), MRI, in getInstrMapping()
4292 unsigned DstSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4294 OpdsMapping[2] = getSGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
4311 unsigned Bank = getRegBankID(MI.getOperand(2).getReg(), MRI, in getInstrMapping()
4318 unsigned Bank = getRegBankID(MI.getOperand(2).getReg(), MRI, in getInstrMapping()
4324 unsigned Size = getSizeInBits(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping()
4329 unsigned WaveSize = getSizeInBits(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping()
4348 OpdsMapping[0] = getVGPROpMapping(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
4349 OpdsMapping[2] = getSGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
4350 OpdsMapping[3] = getVGPROpMapping(MI.getOperand(3).getReg(), MRI, *TRI); in getInstrMapping()
4351 OpdsMapping[4] = getSGPROpMapping(MI.getOperand(4).getReg(), MRI, *TRI); in getInstrMapping()
4357 OpdsMapping[1] = getVGPROpMapping(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping()
4358 OpdsMapping[2] = getSGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
4359 OpdsMapping[3] = getVGPROpMapping(MI.getOperand(3).getReg(), MRI, *TRI); in getInstrMapping()
4360 OpdsMapping[4] = getSGPROpMapping(MI.getOperand(4).getReg(), MRI, *TRI); in getInstrMapping()
4365 OpdsMapping[0] = getVGPROpMapping(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
4366 OpdsMapping[2] = getSGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
4367 OpdsMapping[3] = getVGPROpMapping(MI.getOperand(3).getReg(), MRI, *TRI); in getInstrMapping()
4368 OpdsMapping[4] = getVGPROpMapping(MI.getOperand(4).getReg(), MRI, *TRI); in getInstrMapping()
4369 OpdsMapping[5] = getSGPROpMapping(MI.getOperand(5).getReg(), MRI, *TRI); in getInstrMapping()
4374 OpdsMapping[1] = getVGPROpMapping(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping()
4375 OpdsMapping[2] = getSGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
4376 OpdsMapping[3] = getVGPROpMapping(MI.getOperand(3).getReg(), MRI, *TRI); in getInstrMapping()
4377 OpdsMapping[4] = getVGPROpMapping(MI.getOperand(4).getReg(), MRI, *TRI); in getInstrMapping()
4378 OpdsMapping[5] = getSGPROpMapping(MI.getOperand(5).getReg(), MRI, *TRI); in getInstrMapping()
4382 unsigned Size = getSizeInBits(MI.getOperand(1).getReg(), MRI, *TRI); in getInstrMapping()
4392 unsigned Bank = getRegBankID(MI.getOperand(2).getReg(), MRI, in getInstrMapping()
4401 unsigned Bank = getRegBankID(MI.getOperand(1).getReg(), MRI, in getInstrMapping()
4412 unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping()
4413 unsigned Op2Bank = getRegBankID(MI.getOperand(2).getReg(), MRI, in getInstrMapping()
4415 unsigned Op3Bank = getRegBankID(MI.getOperand(3).getReg(), MRI, in getInstrMapping()
4422 unsigned CondBank = getRegBankID(MI.getOperand(1).getReg(), MRI, in getInstrMapping()
4471 OpdsMapping[0] = getVGPROpMapping(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
4472 OpdsMapping[1] = getValueMappingForPtr(MRI, MI.getOperand(1).getReg()); in getInstrMapping()
4473 OpdsMapping[2] = getVGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
4477 OpdsMapping[0] = getVGPROpMapping(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping()
4478 OpdsMapping[1] = getValueMappingForPtr(MRI, MI.getOperand(1).getReg()); in getInstrMapping()
4479 OpdsMapping[2] = getVGPROpMapping(MI.getOperand(2).getReg(), MRI, *TRI); in getInstrMapping()
4480 OpdsMapping[3] = getVGPROpMapping(MI.getOperand(3).getReg(), MRI, *TRI); in getInstrMapping()
4484 unsigned Bank = getRegBankID(MI.getOperand(0).getReg(), MRI, in getInstrMapping()
4486 assert(MRI.getType(MI.getOperand(0).getReg()).getSizeInBits() == 1); in getInstrMapping()