Lines Matching refs:getReg
1802 return B.buildShl(S32, GetReg, ShiftAmt).getReg(0); in getSegmentAperture()
1826 return B.buildLoad(S32, LoadAddr, *MMO).getReg(0); in getSegmentAperture()
1835 Register Dst = MI.getOperand(0).getReg(); in legalizeAddrSpaceCast()
1836 Register Src = MI.getOperand(1).getReg(); in legalizeAddrSpaceCast()
1888 B.buildICmp(CmpInst::ICMP_NE, LLT::scalar(1), Src, FlatNull.getReg(0)); in legalizeAddrSpaceCast()
1889 B.buildSelect(Dst, CmpRes, PtrLo32, SegmentNull.getReg(0)); in legalizeAddrSpaceCast()
1911 B.buildICmp(CmpInst::ICMP_NE, LLT::scalar(1), Src, SegmentNull.getReg(0)); in legalizeAddrSpaceCast()
1914 Register SrcAsInt = B.buildPtrToInt(S32, Src).getReg(0); in legalizeAddrSpaceCast()
1928 Register Src = MI.getOperand(1).getReg(); in legalizeFrint()
1946 B.buildSelect(MI.getOperand(0).getReg(), Cond, Src, Tmp2); in legalizeFrint()
1958 Register Src = MI.getOperand(1).getReg(); in legalizeFceil()
1975 B.buildFAdd(MI.getOperand(0).getReg(), Trunc, Add); in legalizeFceil()
1982 Register DstReg = MI.getOperand(0).getReg(); in legalizeFrem()
1983 Register Src0Reg = MI.getOperand(1).getReg(); in legalizeFrem()
1984 Register Src1Reg = MI.getOperand(2).getReg(); in legalizeFrem()
2007 .addUse(Const0.getReg(0)) in extractF64Exponent()
2008 .addUse(Const1.getReg(0)); in extractF64Exponent()
2020 Register Src = MI.getOperand(1).getReg(); in legalizeIntrinsicTrunc()
2025 Register Hi = Unmerge.getReg(1); in legalizeIntrinsicTrunc()
2053 B.buildSelect(MI.getOperand(0).getReg(), ExpGt51, Src, Tmp1); in legalizeIntrinsicTrunc()
2062 Register Dst = MI.getOperand(0).getReg(); in legalizeITOFP()
2063 Register Src = MI.getOperand(1).getReg(); in legalizeITOFP()
2073 B.buildSITOFP(S64, Unmerge.getReg(1)) : in legalizeITOFP()
2074 B.buildUITOFP(S64, Unmerge.getReg(1)); in legalizeITOFP()
2076 auto CvtLo = B.buildUITOFP(S64, Unmerge.getReg(0)); in legalizeITOFP()
2080 .addUse(CvtHi.getReg(0)) in legalizeITOFP()
2081 .addUse(ThirtyTwo.getReg(0)); in legalizeITOFP()
2096 Register Dst = MI.getOperand(0).getReg(); in legalizeFPTOI()
2097 Register Src = MI.getOperand(1).getReg(); in legalizeFPTOI()
2188 getConstantVRegValWithLookThrough(MI.getOperand(2).getReg(), MRI); in legalizeExtractVectorElt()
2193 Register Dst = MI.getOperand(0).getReg(); in legalizeExtractVectorElt()
2194 Register Vec = MI.getOperand(1).getReg(); in legalizeExtractVectorElt()
2220 getConstantVRegValWithLookThrough(MI.getOperand(3).getReg(), MRI); in legalizeInsertVectorElt()
2225 Register Dst = MI.getOperand(0).getReg(); in legalizeInsertVectorElt()
2226 Register Vec = MI.getOperand(1).getReg(); in legalizeInsertVectorElt()
2227 Register Ins = MI.getOperand(2).getReg(); in legalizeInsertVectorElt()
2247 Register Dst = MI.getOperand(0).getReg(); in legalizeShuffleVector()
2248 Register Src0 = MI.getOperand(1).getReg(); in legalizeShuffleVector()
2266 Register DstReg = MI.getOperand(0).getReg(); in legalizeSinCos()
2267 Register SrcReg = MI.getOperand(1).getReg(); in legalizeSinCos()
2276 .addUse(MulVal.getReg(0)) in legalizeSinCos()
2277 .setMIFlags(Flags).getReg(0); in legalizeSinCos()
2279 TrigVal = B.buildFMul(Ty, SrcReg, OneOver2Pi, Flags).getReg(0); in legalizeSinCos()
2353 Register DstReg = MI.getOperand(0).getReg(); in legalizeGlobalValue()
2472 Register PtrReg = MI.getOperand(1).getReg(); in legalizeLoad()
2480 MI.getOperand(1).setReg(Cast.getReg(0)); in legalizeLoad()
2488 Register ValReg = MI.getOperand(0).getReg(); in legalizeLoad()
2523 WideLoad = B.buildLoadFromOffset(WideTy, PtrReg, *MMO, 0).getReg(0); in legalizeLoad()
2524 B.buildTrunc(ValReg, WideLoad).getReg(0); in legalizeLoad()
2531 WideLoad = B.buildLoadFromOffset(WideTy, PtrReg, *MMO, 0).getReg(0); in legalizeLoad()
2553 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in legalizeFMad()
2574 Register DstReg = MI.getOperand(0).getReg(); in legalizeAtomicCmpXChg()
2575 Register PtrReg = MI.getOperand(1).getReg(); in legalizeAtomicCmpXChg()
2576 Register CmpVal = MI.getOperand(2).getReg(); in legalizeAtomicCmpXChg()
2577 Register NewVal = MI.getOperand(3).getReg(); in legalizeAtomicCmpXChg()
2585 Register PackedVal = B.buildBuildVector(VecTy, { NewVal, CmpVal }).getReg(0); in legalizeAtomicCmpXChg()
2599 Register Dst = MI.getOperand(0).getReg(); in legalizeFlog()
2600 Register Src = MI.getOperand(1).getReg(); in legalizeFlog()
2614 Register Dst = MI.getOperand(0).getReg(); in legalizeFExp()
2615 Register Src = MI.getOperand(1).getReg(); in legalizeFExp()
2628 Register Dst = MI.getOperand(0).getReg(); in legalizeFPow()
2629 Register Src0 = MI.getOperand(1).getReg(); in legalizeFPow()
2630 Register Src1 = MI.getOperand(2).getReg(); in legalizeFPow()
2639 .addUse(Log.getReg(0)) in legalizeFPow()
2649 .addUse(Ext0.getReg(0)) in legalizeFPow()
2650 .addUse(Ext1.getReg(0)) in legalizeFPow()
2665 ModSrc = SrcFNeg->getOperand(1).getReg(); in stripAnySourceMods()
2667 ModSrc = SrcFAbs->getOperand(1).getReg(); in stripAnySourceMods()
2669 ModSrc = SrcFAbs->getOperand(1).getReg(); in stripAnySourceMods()
2679 Register Dst = MI.getOperand(0).getReg(); in legalizeFFloor()
2680 Register OrigSrc = MI.getOperand(1).getReg(); in legalizeFFloor()
2719 CorrectedFract = B.buildSelect(S64, IsNan, ModSrc, Min, Flags).getReg(0); in legalizeFFloor()
2733 Register Dst = MI.getOperand(0).getReg(); in legalizeBuildVector()
2737 Register Src0 = MI.getOperand(1).getReg(); in legalizeBuildVector()
2738 Register Src1 = MI.getOperand(2).getReg(); in legalizeBuildVector()
2752 auto ConstVal = getConstantVRegSExtVal(MI.getOperand(2).getReg(), MRI); in isNot()
2760 Register CondDef = MI.getOperand(0).getReg(); in verifyCFIntrinsic()
2768 Register NegatedCond = UseMI->getOperand(0).getReg(); in verifyCFIntrinsic()
2819 AndMaskSrc = B.buildLShr(S32, LiveIn, ShiftAmt).getReg(0); in loadInputValue()
2847 if (!loadInputValue(MI.getOperand(0).getReg(), B, ArgType)) in legalizePreloadedArgIntrin()
2857 Register Dst = MI.getOperand(0).getReg(); in legalizeFDIV()
2934 auto CvtLo = B.buildUITOFP(S32, Unmerge.getReg(0)); in emitReciprocalU64()
2935 auto CvtHi = B.buildUITOFP(S32, Unmerge.getReg(1)); in emitReciprocalU64()
2956 return {ResultLo.getReg(0), ResultHi.getReg(0)}; in emitReciprocalU64()
2980 Register MulHi1_Lo = UnmergeMulHi1.getReg(0); in legalizeUnsignedDIV_REM64Impl()
2981 Register MulHi1_Hi = UnmergeMulHi1.getReg(1); in legalizeUnsignedDIV_REM64Impl()
2984 auto Add1_Hi = B.buildUAdde(S32, S1, RcpHi, MulHi1_Hi, Add1_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
2991 Register MulHi2_Lo = UnmergeMulHi2.getReg(0); in legalizeUnsignedDIV_REM64Impl()
2992 Register MulHi2_Hi = UnmergeMulHi2.getReg(1); in legalizeUnsignedDIV_REM64Impl()
2997 B.buildUAdde(S32, S1, Add1_HiNc, MulHi2_Hi, Add1_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
2998 auto Add2_Hi = B.buildUAdde(S32, S1, Add2_HiC, Zero32, Add2_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
3002 Register NumerLo = UnmergeNumer.getReg(0); in legalizeUnsignedDIV_REM64Impl()
3003 Register NumerHi = UnmergeNumer.getReg(1); in legalizeUnsignedDIV_REM64Impl()
3008 Register Mul3_Lo = UnmergeMul3.getReg(0); in legalizeUnsignedDIV_REM64Impl()
3009 Register Mul3_Hi = UnmergeMul3.getReg(1); in legalizeUnsignedDIV_REM64Impl()
3011 auto Sub1_Hi = B.buildUSube(S32, S1, NumerHi, Mul3_Hi, Sub1_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
3016 Register DenomLo = UnmergeDenom.getReg(0); in legalizeUnsignedDIV_REM64Impl()
3017 Register DenomHi = UnmergeDenom.getReg(1); in legalizeUnsignedDIV_REM64Impl()
3034 auto Sub2_Mi = B.buildUSube(S32, S1, Sub1_Mi, DenomHi, Sub1_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
3035 auto Sub2_Hi = B.buildUSube(S32, S1, Sub2_Mi, Zero32, Sub2_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
3052 auto Sub3_Mi = B.buildUSube(S32, S1, Sub2_Mi, DenomHi, Sub2_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
3053 auto Sub3_Hi = B.buildUSube(S32, S1, Sub3_Mi, Zero32, Sub3_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
3082 DstDivReg = MI.getOperand(0).getReg(); in legalizeUnsignedDIV_REM()
3086 DstRemReg = MI.getOperand(0).getReg(); in legalizeUnsignedDIV_REM()
3090 DstDivReg = MI.getOperand(0).getReg(); in legalizeUnsignedDIV_REM()
3091 DstRemReg = MI.getOperand(1).getReg(); in legalizeUnsignedDIV_REM()
3099 Register Num = MI.getOperand(FirstSrcOpIdx).getReg(); in legalizeUnsignedDIV_REM()
3100 Register Den = MI.getOperand(FirstSrcOpIdx + 1).getReg(); in legalizeUnsignedDIV_REM()
3101 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in legalizeUnsignedDIV_REM()
3120 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in legalizeSignedDIV_REM()
3125 Register LHS = MI.getOperand(FirstSrcOpIdx).getReg(); in legalizeSignedDIV_REM()
3126 Register RHS = MI.getOperand(FirstSrcOpIdx + 1).getReg(); in legalizeSignedDIV_REM()
3132 LHS = B.buildAdd(Ty, LHS, LHSign).getReg(0); in legalizeSignedDIV_REM()
3133 RHS = B.buildAdd(Ty, RHS, RHSign).getReg(0); in legalizeSignedDIV_REM()
3135 LHS = B.buildXor(Ty, LHS, LHSign).getReg(0); in legalizeSignedDIV_REM()
3136 RHS = B.buildXor(Ty, RHS, RHSign).getReg(0); in legalizeSignedDIV_REM()
3143 DstDivReg = MI.getOperand(0).getReg(); in legalizeSignedDIV_REM()
3148 DstRemReg = MI.getOperand(0).getReg(); in legalizeSignedDIV_REM()
3153 DstDivReg = MI.getOperand(0).getReg(); in legalizeSignedDIV_REM()
3154 DstRemReg = MI.getOperand(1).getReg(); in legalizeSignedDIV_REM()
3167 auto Sign = B.buildXor(Ty, LHSign, RHSign).getReg(0); in legalizeSignedDIV_REM()
3168 auto SignXor = B.buildXor(Ty, TmpDivReg, Sign).getReg(0); in legalizeSignedDIV_REM()
3173 auto Sign = LHSign.getReg(0); // Remainder sign is the same as LHS in legalizeSignedDIV_REM()
3174 auto SignXor = B.buildXor(Ty, TmpRemReg, Sign).getReg(0); in legalizeSignedDIV_REM()
3185 Register Res = MI.getOperand(0).getReg(); in legalizeFastUnsafeFDIV()
3186 Register LHS = MI.getOperand(1).getReg(); in legalizeFastUnsafeFDIV()
3187 Register RHS = MI.getOperand(2).getReg(); in legalizeFastUnsafeFDIV()
3213 .addUse(FNeg.getReg(0)) in legalizeFastUnsafeFDIV()
3234 Register Res = MI.getOperand(0).getReg(); in legalizeFastUnsafeFDIV64()
3235 Register X = MI.getOperand(1).getReg(); in legalizeFastUnsafeFDIV64()
3236 Register Y = MI.getOperand(2).getReg(); in legalizeFastUnsafeFDIV64()
3274 Register Res = MI.getOperand(0).getReg(); in legalizeFDIV16()
3275 Register LHS = MI.getOperand(1).getReg(); in legalizeFDIV16()
3276 Register RHS = MI.getOperand(2).getReg(); in legalizeFDIV16()
3287 .addUse(RHSExt.getReg(0)) in legalizeFDIV16()
3294 .addUse(RDst.getReg(0)) in legalizeFDIV16()
3339 Register Res = MI.getOperand(0).getReg(); in legalizeFDIV32()
3340 Register LHS = MI.getOperand(1).getReg(); in legalizeFDIV32()
3341 Register RHS = MI.getOperand(2).getReg(); in legalizeFDIV32()
3366 .addUse(DenominatorScaled.getReg(0)) in legalizeFDIV32()
3386 .addUse(Fma4.getReg(0)) in legalizeFDIV32()
3387 .addUse(Fma1.getReg(0)) in legalizeFDIV32()
3388 .addUse(Fma3.getReg(0)) in legalizeFDIV32()
3389 .addUse(NumeratorScaled.getReg(1)) in legalizeFDIV32()
3393 .addUse(Fmas.getReg(0)) in legalizeFDIV32()
3408 Register Res = MI.getOperand(0).getReg(); in legalizeFDIV64()
3409 Register LHS = MI.getOperand(1).getReg(); in legalizeFDIV64()
3410 Register RHS = MI.getOperand(2).getReg(); in legalizeFDIV64()
3425 auto NegDivScale0 = B.buildFNeg(S64, DivScale0.getReg(0), Flags); in legalizeFDIV64()
3428 .addUse(DivScale0.getReg(0)) in legalizeFDIV64()
3442 auto Mul = B.buildFMul(S64, DivScale1.getReg(0), Fma3, Flags); in legalizeFDIV64()
3443 auto Fma4 = B.buildFMA(S64, NegDivScale0, Mul, DivScale1.getReg(0), Flags); in legalizeFDIV64()
3457 auto CmpNum = B.buildICmp(ICmpInst::ICMP_EQ, S1, NumUnmerge.getReg(1), in legalizeFDIV64()
3458 Scale1Unmerge.getReg(1)); in legalizeFDIV64()
3459 auto CmpDen = B.buildICmp(ICmpInst::ICMP_EQ, S1, DenUnmerge.getReg(1), in legalizeFDIV64()
3460 Scale0Unmerge.getReg(1)); in legalizeFDIV64()
3461 Scale = B.buildXor(S1, CmpNum, CmpDen).getReg(0); in legalizeFDIV64()
3463 Scale = DivScale1.getReg(1); in legalizeFDIV64()
3467 .addUse(Fma4.getReg(0)) in legalizeFDIV64()
3468 .addUse(Fma3.getReg(0)) in legalizeFDIV64()
3469 .addUse(Mul.getReg(0)) in legalizeFDIV64()
3474 .addUse(Fmas.getReg(0)) in legalizeFDIV64()
3486 Register Res = MI.getOperand(0).getReg(); in legalizeFDIVFastIntrin()
3487 Register LHS = MI.getOperand(2).getReg(); in legalizeFDIVFastIntrin()
3488 Register RHS = MI.getOperand(3).getReg(); in legalizeFDIVFastIntrin()
3507 .addUse(Mul0.getReg(0)) in legalizeFDIVFastIntrin()
3530 Register Dst = MI.getOperand(0).getReg(); in legalizeRsqClampIntrinsic()
3531 Register Src = MI.getOperand(2).getReg(); in legalizeRsqClampIntrinsic()
3613 B.buildPtrAdd(DstReg, KernargPtrReg, B.buildConstant(IdxTy, Offset).getReg(0)); in getImplicitArgPtr()
3626 Register DstReg = MI.getOperand(0).getReg(); in legalizeImplicitArgPtr()
3639 auto Unmerge = B.buildUnmerge(LLT::scalar(32), MI.getOperand(2).getReg()); in legalizeIsAddrSpace()
3640 Register Hi32 = Unmerge.getReg(1); in legalizeIsAddrSpace()
3667 BaseReg = B.buildPtrToInt(MRI.getType(OrigOffset), BaseReg).getReg(0); in splitBufferOffsets()
3685 BaseReg = B.buildConstant(S32, Overflow).getReg(0); in splitBufferOffsets()
3688 BaseReg = B.buildAdd(S32, BaseReg, OverflowVal).getReg(0); in splitBufferOffsets()
3693 BaseReg = B.buildConstant(S32, 0).getReg(0); in splitBufferOffsets()
3738 WideRegs.push_back(B.buildAnyExt(S32, Unmerge.getReg(I)).getReg(0)); in handleD16VData()
3743 .getReg(0); in handleD16VData()
3749 Reg = B.buildBitcast(S32, Reg).getReg(0); in handleD16VData()
3751 PackedRegs.resize(2, B.buildUndef(S32).getReg(0)); in handleD16VData()
3753 .getReg(0); in handleD16VData()
3760 PackedRegs.push_back(Unmerge.getReg(I)); in handleD16VData()
3761 PackedRegs.resize(6, B.buildUndef(S16).getReg(0)); in handleD16VData()
3762 Reg = B.buildBuildVector(LLT::fixed_vector(6, S16), PackedRegs).getReg(0); in handleD16VData()
3763 return B.buildBitcast(LLT::fixed_vector(3, S32), Reg).getReg(0); in handleD16VData()
3768 Reg = B.buildBitcast(LLT::fixed_vector(2, S32), Reg).getReg(0); in handleD16VData()
3771 PackedRegs.push_back(Unmerge.getReg(I)); in handleD16VData()
3772 PackedRegs.resize(4, B.buildUndef(S32).getReg(0)); in handleD16VData()
3774 .getReg(0); in handleD16VData()
3792 Register AnyExt = B.buildAnyExt(LLT::scalar(32), VData).getReg(0); in fixStoreSourceType()
3811 Register VData = MI.getOperand(1).getReg(); in legalizeBufferStore()
3818 Register RSrc = MI.getOperand(2).getReg(); in legalizeBufferStore()
3833 VIndex = MI.getOperand(3).getReg(); in legalizeBufferStore()
3836 VIndex = B.buildConstant(S32, 0).getReg(0); in legalizeBufferStore()
3839 Register VOffset = MI.getOperand(3 + OpOffset).getReg(); in legalizeBufferStore()
3840 Register SOffset = MI.getOperand(4 + OpOffset).getReg(); in legalizeBufferStore()
3903 Register Dst = MI.getOperand(0).getReg(); in legalizeBufferLoad()
3904 Register RSrc = MI.getOperand(2).getReg(); in legalizeBufferLoad()
3914 VIndex = MI.getOperand(3).getReg(); in legalizeBufferLoad()
3917 VIndex = B.buildConstant(S32, 0).getReg(0); in legalizeBufferLoad()
3920 Register VOffset = MI.getOperand(3 + OpOffset).getReg(); in legalizeBufferLoad()
3921 Register SOffset = MI.getOperand(4 + OpOffset).getReg(); in legalizeBufferLoad()
4002 Repack.push_back(B.buildTrunc(EltTy, Unmerge.getReg(I)).getReg(0)); in legalizeBufferLoad()
4017 .addDef(MI.getOperand(0).getReg()) in legalizeAtomicIncDec()
4018 .addUse(MI.getOperand(2).getReg()) in legalizeAtomicIncDec()
4019 .addUse(MI.getOperand(3).getReg()) in legalizeAtomicIncDec()
4093 Dst = MI.getOperand(0).getReg(); in legalizeBufferAtomic()
4098 Register VData = MI.getOperand(2 + OpOffset).getReg(); in legalizeBufferAtomic()
4102 CmpVal = MI.getOperand(3 + OpOffset).getReg(); in legalizeBufferAtomic()
4106 Register RSrc = MI.getOperand(3 + OpOffset).getReg(); in legalizeBufferAtomic()
4113 VIndex = MI.getOperand(4 + OpOffset).getReg(); in legalizeBufferAtomic()
4116 VIndex = B.buildConstant(LLT::scalar(32), 0).getReg(0); in legalizeBufferAtomic()
4119 Register VOffset = MI.getOperand(4 + OpOffset).getReg(); in legalizeBufferAtomic()
4120 Register SOffset = MI.getOperand(5 + OpOffset).getReg(); in legalizeBufferAtomic()
4168 Register AddrReg = SrcOp.getReg(); in packImage16bitOpsToDwords()
4174 AddrReg = B.buildBitcast(V2S16, AddrReg).getReg(0); in packImage16bitOpsToDwords()
4188 B.buildBuildVector(V2S16, {AddrReg, B.buildUndef(S16).getReg(0)}) in packImage16bitOpsToDwords()
4189 .getReg(0)); in packImage16bitOpsToDwords()
4193 V2S16, {AddrReg, MI.getOperand(ArgOffset + I + 1).getReg()}) in packImage16bitOpsToDwords()
4194 .getReg(0)); in packImage16bitOpsToDwords()
4211 AddrRegs.push_back(SrcOp.getReg()); in convertImageAddrToPacked()
4212 assert(B.getMRI()->getType(SrcOp.getReg()) == S32); in convertImageAddrToPacked()
4222 AddrRegs.append(RoundedNumRegs - NumAddrRegs, Undef.getReg(0)); in convertImageAddrToPacked()
4228 MI.getOperand(DimIdx).setReg(VAddr.getReg(0)); in convertImageAddrToPacked()
4274 MRI->getType(MI.getOperand(ArgOffset + Intr->GradientStart).getReg()); in legalizeImageIntrinsic()
4276 MRI->getType(MI.getOperand(ArgOffset + Intr->CoordStart).getReg()); in legalizeImageIntrinsic()
4313 Register VData0 = MI.getOperand(2).getReg(); in legalizeImageIntrinsic()
4321 Register VData1 = MI.getOperand(3).getReg(); in legalizeImageIntrinsic()
4325 MI.getOperand(2).setReg(Concat.getReg(0)); in legalizeImageIntrinsic()
4337 if (mi_match(MI.getOperand(ArgOffset + Intr->LodIndex).getReg(), *MRI, in legalizeImageIntrinsic()
4359 if (mi_match(MI.getOperand(ArgOffset + Intr->MipIndex).getReg(), *MRI, in legalizeImageIntrinsic()
4396 PackedRegs[0] = Concat.getReg(0); in legalizeImageIntrinsic()
4408 assert(SrcOp.getReg() != AMDGPU::NoRegister); in legalizeImageIntrinsic()
4445 Register VData = MI.getOperand(1).getReg(); in legalizeImageIntrinsic()
4458 Register DstReg = MI.getOperand(0).getReg(); in legalizeImageIntrinsic()
4526 Dst1Reg = MI.getOperand(1).getReg(); in legalizeImageIntrinsic()
4584 Reg = B.buildBitcast(V2S16, Reg).getReg(0); in legalizeImageIntrinsic()
4587 Reg = B.buildTrunc(S16, Reg).getReg(0); in legalizeImageIntrinsic()
4594 Register Undef = B.buildUndef(Ty).getReg(0); in legalizeImageIntrinsic()
4629 Register Dst = MI.getOperand(0).getReg(); in legalizeSBufferLoad()
4639 Dst = MI.getOperand(0).getReg(); in legalizeSBufferLoad()
4758 Register DstReg = MI.getOperand(0).getReg(); in legalizeBVHIntrinsic()
4759 Register NodePtr = MI.getOperand(2).getReg(); in legalizeBVHIntrinsic()
4760 Register RayExtent = MI.getOperand(3).getReg(); in legalizeBVHIntrinsic()
4761 Register RayOrigin = MI.getOperand(4).getReg(); in legalizeBVHIntrinsic()
4762 Register RayDir = MI.getOperand(5).getReg(); in legalizeBVHIntrinsic()
4763 Register RayInvDir = MI.getOperand(6).getReg(); in legalizeBVHIntrinsic()
4764 Register TDescr = MI.getOperand(7).getReg(); in legalizeBVHIntrinsic()
4784 Ops.push_back(Unmerge.getReg(0)); in legalizeBVHIntrinsic()
4785 Ops.push_back(Unmerge.getReg(1)); in legalizeBVHIntrinsic()
4793 Ops.push_back(Unmerge.getReg(0)); in legalizeBVHIntrinsic()
4794 Ops.push_back(Unmerge.getReg(1)); in legalizeBVHIntrinsic()
4795 Ops.push_back(Unmerge.getReg(2)); in legalizeBVHIntrinsic()
4805 B.buildMerge(R1, {UnmergeRayDir.getReg(0), UnmergeRayDir.getReg(1)}); in legalizeBVHIntrinsic()
4806 B.buildMerge(R2, {UnmergeRayDir.getReg(2), UnmergeRayInvDir.getReg(0)}); in legalizeBVHIntrinsic()
4807 B.buildMerge(R3, {UnmergeRayInvDir.getReg(1), UnmergeRayInvDir.getReg(2)}); in legalizeBVHIntrinsic()
4850 Register Def = MI.getOperand(1).getReg(); in legalizeIntrinsic()
4851 Register Use = MI.getOperand(3).getReg(); in legalizeIntrinsic()
4899 Register Reg = MI.getOperand(2).getReg(); in legalizeIntrinsic()
4925 B.buildConstant(MI.getOperand(0).getReg(), 0); in legalizeIntrinsic()