Lines Matching refs:LLT
49 static LLT getPow2VectorType(LLT Ty) { in getPow2VectorType()
56 static LLT getPow2ScalarType(LLT Ty) { in getPow2ScalarType()
59 return LLT::scalar(Pow2Bits); in getPow2ScalarType()
67 const LLT Ty = Query.Types[TypeIdx]; in isSmallOddVector()
71 const LLT EltTy = Ty.getElementType(); in isSmallOddVector()
81 const LLT Ty = Query.Types[TypeIdx]; in sizeIsMultipleOf32()
88 const LLT Ty = Query.Types[TypeIdx]; in isWideVec16()
89 const LLT EltTy = Ty.getScalarType(); in isWideVec16()
96 const LLT Ty = Query.Types[TypeIdx]; in oneMoreElement()
97 const LLT EltTy = Ty.getElementType(); in oneMoreElement()
99 LLT::fixed_vector(Ty.getNumElements() + 1, EltTy)); in oneMoreElement()
105 const LLT Ty = Query.Types[TypeIdx]; in fewerEltsToSize64Vector()
106 const LLT EltTy = Ty.getElementType(); in fewerEltsToSize64Vector()
112 LLT::scalarOrVector(ElementCount::getFixed(NewNumElts), EltTy)); in fewerEltsToSize64Vector()
120 const LLT Ty = Query.Types[TypeIdx]; in moreEltsToNext32Bit()
122 const LLT EltTy = Ty.getElementType(); in moreEltsToNext32Bit()
130 return std::make_pair(TypeIdx, LLT::fixed_vector(NewNumElts, EltTy)); in moreEltsToNext32Bit()
134 static LLT getBitcastRegisterType(const LLT Ty) { in getBitcastRegisterType()
137 LLT CoercedTy; in getBitcastRegisterType()
141 return LLT::scalar(Size); in getBitcastRegisterType()
144 return LLT::scalarOrVector(ElementCount::getFixed(Size / 32), 32); in getBitcastRegisterType()
149 const LLT Ty = Query.Types[TypeIdx]; in bitcastToRegisterType()
156 const LLT Ty = Query.Types[TypeIdx]; in bitcastToVectorElement32()
160 TypeIdx, LLT::scalarOrVector(ElementCount::getFixed(Size / 32), 32)); in bitcastToVectorElement32()
166 const LLT QueryTy = Query.Types[TypeIdx]; in vectorSmallerThan()
173 const LLT QueryTy = Query.Types[TypeIdx]; in vectorWiderThan()
180 const LLT QueryTy = Query.Types[TypeIdx]; in numElementsNotEven()
189 static bool isRegisterVectorElementType(LLT EltTy) { in isRegisterVectorElementType()
194 static bool isRegisterVectorType(LLT Ty) { in isRegisterVectorType()
201 static bool isRegisterType(LLT Ty) { in isRegisterType()
221 const LLT QueryTy = Query.Types[TypeIdx]; in elementTypeIsLegal()
224 const LLT EltTy = QueryTy.getElementType(); in elementTypeIsLegal()
225 return EltTy == LLT::scalar(16) || EltTy.getSizeInBits() >= 32; in elementTypeIsLegal()
233 const LLT Ty = Query.Types[TypeIdx]; in isWideScalarExtLoadTruncStore()
269 const LLT Ty = Query.Types[0]; in isLoadStoreSizeLegal()
337 static bool loadStoreBitcastWorkaround(const LLT Ty) { in loadStoreBitcastWorkaround()
347 LLT EltTy = Ty.getElementType(); in loadStoreBitcastWorkaround()
356 const LLT Ty = Query.Types[0]; in isLoadStoreLegal()
363 static bool shouldBitcastLoadStoreType(const GCNSubtarget &ST, const LLT Ty, in shouldBitcastLoadStoreType()
364 const LLT MemTy) { in shouldBitcastLoadStoreType()
382 static bool shouldWidenLoad(const GCNSubtarget &ST, LLT MemoryTy, in shouldWidenLoad()
432 return LLT::pointer(AS, TM.getPointerSizeInBits(AS)); in AMDGPULegalizerInfo()
435 const LLT S1 = LLT::scalar(1); in AMDGPULegalizerInfo()
436 const LLT S8 = LLT::scalar(8); in AMDGPULegalizerInfo()
437 const LLT S16 = LLT::scalar(16); in AMDGPULegalizerInfo()
438 const LLT S32 = LLT::scalar(32); in AMDGPULegalizerInfo()
439 const LLT S64 = LLT::scalar(64); in AMDGPULegalizerInfo()
440 const LLT S128 = LLT::scalar(128); in AMDGPULegalizerInfo()
441 const LLT S256 = LLT::scalar(256); in AMDGPULegalizerInfo()
442 const LLT S512 = LLT::scalar(512); in AMDGPULegalizerInfo()
443 const LLT MaxScalar = LLT::scalar(MaxRegisterSize); in AMDGPULegalizerInfo()
445 const LLT V2S8 = LLT::fixed_vector(2, 8); in AMDGPULegalizerInfo()
446 const LLT V2S16 = LLT::fixed_vector(2, 16); in AMDGPULegalizerInfo()
447 const LLT V4S16 = LLT::fixed_vector(4, 16); in AMDGPULegalizerInfo()
449 const LLT V2S32 = LLT::fixed_vector(2, 32); in AMDGPULegalizerInfo()
450 const LLT V3S32 = LLT::fixed_vector(3, 32); in AMDGPULegalizerInfo()
451 const LLT V4S32 = LLT::fixed_vector(4, 32); in AMDGPULegalizerInfo()
452 const LLT V5S32 = LLT::fixed_vector(5, 32); in AMDGPULegalizerInfo()
453 const LLT V6S32 = LLT::fixed_vector(6, 32); in AMDGPULegalizerInfo()
454 const LLT V7S32 = LLT::fixed_vector(7, 32); in AMDGPULegalizerInfo()
455 const LLT V8S32 = LLT::fixed_vector(8, 32); in AMDGPULegalizerInfo()
456 const LLT V9S32 = LLT::fixed_vector(9, 32); in AMDGPULegalizerInfo()
457 const LLT V10S32 = LLT::fixed_vector(10, 32); in AMDGPULegalizerInfo()
458 const LLT V11S32 = LLT::fixed_vector(11, 32); in AMDGPULegalizerInfo()
459 const LLT V12S32 = LLT::fixed_vector(12, 32); in AMDGPULegalizerInfo()
460 const LLT V13S32 = LLT::fixed_vector(13, 32); in AMDGPULegalizerInfo()
461 const LLT V14S32 = LLT::fixed_vector(14, 32); in AMDGPULegalizerInfo()
462 const LLT V15S32 = LLT::fixed_vector(15, 32); in AMDGPULegalizerInfo()
463 const LLT V16S32 = LLT::fixed_vector(16, 32); in AMDGPULegalizerInfo()
464 const LLT V32S32 = LLT::fixed_vector(32, 32); in AMDGPULegalizerInfo()
466 const LLT V2S64 = LLT::fixed_vector(2, 64); in AMDGPULegalizerInfo()
467 const LLT V3S64 = LLT::fixed_vector(3, 64); in AMDGPULegalizerInfo()
468 const LLT V4S64 = LLT::fixed_vector(4, 64); in AMDGPULegalizerInfo()
469 const LLT V5S64 = LLT::fixed_vector(5, 64); in AMDGPULegalizerInfo()
470 const LLT V6S64 = LLT::fixed_vector(6, 64); in AMDGPULegalizerInfo()
471 const LLT V7S64 = LLT::fixed_vector(7, 64); in AMDGPULegalizerInfo()
472 const LLT V8S64 = LLT::fixed_vector(8, 64); in AMDGPULegalizerInfo()
473 const LLT V16S64 = LLT::fixed_vector(16, 64); in AMDGPULegalizerInfo()
475 std::initializer_list<LLT> AllS32Vectors = in AMDGPULegalizerInfo()
478 std::initializer_list<LLT> AllS64Vectors = in AMDGPULegalizerInfo()
481 const LLT GlobalPtr = GetAddrSpacePtr(AMDGPUAS::GLOBAL_ADDRESS); in AMDGPULegalizerInfo()
482 const LLT ConstantPtr = GetAddrSpacePtr(AMDGPUAS::CONSTANT_ADDRESS); in AMDGPULegalizerInfo()
483 const LLT Constant32Ptr = GetAddrSpacePtr(AMDGPUAS::CONSTANT_ADDRESS_32BIT); in AMDGPULegalizerInfo()
484 const LLT LocalPtr = GetAddrSpacePtr(AMDGPUAS::LOCAL_ADDRESS); in AMDGPULegalizerInfo()
485 const LLT RegionPtr = GetAddrSpacePtr(AMDGPUAS::REGION_ADDRESS); in AMDGPULegalizerInfo()
486 const LLT FlatPtr = GetAddrSpacePtr(AMDGPUAS::FLAT_ADDRESS); in AMDGPULegalizerInfo()
487 const LLT PrivatePtr = GetAddrSpacePtr(AMDGPUAS::PRIVATE_ADDRESS); in AMDGPULegalizerInfo()
489 const LLT CodePtr = FlatPtr; in AMDGPULegalizerInfo()
491 const std::initializer_list<LLT> AddrSpaces64 = { in AMDGPULegalizerInfo()
495 const std::initializer_list<LLT> AddrSpaces32 = { in AMDGPULegalizerInfo()
499 const std::initializer_list<LLT> FPTypesBase = { in AMDGPULegalizerInfo()
503 const std::initializer_list<LLT> FPTypes16 = { in AMDGPULegalizerInfo()
507 const std::initializer_list<LLT> FPTypesPK16 = { in AMDGPULegalizerInfo()
511 const LLT MinScalarFPTy = ST.has16BitInsts() ? S16 : S32; in AMDGPULegalizerInfo()
1019 return std::make_pair(1, LLT::scalar(Query.Types[0].getSizeInBits())); in AMDGPULegalizerInfo()
1023 return std::make_pair(1, LLT::scalar(Query.Types[0].getSizeInBits())); in AMDGPULegalizerInfo()
1035 return std::make_pair(0, LLT::scalar(Query.Types[1].getSizeInBits())); in AMDGPULegalizerInfo()
1040 return std::make_pair(0, LLT::scalar(Query.Types[1].getSizeInBits())); in AMDGPULegalizerInfo()
1049 const LLT DstTy = Query.Types[0]; in AMDGPULegalizerInfo()
1061 const LLT PtrTy = Query.Types[1]; in AMDGPULegalizerInfo()
1166 [=](const LegalityQuery &Query) -> std::pair<unsigned, LLT> { in AMDGPULegalizerInfo()
1167 const LLT DstTy = Query.Types[0]; in AMDGPULegalizerInfo()
1168 const LLT PtrTy = Query.Types[1]; in AMDGPULegalizerInfo()
1175 return std::make_pair(0, LLT::scalar(MemSize)); in AMDGPULegalizerInfo()
1182 return std::make_pair(0, LLT::scalar(FloorSize)); in AMDGPULegalizerInfo()
1188 return std::make_pair(0, LLT::scalar(32 * (DstSize / 32))); in AMDGPULegalizerInfo()
1195 return std::make_pair(0, LLT::scalar(MaxSize)); in AMDGPULegalizerInfo()
1198 return std::make_pair(0, LLT::scalar(Align)); in AMDGPULegalizerInfo()
1205 [=](const LegalityQuery &Query) -> std::pair<unsigned, LLT> { in AMDGPULegalizerInfo()
1206 const LLT DstTy = Query.Types[0]; in AMDGPULegalizerInfo()
1207 const LLT PtrTy = Query.Types[1]; in AMDGPULegalizerInfo()
1209 LLT EltTy = DstTy.getElementType(); in AMDGPULegalizerInfo()
1226 0, LLT::scalarOrVector( in AMDGPULegalizerInfo()
1239 0, LLT::fixed_vector(NumElts / NumPieces, EltTy)); in AMDGPULegalizerInfo()
1254 0, LLT::scalarOrVector( in AMDGPULegalizerInfo()
1263 0, LLT::fixed_vector(EltSize / Align, EltTy)); in AMDGPULegalizerInfo()
1342 LLT::fixed_vector(2, LocalPtr), in AMDGPULegalizerInfo()
1343 LLT::fixed_vector(2, PrivatePtr)}, in AMDGPULegalizerInfo()
1372 const LLT ValTy = Query.Types[0]; in AMDGPULegalizerInfo()
1373 const LLT AmountTy = Query.Types[1]; in AMDGPULegalizerInfo()
1408 const LLT EltTy = Query.Types[EltTypeIdx]; in AMDGPULegalizerInfo()
1409 const LLT VecTy = Query.Types[VecTypeIdx]; in AMDGPULegalizerInfo()
1410 const LLT IdxTy = Query.Types[IdxTypeIdx]; in AMDGPULegalizerInfo()
1426 const LLT EltTy = Query.Types[EltTypeIdx]; in AMDGPULegalizerInfo()
1427 const LLT VecTy = Query.Types[VecTypeIdx]; in AMDGPULegalizerInfo()
1434 LLT::fixed_vector(VecSize / TargetEltSize, TargetEltSize)); in AMDGPULegalizerInfo()
1448 const LLT &EltTy = Query.Types[1].getElementType(); in AMDGPULegalizerInfo()
1461 const LLT BigTy = Query.Types[BigTyIdx]; in AMDGPULegalizerInfo()
1462 const LLT LitTy = Query.Types[LitTyIdx]; in AMDGPULegalizerInfo()
1468 const LLT BigTy = Query.Types[BigTyIdx]; in AMDGPULegalizerInfo()
1474 const LLT LitTy = Query.Types[LitTyIdx]; in AMDGPULegalizerInfo()
1534 const LLT Ty = Query.Types[TypeIdx]; in AMDGPULegalizerInfo()
1536 const LLT &EltTy = Ty.getElementType(); in AMDGPULegalizerInfo()
1549 const LLT BigTy = Query.Types[BigTyIdx]; in AMDGPULegalizerInfo()
1578 const LLT Ty = Query.Types[LitTyIdx]; in AMDGPULegalizerInfo()
1586 const LLT Ty = Query.Types[BigTyIdx]; in AMDGPULegalizerInfo()
1593 const LLT &Ty = Query.Types[BigTyIdx]; in AMDGPULegalizerInfo()
1600 return std::make_pair(BigTyIdx, LLT::scalar(NewSizeInBits)); in AMDGPULegalizerInfo()
1776 const LLT S32 = LLT::scalar(32); in getSegmentAperture()
1806 LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64)); in getSegmentAperture()
1821 LLT::scalar(32), commonAlignment(Align(64), StructOffset)); in getSegmentAperture()
1825 B.materializePtrAdd(LoadAddr, QueuePtr, LLT::scalar(64), StructOffset); in getSegmentAperture()
1834 const LLT S32 = LLT::scalar(32); in legalizeAddrSpaceCast()
1838 LLT DstTy = MRI.getType(Dst); in legalizeAddrSpaceCast()
1839 LLT SrcTy = MRI.getType(Src); in legalizeAddrSpaceCast()
1870 LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS_32BIT, 32), AddrHiVal); in legalizeAddrSpaceCast()
1888 B.buildICmp(CmpInst::ICMP_NE, LLT::scalar(1), Src, FlatNull.getReg(0)); in legalizeAddrSpaceCast()
1911 B.buildICmp(CmpInst::ICMP_NE, LLT::scalar(1), Src, SegmentNull.getReg(0)); in legalizeAddrSpaceCast()
1929 LLT Ty = MRI.getType(Src); in legalizeFrint()
1945 auto Cond = B.buildFCmp(CmpInst::FCMP_OGT, LLT::scalar(1), Fabs, C2); in legalizeFrint()
1955 const LLT S1 = LLT::scalar(1); in legalizeFceil()
1956 const LLT S64 = LLT::scalar(64); in legalizeFceil()
1986 LLT Ty = MRI.getType(DstReg); in legalizeFrem()
2000 LLT S32 = LLT::scalar(32); in extractF64Exponent()
2016 const LLT S1 = LLT::scalar(1); in legalizeIntrinsicTrunc()
2017 const LLT S32 = LLT::scalar(32); in legalizeIntrinsicTrunc()
2018 const LLT S64 = LLT::scalar(64); in legalizeIntrinsicTrunc()
2065 const LLT S64 = LLT::scalar(64); in legalizeITOFP()
2066 const LLT S32 = LLT::scalar(32); in legalizeITOFP()
2099 const LLT S64 = LLT::scalar(64); in legalizeFPTOI()
2100 const LLT S32 = LLT::scalar(32); in legalizeFPTOI()
2102 const LLT SrcLT = MRI.getType(Src); in legalizeFPTOI()
2196 LLT VecTy = MRI.getType(Vec); in legalizeExtractVectorElt()
2197 LLT EltTy = VecTy.getElementType(); in legalizeExtractVectorElt()
2229 LLT VecTy = MRI.getType(Vec); in legalizeInsertVectorElt()
2230 LLT EltTy = VecTy.getElementType(); in legalizeInsertVectorElt()
2245 const LLT V2S16 = LLT::fixed_vector(2, 16); in legalizeShuffleVector()
2249 LLT DstTy = MRI.getType(Dst); in legalizeShuffleVector()
2250 LLT SrcTy = MRI.getType(Src0); in legalizeShuffleVector()
2268 LLT Ty = MRI.getType(DstReg); in legalizeSinCos()
2290 bool AMDGPULegalizerInfo::buildPCRelGlobalAddress(Register DstReg, LLT PtrTy, in buildPCRelGlobalAddress()
2329 LLT ConstPtrTy = LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64); in buildPCRelGlobalAddress()
2354 LLT Ty = MRI.getType(DstReg); in legalizeGlobalValue()
2399 LLT S32 = LLT::scalar(32); in legalizeGlobalValue()
2436 LLT PtrTy = LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64); in legalizeGlobalValue()
2439 LLT LoadTy = Ty.getSizeInBits() == 32 ? PtrTy : Ty; in legalizeGlobalValue()
2459 static LLT widenToNextPowerOf2(LLT Ty) { in widenToNextPowerOf2()
2463 return LLT::scalar(PowerOf2Ceil(Ty.getSizeInBits())); in widenToNextPowerOf2()
2473 LLT PtrTy = MRI.getType(PtrReg); in legalizeLoad()
2477 LLT ConstPtr = LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64); in legalizeLoad()
2489 LLT ValTy = MRI.getType(ValReg); in legalizeLoad()
2493 const LLT MemTy = MMO->getMemoryType(); in legalizeLoad()
2519 LLT WideTy = widenToNextPowerOf2(ValTy); in legalizeLoad()
2553 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in legalizeFMad()
2561 if (Ty == LLT::scalar(32) && !MFI->getMode().allFP32Denormals()) in legalizeFMad()
2563 if (Ty == LLT::scalar(16) && !MFI->getMode().allFP64FP16Denormals()) in legalizeFMad()
2582 LLT ValTy = MRI.getType(CmpVal); in legalizeAtomicCmpXChg()
2583 LLT VecTy = LLT::fixed_vector(2, ValTy); in legalizeAtomicCmpXChg()
2601 LLT Ty = B.getMRI()->getType(Dst); in legalizeFlog()
2617 LLT Ty = B.getMRI()->getType(Dst); in legalizeFExp()
2632 LLT Ty = B.getMRI()->getType(Dst); in legalizeFPow()
2633 const LLT S16 = LLT::scalar(16); in legalizeFPow()
2634 const LLT S32 = LLT::scalar(32); in legalizeFPow()
2677 const LLT S1 = LLT::scalar(1); in legalizeFFloor()
2678 const LLT S64 = LLT::scalar(64); in legalizeFFloor()
2734 const LLT S32 = LLT::scalar(32); in legalizeBuildVector()
2735 assert(MRI.getType(Dst) == LLT::fixed_vector(2, 16)); in legalizeBuildVector()
2739 assert(MRI.getType(Src0) == LLT::scalar(16)); in legalizeBuildVector()
2802 LLT ArgTy) const { in loadInputValue()
2811 const LLT S32 = LLT::scalar(32); in loadInputValue()
2836 LLT ArgTy; in loadInputValue()
2858 LLT DstTy = MRI.getType(Dst); in legalizeFDIV()
2859 LLT S16 = LLT::scalar(16); in legalizeFDIV()
2860 LLT S32 = LLT::scalar(32); in legalizeFDIV()
2861 LLT S64 = LLT::scalar(64); in legalizeFDIV()
2878 const LLT S1 = LLT::scalar(1); in legalizeUnsignedDIV_REM32Impl()
2879 const LLT S32 = LLT::scalar(32); in legalizeUnsignedDIV_REM32Impl()
2931 const LLT S32 = LLT::scalar(32); in emitReciprocalU64()
2964 const LLT S32 = LLT::scalar(32); in legalizeUnsignedDIV_REM64Impl()
2965 const LLT S64 = LLT::scalar(64); in legalizeUnsignedDIV_REM64Impl()
2966 const LLT S1 = LLT::scalar(1); in legalizeUnsignedDIV_REM64Impl()
3096 const LLT S64 = LLT::scalar(64); in legalizeUnsignedDIV_REM()
3097 const LLT S32 = LLT::scalar(32); in legalizeUnsignedDIV_REM()
3101 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in legalizeUnsignedDIV_REM()
3117 const LLT S64 = LLT::scalar(64); in legalizeSignedDIV_REM()
3118 const LLT S32 = LLT::scalar(32); in legalizeSignedDIV_REM()
3120 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in legalizeSignedDIV_REM()
3189 LLT ResTy = MRI.getType(Res); in legalizeFastUnsafeFDIV()
3238 LLT ResTy = MRI.getType(Res); in legalizeFastUnsafeFDIV64()
3280 LLT S16 = LLT::scalar(16); in legalizeFDIV16()
3281 LLT S32 = LLT::scalar(32); in legalizeFDIV16()
3347 LLT S32 = LLT::scalar(32); in legalizeFDIV32()
3348 LLT S1 = LLT::scalar(1); in legalizeFDIV32()
3414 LLT S64 = LLT::scalar(64); in legalizeFDIV64()
3415 LLT S1 = LLT::scalar(1); in legalizeFDIV64()
3450 LLT S32 = LLT::scalar(32); in legalizeFDIV64()
3491 LLT S32 = LLT::scalar(32); in legalizeFDIVFastIntrin()
3492 LLT S1 = LLT::scalar(1); in legalizeFDIVFastIntrin()
3534 LLT Ty = MRI.getType(Dst); in legalizeRsqClampIntrinsic()
3537 if (Ty == LLT::scalar(32)) in legalizeRsqClampIntrinsic()
3539 else if (Ty == LLT::scalar(64)) in legalizeRsqClampIntrinsic()
3604 LLT DstTy = MRI.getType(DstReg); in getImplicitArgPtr()
3605 LLT IdxTy = LLT::scalar(DstTy.getSizeInBits()); in getImplicitArgPtr()
3639 auto Unmerge = B.buildUnmerge(LLT::scalar(32), MI.getOperand(2).getReg()); in legalizeIsAddrSpace()
3659 const LLT S32 = LLT::scalar(32); in splitBufferOffsets()
3728 const LLT S16 = LLT::scalar(16); in handleD16VData()
3729 const LLT S32 = LLT::scalar(32); in handleD16VData()
3730 LLT StoreVT = MRI.getType(Reg); in handleD16VData()
3742 return B.buildBuildVector(LLT::fixed_vector(NumElts, S32), WideRegs) in handleD16VData()
3752 return B.buildBuildVector(LLT::fixed_vector(2, S32), PackedRegs) in handleD16VData()
3762 Reg = B.buildBuildVector(LLT::fixed_vector(6, S16), PackedRegs).getReg(0); in handleD16VData()
3763 return B.buildBitcast(LLT::fixed_vector(3, S32), Reg).getReg(0); in handleD16VData()
3768 Reg = B.buildBitcast(LLT::fixed_vector(2, S32), Reg).getReg(0); in handleD16VData()
3773 return B.buildBuildVector(LLT::fixed_vector(4, S32), PackedRegs) in handleD16VData()
3786 LLT Ty = MRI->getType(VData); in fixStoreSourceType()
3788 const LLT S16 = LLT::scalar(16); in fixStoreSourceType()
3791 if (Ty == LLT::scalar(8) || Ty == S16) { in fixStoreSourceType()
3792 Register AnyExt = B.buildAnyExt(LLT::scalar(32), VData).getReg(0); in fixStoreSourceType()
3812 LLT Ty = MRI.getType(VData); in legalizeBufferStore()
3813 LLT EltTy = Ty.getScalarType(); in legalizeBufferStore()
3815 const LLT S32 = LLT::scalar(32); in legalizeBufferStore()
3900 const LLT MemTy = MMO->getMemoryType(); in legalizeBufferLoad()
3901 const LLT S32 = LLT::scalar(32); in legalizeBufferLoad()
3932 LLT Ty = MRI.getType(Dst); in legalizeBufferLoad()
3933 LLT EltTy = Ty.getScalarType(); in legalizeBufferLoad()
3966 LLT UnpackedTy = Ty.changeElementSize(32); in legalizeBufferLoad()
4116 VIndex = B.buildConstant(LLT::scalar(32), 0).getReg(0); in legalizeBufferAtomic()
4159 const LLT S16 = LLT::scalar(16); in packImage16bitOpsToDwords()
4160 const LLT V2S16 = LLT::fixed_vector(2, 16); in packImage16bitOpsToDwords()
4205 const LLT S32 = LLT::scalar(32); in convertImageAddrToPacked()
4227 B.buildBuildVector(LLT::fixed_vector(NumAddrRegs, 32), AddrRegs); in convertImageAddrToPacked()
4266 const LLT S32 = LLT::scalar(32); in legalizeImageIntrinsic()
4267 const LLT S16 = LLT::scalar(16); in legalizeImageIntrinsic()
4268 const LLT V2S16 = LLT::fixed_vector(2, 16); in legalizeImageIntrinsic()
4273 LLT GradTy = in legalizeImageIntrinsic()
4275 LLT AddrTy = in legalizeImageIntrinsic()
4314 LLT Ty = MRI->getType(VData0); in legalizeImageIntrinsic()
4323 LLT PackedTy = LLT::fixed_vector(2, Ty); in legalizeImageIntrinsic()
4394 LLT PackedAddrTy = LLT::fixed_vector(2 * PackedRegs.size(), 16); in legalizeImageIntrinsic()
4446 LLT Ty = MRI->getType(VData); in legalizeImageIntrinsic()
4459 LLT Ty = MRI->getType(DstReg); in legalizeImageIntrinsic()
4460 const LLT EltTy = Ty.getScalarType(); in legalizeImageIntrinsic()
4472 const LLT AdjustedTy = in legalizeImageIntrinsic()
4478 LLT RoundedTy; in legalizeImageIntrinsic()
4481 LLT TFETy; in legalizeImageIntrinsic()
4484 LLT RegTy; in legalizeImageIntrinsic()
4488 LLT::scalarOrVector(ElementCount::getFixed(AdjustedNumElts), 32); in legalizeImageIntrinsic()
4489 TFETy = LLT::fixed_vector(AdjustedNumElts + 1, 32); in legalizeImageIntrinsic()
4495 RoundedTy = LLT::scalarOrVector( in legalizeImageIntrinsic()
4497 TFETy = LLT::fixed_vector(RoundedSize / 32 + 1, S32); in legalizeImageIntrinsic()
4513 const LLT LoadResultTy = IsTFE ? TFETy : RoundedTy; in legalizeImageIntrinsic()
4591 auto padWithUndef = [&](LLT Ty, int NumElts) { in legalizeImageIntrinsic()
4600 LLT ResTy = MRI->getType(ResultRegs[0]); in legalizeImageIntrinsic()
4611 const LLT V3S16 = LLT::fixed_vector(3, 16); in legalizeImageIntrinsic()
4614 auto Concat = B.buildConcatVectors(LLT::fixed_vector(6, 16), ResultRegs); in legalizeImageIntrinsic()
4630 LLT Ty = B.getMRI()->getType(Dst); in legalizeSBufferLoad()
4636 if (shouldBitcastLoadStoreType(ST, Ty, LLT::scalar(Size))) { in legalizeSBufferLoad()
4709 MRI.createGenericVirtualRegister(LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64)); in legalizeTrapHsaQueuePtr()
4755 const LLT S16 = LLT::scalar(16); in legalizeBVHIntrinsic()
4756 const LLT S32 = LLT::scalar(32); in legalizeBVHIntrinsic()