4157                                       const AMDGPU::ImageDimIntrinsicInfo *Intr,  in packImage16bitOpsToDwords()  argument
4161   auto EndIdx = Intr->VAddrEnd;  in packImage16bitOpsToDwords()
4163   for (unsigned I = Intr->VAddrStart; I < EndIdx; I++) {  in packImage16bitOpsToDwords()
4170     if ((I < Intr->GradientStart) ||  in packImage16bitOpsToDwords()
4171         (I >= Intr->GradientStart && I < Intr->CoordStart && !IsG16) ||  in packImage16bitOpsToDwords()
4172         (I >= Intr->CoordStart && !IsA16)) {  in packImage16bitOpsToDwords()
4180           ((Intr->NumGradients / 2) % 2 == 1 &&  in packImage16bitOpsToDwords()
4181            (I == static_cast<unsigned>(Intr->GradientStart +  in packImage16bitOpsToDwords()
4182                                        (Intr->NumGradients / 2) - 1) ||  in packImage16bitOpsToDwords()
4183             I == static_cast<unsigned>(Intr->GradientStart +  in packImage16bitOpsToDwords()
4184                                        Intr->NumGradients - 1))) ||  in packImage16bitOpsToDwords()
4253     const AMDGPU::ImageDimIntrinsicInfo *Intr) const {  in legalizeImageIntrinsic()
4263       AMDGPU::getMIMGBaseOpcodeInfo(Intr->BaseOpcode);  in legalizeImageIntrinsic()
4274       MRI->getType(MI.getOperand(ArgOffset + Intr->GradientStart).getReg());  in legalizeImageIntrinsic()
4276       MRI->getType(MI.getOperand(ArgOffset + Intr->CoordStart).getReg());  in legalizeImageIntrinsic()
4282     DMask = MI.getOperand(ArgOffset + Intr->DMaskIndex).getImm();  in legalizeImageIntrinsic()
4309     MI.getOperand(ArgOffset + Intr->DMaskIndex).setImm(DMask);  in legalizeImageIntrinsic()
4330   unsigned CorrectedNumVAddrs = Intr->NumVAddrs;  in legalizeImageIntrinsic()
4334           AMDGPU::getMIMGLZMappingInfo(Intr->BaseOpcode)) {  in legalizeImageIntrinsic()
4337     if (mi_match(MI.getOperand(ArgOffset + Intr->LodIndex).getReg(), *MRI,  in legalizeImageIntrinsic()
4343                                                       Intr->Dim);  in legalizeImageIntrinsic()
4349             .setIntrinsicID(static_cast<Intrinsic::ID>(NewImageDimIntr->Intr));  in legalizeImageIntrinsic()
4350         MI.RemoveOperand(ArgOffset + Intr->LodIndex);  in legalizeImageIntrinsic()
4351         Intr = NewImageDimIntr;  in legalizeImageIntrinsic()
4357   if (AMDGPU::getMIMGMIPMappingInfo(Intr->BaseOpcode)) {  in legalizeImageIntrinsic()
4359     if (mi_match(MI.getOperand(ArgOffset + Intr->MipIndex).getReg(), *MRI,  in legalizeImageIntrinsic()
4364         MI.getOperand(ArgOffset + Intr->MipIndex).ChangeToImmediate(0);  in legalizeImageIntrinsic()
4383     if (Intr->NumVAddrs > 1) {  in legalizeImageIntrinsic()
4386       packImage16bitOpsToDwords(B, MI, PackedRegs, ArgOffset, Intr, IsA16,  in legalizeImageIntrinsic()
4401       for (unsigned I = Intr->VAddrStart; I < Intr->VAddrEnd; I++) {  in legalizeImageIntrinsic()
4410         if (I - Intr->VAddrStart < NumPacked)  in legalizeImageIntrinsic()
4411           SrcOp.setReg(PackedRegs[I - Intr->VAddrStart]);  in legalizeImageIntrinsic()
4431     if (!UseNSA && Intr->NumVAddrs > 1)  in legalizeImageIntrinsic()
4432       convertImageAddrToPacked(B, MI, ArgOffset + Intr->VAddrStart,  in legalizeImageIntrinsic()
4433                                Intr->NumVAddrs);  in legalizeImageIntrinsic()