111   return RBI.constrainGenericRegister(Dst.getReg(), *DstRC, *MRI) &&  in constrainCopyLikeIntrin()
112          RBI.constrainGenericRegister(Src.getReg(), *SrcRC, *MRI);  in constrainCopyLikeIntrin()
131       return RBI.constrainGenericRegister(DstReg, *RC, *MRI);  in selectCOPY()
136       if (!RBI.constrainGenericRegister(DstReg, *TRI.getBoolRC(), *MRI))  in selectCOPY()
174     if (RC && !RBI.constrainGenericRegister(DstReg, *RC, *MRI))  in selectCOPY()
188     RBI.constrainGenericRegister(MO.getReg(), *RC, *MRI);  in selectCOPY()
228   return RBI.constrainGenericRegister(DefReg, *DefRC, *MRI);  in selectPHI()
394   if (!RBI.constrainGenericRegister(DstReg, RC, *MRI))  in selectG_ADD_SUB()
443   if (!RBI.constrainGenericRegister(Dst0Reg, AMDGPU::SReg_32RegClass, *MRI) ||  in selectG_UADDO_USUBO_UADDE_USUBE()
444       !RBI.constrainGenericRegister(Src0Reg, AMDGPU::SReg_32RegClass, *MRI) ||  in selectG_UADDO_USUBO_UADDE_USUBE()
445       !RBI.constrainGenericRegister(Src1Reg, AMDGPU::SReg_32RegClass, *MRI))  in selectG_UADDO_USUBO_UADDE_USUBE()
449       !RBI.constrainGenericRegister(I.getOperand(4).getReg(),  in selectG_UADDO_USUBO_UADDE_USUBE()
479   if (!DstRC || !RBI.constrainGenericRegister(DstReg, *DstRC, *MRI))  in selectG_EXTRACT()
531     if (SrcRC && !RBI.constrainGenericRegister(Src.getReg(), *SrcRC, *MRI))  in selectG_MERGE_VALUES()
535   if (!RBI.constrainGenericRegister(DstReg, *DstRC, *MRI))  in selectG_MERGE_VALUES()
560   if (!SrcRC || !RBI.constrainGenericRegister(SrcReg, *SrcRC, *MRI))  in selectG_UNMERGE_VALUES()
574     if (!SrcRC || !RBI.constrainGenericRegister(SrcReg, *SrcRC, *MRI))  in selectG_UNMERGE_VALUES()
579     if (DstRC && !RBI.constrainGenericRegister(Dst.getReg(), *DstRC, *MRI))  in selectG_UNMERGE_VALUES()
625       return RBI.constrainGenericRegister(Dst, AMDGPU::SReg_32RegClass, *MRI);  in selectG_BUILD_VECTOR_TRUNC()
635     return RBI.constrainGenericRegister(Dst, AMDGPU::SReg_32RegClass, *MRI) &&  in selectG_BUILD_VECTOR_TRUNC()
636            RBI.constrainGenericRegister(Src0, AMDGPU::SReg_32RegClass, *MRI);  in selectG_BUILD_VECTOR_TRUNC()
691       (RC && RBI.constrainGenericRegister(MO.getReg(), *RC, *MRI))) {  in selectG_IMPLICIT_DEF()
743   if (!RBI.constrainGenericRegister(DstReg, *DstRC, *MRI) ||  in selectG_INSERT()
744       !RBI.constrainGenericRegister(Src0Reg, *Src0RC, *MRI) ||  in selectG_INSERT()
745       !RBI.constrainGenericRegister(Src1Reg, *Src1RC, *MRI))  in selectG_INSERT()
789   if (!RBI.constrainGenericRegister(M0Val, AMDGPU::SReg_32RegClass, *MRI) ||  in selectInterpP1F16()
790       !RBI.constrainGenericRegister(Dst, AMDGPU::VGPR_32RegClass, *MRI) ||  in selectInterpP1F16()
791       !RBI.constrainGenericRegister(Src0, AMDGPU::VGPR_32RegClass, *MRI))  in selectInterpP1F16()
870       RBI.constrainGenericRegister(LaneSelect, AMDGPU::SReg_32_XM0RegClass, *MRI);  in selectWritelane()
1074         RBI.constrainGenericRegister(CCReg, AMDGPU::SReg_32RegClass, *MRI);  in selectG_ICMP()
1087   RBI.constrainGenericRegister(ICmp->getOperand(0).getReg(),  in selectG_ICMP()
1115   RBI.constrainGenericRegister(ICmp->getOperand(0).getReg(), *TRI.getBoolRC(),  in selectIntrinsicIcmp()
1159   if (!DstRC || !RBI.constrainGenericRegister(DstReg, *DstRC, *MRI))  in selectRelocConstant()
1218       !RBI.constrainGenericRegister(DstReg, *RC, *MRI))  in selectReturnAddress()
1313   if (!RBI.constrainGenericRegister(M0Val, AMDGPU::SReg_32RegClass, *MRI))  in selectDSOrderedIntrinsic()
1390       if (!RBI.constrainGenericRegister(BaseOffset, AMDGPU::VGPR_32RegClass, *MRI))  in selectDSGWSIntrinsic()
1396       if (!RBI.constrainGenericRegister(BaseOffset,  in selectDSGWSIntrinsic()
1435     if (!RBI.constrainGenericRegister(VSrc, AMDGPU::VGPR_32RegClass, *MRI))  in selectDSGWSIntrinsic()
1467   if (!RBI.constrainGenericRegister(PtrBase, AMDGPU::SReg_32RegClass, *MRI))  in selectDSAppendConsume()
1904   if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, *MRI) ||  in selectG_TRUNC()
1905       !RBI.constrainGenericRegister(DstReg, *DstRC, *MRI)) {  in selectG_TRUNC()
1982       if (!RBI.constrainGenericRegister(SrcReg, *SrcWithSubRC, *MRI))  in selectG_TRUNC()
2053     return RBI.constrainGenericRegister(DstReg, *DstRC, *MRI) &&  in selectG_SZA_EXT()
2054            RBI.constrainGenericRegister(SrcReg, *SrcRC, *MRI);  in selectG_SZA_EXT()
2084     if (!RBI.constrainGenericRegister(SrcReg, SrcRC, *MRI))  in selectG_SZA_EXT()
2093       return RBI.constrainGenericRegister(DstReg, AMDGPU::SReg_32RegClass, *MRI);  in selectG_SZA_EXT()
2118       return RBI.constrainGenericRegister(DstReg, AMDGPU::SReg_64RegClass, *MRI);  in selectG_SZA_EXT()
2133     return RBI.constrainGenericRegister(DstReg, AMDGPU::SReg_32RegClass, *MRI);  in selectG_SZA_EXT()
2211   return RBI.constrainGenericRegister(DstReg, *DstRC, *MRI);  in selectG_CONSTANT()
2237   if (!RBI.constrainGenericRegister(Src, AMDGPU::SReg_64RegClass, *MRI) ||  in selectG_FNEG()
2238       !RBI.constrainGenericRegister(Dst, AMDGPU::SReg_64RegClass, *MRI))  in selectG_FNEG()
2285   if (!RBI.constrainGenericRegister(Src, AMDGPU::SReg_64RegClass, *MRI) ||  in selectG_FABS()
2286       !RBI.constrainGenericRegister(Dst, AMDGPU::SReg_64RegClass, *MRI))  in selectG_FABS()
2522   return RBI.constrainGenericRegister(  in selectG_GLOBAL_VALUE()
2551   if (!RBI.constrainGenericRegister(DstReg, *DstRC, *MRI) ||  in selectG_PTRMASK()
2552       !RBI.constrainGenericRegister(SrcReg, *SrcRC, *MRI) ||  in selectG_PTRMASK()
2553       !RBI.constrainGenericRegister(MaskReg, *MaskRC, *MRI))  in selectG_PTRMASK()
2676   if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, *MRI) ||  in selectG_EXTRACT_VECTOR_ELT()
2677       !RBI.constrainGenericRegister(DstReg, *DstRC, *MRI) ||  in selectG_EXTRACT_VECTOR_ELT()
2678       !RBI.constrainGenericRegister(IdxReg, AMDGPU::SReg_32RegClass, *MRI))  in selectG_EXTRACT_VECTOR_ELT()
2757   if (!RBI.constrainGenericRegister(VecReg, *VecRC, *MRI) ||  in selectG_INSERT_VECTOR_ELT()
2758       !RBI.constrainGenericRegister(DstReg, *VecRC, *MRI) ||  in selectG_INSERT_VECTOR_ELT()
2759       !RBI.constrainGenericRegister(ValReg, *ValRC, *MRI) ||  in selectG_INSERT_VECTOR_ELT()
2760       !RBI.constrainGenericRegister(IdxReg, AMDGPU::SReg_32RegClass, *MRI))  in selectG_INSERT_VECTOR_ELT()
2863     return RBI.constrainGenericRegister(DstReg, RC, *MRI);  in selectG_SHUFFLE_VECTOR()
2870   if (!RBI.constrainGenericRegister(DstReg, RC, *MRI) ||  in selectG_SHUFFLE_VECTOR()
2871       !RBI.constrainGenericRegister(SrcVec, RC, *MRI))  in selectG_SHUFFLE_VECTOR()