Lines Matching refs:VAddr
2428 Register VAddr, RSrcReg, SOffset; in selectG_AMDGPU_ATOMIC_CMPXCHG() local
2435 } else if (selectMUBUFAddr64Impl(MI.getOperand(1), VAddr, in selectG_AMDGPU_ATOMIC_CMPXCHG()
2445 if (VAddr) in selectG_AMDGPU_ATOMIC_CMPXCHG()
2446 MIB.addReg(VAddr); in selectG_AMDGPU_ATOMIC_CMPXCHG()
3778 Register VAddr = Root.getReg(); in selectMUBUFScratchOffen() local
3782 std::tie(PtrBase, ConstOffset) = getPtrBaseWithConstantOffset(VAddr, *MRI); in selectMUBUFScratchOffen()
3791 VAddr = PtrBase; in selectMUBUFScratchOffen()
3806 MIB.addReg(VAddr); in selectMUBUFScratchOffen()
4113 MachineOperand &Root, Register &VAddr, Register &RSrcReg, in selectMUBUFAddr64Impl() argument
4138 VAddr = N0; in selectMUBUFAddr64Impl()
4141 VAddr = N2; in selectMUBUFAddr64Impl()
4146 VAddr = N3; in selectMUBUFAddr64Impl()
4150 VAddr = N0; in selectMUBUFAddr64Impl()
4190 Register VAddr; in selectMUBUFAddr64() local
4195 if (!selectMUBUFAddr64Impl(Root, VAddr, RSrcReg, SOffset, Offset)) in selectMUBUFAddr64()
4205 MIB.addReg(VAddr); in selectMUBUFAddr64()
4250 Register VAddr; in selectMUBUFAddr64Atomic() local
4255 if (!selectMUBUFAddr64Impl(Root, VAddr, RSrcReg, SOffset, Offset)) in selectMUBUFAddr64Atomic()
4265 MIB.addReg(VAddr); in selectMUBUFAddr64Atomic()