Lines Matching refs:SOffset

2428   Register VAddr, RSrcReg, SOffset;  in selectG_AMDGPU_ATOMIC_CMPXCHG()  local
2432 if (selectMUBUFOffsetImpl(MI.getOperand(1), RSrcReg, SOffset, Offset)) { in selectG_AMDGPU_ATOMIC_CMPXCHG()
2436 RSrcReg, SOffset, Offset)) { in selectG_AMDGPU_ATOMIC_CMPXCHG()
2449 if (SOffset) in selectG_AMDGPU_ATOMIC_CMPXCHG()
2450 MIB.addReg(SOffset); in selectG_AMDGPU_ATOMIC_CMPXCHG()
2984 MachineOperand &SOffset = MI.getOperand(5); in selectAMDGPU_BUFFER_ATOMIC_FADD() local
3036 I.add(SOffset); in selectAMDGPU_BUFFER_ATOMIC_FADD()
4100 MachineIRBuilder &B, Register &SOffset, int64_t &ImmOffset) const { in splitIllegalMUBUFOffset() argument
4105 SOffset = MRI->createVirtualRegister(&AMDGPU::SReg_32RegClass); in splitIllegalMUBUFOffset()
4107 .addDef(SOffset) in splitIllegalMUBUFOffset()
4114 Register &SOffset, int64_t &Offset) const { in selectMUBUFAddr64Impl() argument
4159 splitIllegalMUBUFOffset(B, SOffset, Offset); in selectMUBUFAddr64Impl()
4164 MachineOperand &Root, Register &RSrcReg, Register &SOffset, in selectMUBUFOffsetImpl() argument
4184 splitIllegalMUBUFOffset(B, SOffset, Offset); in selectMUBUFOffsetImpl()
4192 Register SOffset; in selectMUBUFAddr64() local
4195 if (!selectMUBUFAddr64Impl(Root, VAddr, RSrcReg, SOffset, Offset)) in selectMUBUFAddr64()
4208 if (SOffset) in selectMUBUFAddr64()
4209 MIB.addReg(SOffset); in selectMUBUFAddr64()
4225 Register SOffset; in selectMUBUFOffset() local
4228 if (!selectMUBUFOffsetImpl(Root, RSrcReg, SOffset, Offset)) in selectMUBUFOffset()
4236 if (SOffset) in selectMUBUFOffset()
4237 MIB.addReg(SOffset); in selectMUBUFOffset()
4252 Register SOffset; in selectMUBUFAddr64Atomic() local
4255 if (!selectMUBUFAddr64Impl(Root, VAddr, RSrcReg, SOffset, Offset)) in selectMUBUFAddr64Atomic()
4268 if (SOffset) in selectMUBUFAddr64Atomic()
4269 MIB.addReg(SOffset); in selectMUBUFAddr64Atomic()
4285 Register SOffset; in selectMUBUFOffsetAtomic() local
4288 if (!selectMUBUFOffsetImpl(Root, RSrcReg, SOffset, Offset)) in selectMUBUFOffsetAtomic()
4296 if (SOffset) in selectMUBUFOffsetAtomic()
4297 MIB.addReg(SOffset); in selectMUBUFOffsetAtomic()