Lines Matching refs:AddrDef
3626 auto AddrDef = getDefSrcRegIgnoringCopies(Addr, *MRI); in selectGlobalSAddr() local
3627 if (!AddrDef) in selectGlobalSAddr()
3631 if (AddrDef->MI->getOpcode() == AMDGPU::G_PTR_ADD) { in selectGlobalSAddr()
3634 getSrcRegIgnoringCopies(AddrDef->MI->getOperand(1).getReg(), *MRI); in selectGlobalSAddr()
3637 Register PtrBaseOffset = AddrDef->MI->getOperand(2).getReg(); in selectGlobalSAddr()
3657 if (AddrDef->MI->getOpcode() == AMDGPU::G_IMPLICIT_DEF || in selectGlobalSAddr()
3658 AddrDef->MI->getOpcode() == AMDGPU::G_CONSTANT || !isSGPR(AddrDef->Reg)) in selectGlobalSAddr()
3671 [=](MachineInstrBuilder &MIB) { MIB.addReg(AddrDef->Reg); }, // saddr in selectGlobalSAddr()
3695 auto AddrDef = getDefSrcRegIgnoringCopies(Addr, *MRI); in selectScratchSAddr() local
3696 if (!AddrDef) in selectScratchSAddr()
3699 if (AddrDef->MI->getOpcode() == AMDGPU::G_FRAME_INDEX) { in selectScratchSAddr()
3700 int FI = AddrDef->MI->getOperand(1).getIndex(); in selectScratchSAddr()
3707 Register SAddr = AddrDef->Reg; in selectScratchSAddr()
3709 if (AddrDef->MI->getOpcode() == AMDGPU::G_PTR_ADD) { in selectScratchSAddr()
3710 Register LHS = AddrDef->MI->getOperand(1).getReg(); in selectScratchSAddr()
3711 Register RHS = AddrDef->MI->getOperand(2).getReg(); in selectScratchSAddr()