45 AMDGPUInstructionSelector::AMDGPUInstructionSelector(  in AMDGPUInstructionSelector()  function in AMDGPUInstructionSelector
61 const char *AMDGPUInstructionSelector::getName() { return DEBUG_TYPE; }  in getName()
63 void AMDGPUInstructionSelector::setupMF(MachineFunction &MF, GISelKnownBits *KB,  in setupMF()
72 bool AMDGPUInstructionSelector::isVCC(Register Reg,  in isVCC()
91 bool AMDGPUInstructionSelector::constrainCopyLikeIntrin(MachineInstr &MI,  in constrainCopyLikeIntrin()
115 bool AMDGPUInstructionSelector::selectCOPY(MachineInstr &I) const {  in selectCOPY()
193 bool AMDGPUInstructionSelector::selectPHI(MachineInstr &I) const {  in selectPHI()
232 AMDGPUInstructionSelector::getSubOperand64(MachineOperand &MO,  in getSubOperand64()
279 bool AMDGPUInstructionSelector::selectG_AND_OR_XOR(MachineInstr &I) const {  in selectG_AND_OR_XOR()
300 bool AMDGPUInstructionSelector::selectG_ADD_SUB(MachineInstr &I) const {  in selectG_ADD_SUB()
401 bool AMDGPUInstructionSelector::selectG_UADDO_USUBO_UADDE_USUBE(  in selectG_UADDO_USUBO_UADDE_USUBE()
458 bool AMDGPUInstructionSelector::selectG_EXTRACT(MachineInstr &I) const {  in selectG_EXTRACT()
503 bool AMDGPUInstructionSelector::selectG_MERGE_VALUES(MachineInstr &MI) const {  in selectG_MERGE_VALUES()
542 bool AMDGPUInstructionSelector::selectG_UNMERGE_VALUES(MachineInstr &MI) const {  in selectG_UNMERGE_VALUES()
587 bool AMDGPUInstructionSelector::selectG_BUILD_VECTOR_TRUNC(  in selectG_BUILD_VECTOR_TRUNC()
680 bool AMDGPUInstructionSelector::selectG_PTR_ADD(MachineInstr &I) const {  in selectG_PTR_ADD()
684 bool AMDGPUInstructionSelector::selectG_IMPLICIT_DEF(MachineInstr &I) const {  in selectG_IMPLICIT_DEF()
699 bool AMDGPUInstructionSelector::selectG_INSERT(MachineInstr &I) const {  in selectG_INSERT()
758 bool AMDGPUInstructionSelector::selectG_SBFX_UBFX(MachineInstr &MI) const {  in selectG_SBFX_UBFX()
782 bool AMDGPUInstructionSelector::selectInterpP1F16(MachineInstr &MI) const {  in selectInterpP1F16()
832 bool AMDGPUInstructionSelector::selectWritelane(MachineInstr &MI) const {  in selectWritelane()
886 bool AMDGPUInstructionSelector::selectDivScale(MachineInstr &MI) const {  in selectDivScale()
925 bool AMDGPUInstructionSelector::selectG_INTRINSIC(MachineInstr &I) const {  in selectG_INTRINSIC()
1008 int AMDGPUInstructionSelector::getS_CMPOpcode(CmpInst::Predicate P,  in getS_CMPOpcode()
1053 bool AMDGPUInstructionSelector::selectG_ICMP(MachineInstr &I) const {  in selectG_ICMP()
1094 bool AMDGPUInstructionSelector::selectIntrinsicIcmp(MachineInstr &I) const {  in selectIntrinsicIcmp()
1122 bool AMDGPUInstructionSelector::selectBallot(MachineInstr &I) const {  in selectBallot()
1154 bool AMDGPUInstructionSelector::selectRelocConstant(MachineInstr &I) const {  in selectRelocConstant()
1179 bool AMDGPUInstructionSelector::selectGroupStaticSize(MachineInstr &I) const {  in selectGroupStaticSize()
1206 bool AMDGPUInstructionSelector::selectReturnAddress(MachineInstr &I) const {  in selectReturnAddress()
1244 bool AMDGPUInstructionSelector::selectEndCfIntrinsic(MachineInstr &MI) const {  in selectEndCfIntrinsic()
1259 bool AMDGPUInstructionSelector::selectDSOrderedIntrinsic(  in selectDSOrderedIntrinsic()
1340 bool AMDGPUInstructionSelector::selectDSGWSIntrinsic(MachineInstr &MI,  in selectDSGWSIntrinsic()
1446 bool AMDGPUInstructionSelector::selectDSAppendConsume(MachineInstr &MI,  in selectDSAppendConsume()
1478 bool AMDGPUInstructionSelector::selectSBarrier(MachineInstr &MI) const {  in selectSBarrier()
1505 bool AMDGPUInstructionSelector::selectImageIntrinsic(  in selectImageIntrinsic()
1772 bool AMDGPUInstructionSelector::selectG_INTRINSIC_W_SIDE_EFFECTS(  in selectG_INTRINSIC_W_SIDE_EFFECTS()
1802 bool AMDGPUInstructionSelector::selectG_SELECT(MachineInstr &I) const {  in selectG_SELECT()
1873 bool AMDGPUInstructionSelector::selectG_TRUNC(MachineInstr &I) const {  in selectG_TRUNC()
2001 const RegisterBank *AMDGPUInstructionSelector::getArtifactRegBank(  in getArtifactRegBank()
2014 bool AMDGPUInstructionSelector::selectG_SZA_EXT(MachineInstr &I) const {  in selectG_SZA_EXT()
2139 bool AMDGPUInstructionSelector::selectG_CONSTANT(MachineInstr &I) const {  in selectG_CONSTANT()
2214 bool AMDGPUInstructionSelector::selectG_FNEG(MachineInstr &MI) const {  in selectG_FNEG()
2270 bool AMDGPUInstructionSelector::selectG_FABS(MachineInstr &MI) const {  in selectG_FABS()
2315 void AMDGPUInstructionSelector::getAddrModeInfo(const MachineInstr &Load,  in getAddrModeInfo()
2349 bool AMDGPUInstructionSelector::isSGPR(Register Reg) const {  in isSGPR()
2353 bool AMDGPUInstructionSelector::isInstrUniform(const MachineInstr &MI) const {  in isInstrUniform()
2375 bool AMDGPUInstructionSelector::hasVgprParts(ArrayRef<GEPInfo> AddrInfo) const {  in hasVgprParts()
2383 void AMDGPUInstructionSelector::initM0(MachineInstr &I) const {  in initM0()
2396 bool AMDGPUInstructionSelector::selectG_LOAD_STORE_ATOMICRMW(  in selectG_LOAD_STORE_ATOMICRMW()
2410 bool AMDGPUInstructionSelector::selectG_AMDGPU_ATOMIC_CMPXCHG(  in selectG_AMDGPU_ATOMIC_CMPXCHG()
2468 bool AMDGPUInstructionSelector::selectG_BRCOND(MachineInstr &I) const {  in selectG_BRCOND()
2513 bool AMDGPUInstructionSelector::selectG_GLOBAL_VALUE(  in selectG_GLOBAL_VALUE()
2526 bool AMDGPUInstructionSelector::selectG_PTRMASK(MachineInstr &I) const {  in selectG_PTRMASK()
2652 bool AMDGPUInstructionSelector::selectG_EXTRACT_VECTOR_ELT(  in selectG_EXTRACT_VECTOR_ELT()
2729 bool AMDGPUInstructionSelector::selectG_INSERT_VECTOR_ELT(  in selectG_INSERT_VECTOR_ELT()
2833 bool AMDGPUInstructionSelector::selectG_SHUFFLE_VECTOR(  in selectG_SHUFFLE_VECTOR()
2961 bool AMDGPUInstructionSelector::selectAMDGPU_BUFFER_ATOMIC_FADD(  in selectAMDGPU_BUFFER_ATOMIC_FADD()
3046 bool AMDGPUInstructionSelector::selectGlobalAtomicFadd(  in selectGlobalAtomicFadd()
3086 bool AMDGPUInstructionSelector::selectBVHIntrinsic(MachineInstr &MI) const{  in selectBVHIntrinsic()
3093 bool AMDGPUInstructionSelector::select(MachineInstr &I) {  in select()
3226 AMDGPUInstructionSelector::selectVCSRC(MachineOperand &Root) const {  in selectVCSRC()
3234 AMDGPUInstructionSelector::selectVOP3ModsImpl(MachineOperand &Root,  in selectVOP3ModsImpl()
3273 AMDGPUInstructionSelector::selectVSRC0(MachineOperand &Root) const {  in selectVSRC0()
3280 AMDGPUInstructionSelector::selectVOP3Mods0(MachineOperand &Root) const {  in selectVOP3Mods0()
3294 AMDGPUInstructionSelector::selectVOP3BMods0(MachineOperand &Root) const {  in selectVOP3BMods0()
3308 AMDGPUInstructionSelector::selectVOP3OMods(MachineOperand &Root) const {  in selectVOP3OMods()
3317 AMDGPUInstructionSelector::selectVOP3Mods(MachineOperand &Root) const {  in selectVOP3Mods()
3329 AMDGPUInstructionSelector::selectVOP3BMods(MachineOperand &Root) const {  in selectVOP3BMods()
3341 AMDGPUInstructionSelector::selectVOP3NoMods(MachineOperand &Root) const {  in selectVOP3NoMods()
3353 AMDGPUInstructionSelector::selectVOP3PModsImpl(  in selectVOP3PModsImpl()
3376 AMDGPUInstructionSelector::selectVOP3PMods(MachineOperand &Root) const {  in selectVOP3PMods()
3391 AMDGPUInstructionSelector::selectVOP3Mods_nnan(MachineOperand &Root) const {  in selectVOP3Mods_nnan()
3405 AMDGPUInstructionSelector::selectVOP3OpSelMods(MachineOperand &Root) const {  in selectVOP3OpSelMods()
3414 AMDGPUInstructionSelector::selectSmrdImm(MachineOperand &Root) const {  in selectSmrdImm()
3435 AMDGPUInstructionSelector::selectSmrdImm32(MachineOperand &Root) const {  in selectSmrdImm32()
3456 AMDGPUInstructionSelector::selectSmrdSgpr(MachineOperand &Root) const {  in selectSmrdSgpr()
3488 AMDGPUInstructionSelector::selectFlatOffsetImpl(MachineOperand &Root,  in selectFlatOffsetImpl()
3512 AMDGPUInstructionSelector::selectFlatOffset(MachineOperand &Root) const {  in selectFlatOffset()
3522 AMDGPUInstructionSelector::selectGlobalOffset(MachineOperand &Root) const {  in selectGlobalOffset()
3532 AMDGPUInstructionSelector::selectScratchOffset(MachineOperand &Root) const {  in selectScratchOffset()
3561 AMDGPUInstructionSelector::selectGlobalSAddr(MachineOperand &Root) const {  in selectGlobalSAddr()
3678 AMDGPUInstructionSelector::selectScratchSAddr(MachineOperand &Root) const {  in selectScratchSAddr()
3740 AMDGPUInstructionSelector::selectMUBUFScratchOffen(MachineOperand &Root) const {  in selectMUBUFScratchOffen()
3818 bool AMDGPUInstructionSelector::isDSOffsetLegal(Register Base,  in isDSOffsetLegal()
3831 bool AMDGPUInstructionSelector::isDSOffset2Legal(Register Base, int64_t Offset0,  in isDSOffset2Legal()
3848 AMDGPUInstructionSelector::selectMUBUFScratchOffset(  in selectMUBUFScratchOffset()
3873 AMDGPUInstructionSelector::selectDS1Addr1OffsetImpl(MachineOperand &Root) const {  in selectDS1Addr1OffsetImpl()
3903 AMDGPUInstructionSelector::selectDS1Addr1Offset(MachineOperand &Root) const {  in selectDS1Addr1Offset()
3914 AMDGPUInstructionSelector::selectDS64Bit4ByteAligned(MachineOperand &Root) const {  in selectDS64Bit4ByteAligned()
3919 AMDGPUInstructionSelector::selectDS128Bit8ByteAligned(MachineOperand &Root) const {  in selectDS128Bit8ByteAligned()
3924 AMDGPUInstructionSelector::selectDSReadWrite2(MachineOperand &Root,  in selectDSReadWrite2()
3937 AMDGPUInstructionSelector::selectDSReadWrite2Impl(MachineOperand &Root,  in selectDSReadWrite2Impl()
3973 AMDGPUInstructionSelector::getPtrBaseWithConstantOffset(  in getPtrBaseWithConstantOffset()
4054 AMDGPUInstructionSelector::MUBUFAddressData
4055 AMDGPUInstructionSelector::parseMUBUFAddress(Register Src) const {  in parseMUBUFAddress()
4086 bool AMDGPUInstructionSelector::shouldUseAddr64(MUBUFAddressData Addr) const {  in shouldUseAddr64()
4099 void AMDGPUInstructionSelector::splitIllegalMUBUFOffset(  in splitIllegalMUBUFOffset()
4112 bool AMDGPUInstructionSelector::selectMUBUFAddr64Impl(  in selectMUBUFAddr64Impl()
4163 bool AMDGPUInstructionSelector::selectMUBUFOffsetImpl(  in selectMUBUFOffsetImpl()
4189 AMDGPUInstructionSelector::selectMUBUFAddr64(MachineOperand &Root) const {  in selectMUBUFAddr64()
4223 AMDGPUInstructionSelector::selectMUBUFOffset(MachineOperand &Root) const {  in selectMUBUFOffset()
4249 AMDGPUInstructionSelector::selectMUBUFAddr64Atomic(MachineOperand &Root) const {  in selectMUBUFAddr64Atomic()
4283 AMDGPUInstructionSelector::selectMUBUFOffsetAtomic(MachineOperand &Root) const {  in selectMUBUFOffsetAtomic()
4317 AMDGPUInstructionSelector::selectSMRDBufferImm(MachineOperand &Root) const {  in selectSMRDBufferImm()
4331 AMDGPUInstructionSelector::selectSMRDBufferImm32(MachineOperand &Root) const {  in selectSMRDBufferImm32()
4346 void AMDGPUInstructionSelector::renderTruncImm32(MachineInstrBuilder &MIB,  in renderTruncImm32()
4354 void AMDGPUInstructionSelector::renderNegateImm(MachineInstrBuilder &MIB,  in renderNegateImm()
4362 void AMDGPUInstructionSelector::renderBitcastImm(MachineInstrBuilder &MIB,  in renderBitcastImm()
4376 void AMDGPUInstructionSelector::renderPopcntImm(MachineInstrBuilder &MIB,  in renderPopcntImm()
4386 void AMDGPUInstructionSelector::renderTruncTImm(MachineInstrBuilder &MIB,  in renderTruncTImm()
4392 void AMDGPUInstructionSelector::renderExtractCPol(MachineInstrBuilder &MIB,  in renderExtractCPol()
4399 void AMDGPUInstructionSelector::renderExtractSWZ(MachineInstrBuilder &MIB,  in renderExtractSWZ()
4406 void AMDGPUInstructionSelector::renderSetGLC(MachineInstrBuilder &MIB,  in renderSetGLC()
4413 void AMDGPUInstructionSelector::renderFrameIndex(MachineInstrBuilder &MIB,  in renderFrameIndex()
4419 bool AMDGPUInstructionSelector::isInlineImmediate16(int64_t Imm) const {  in isInlineImmediate16()
4423 bool AMDGPUInstructionSelector::isInlineImmediate32(int64_t Imm) const {  in isInlineImmediate32()
4427 bool AMDGPUInstructionSelector::isInlineImmediate64(int64_t Imm) const {  in isInlineImmediate64()
4431 bool AMDGPUInstructionSelector::isInlineImmediate(const APFloat &Imm) const {  in isInlineImmediate()