Lines Matching refs:src2

228 //  src1 = Denominator, src2 = Numerator).
234 // Denominator, src2 = Numerator).
323   SDTCisSameAs<4, 2>, // f32 src2
394 def AMDGPUfmed3 : PatFrags<(ops node:$src0, node:$src1, node:$src2),
395   [(int_amdgcn_fmed3 node:$src0, node:$src1, node:$src2),
396    (AMDGPUfmed3_impl node:$src0, node:$src1, node:$src2)]>;
398 def AMDGPUdiv_fixup : PatFrags<(ops node:$src0, node:$src1, node:$src2),
399   [(int_amdgcn_div_fixup node:$src0, node:$src1, node:$src2),
400    (AMDGPUdiv_fixup_impl node:$src0, node:$src1, node:$src2)]>;
434 def AMDGPUfmad_ftz : PatFrags<(ops node:$src0, node:$src1, node:$src2),
435   [(int_amdgcn_fmad_ftz node:$src0, node:$src1, node:$src2),
436    (AMDGPUfmad_ftz_impl node:$src0, node:$src1, node:$src2)]>;
446 def AMDGPUbfe_i32 : PatFrags<(ops node:$src0, node:$src1, node:$src2),
447   [(int_amdgcn_sbfe node:$src0, node:$src1, node:$src2),
448    (AMDGPUbfe_i32_impl node:$src0, node:$src1, node:$src2)]>;
450 def AMDGPUbfe_u32 : PatFrags<(ops node:$src0, node:$src1, node:$src2),
451   [(int_amdgcn_ubfe node:$src0, node:$src1, node:$src2),
452    (AMDGPUbfe_u32_impl node:$src0, node:$src1, node:$src2)]>;
458 def AMDGPUfdot2 : PatFrags<(ops node:$src0, node:$src1, node:$src2, node:$clamp),
459   [(int_amdgcn_fdot2 node:$src0, node:$src1, node:$src2, node:$clamp),
460    (AMDGPUfdot2_impl node:$src0, node:$src1, node:$src2, node:$clamp)]>;
462 def AMDGPUdiv_fmas : PatFrags<(ops node:$src0, node:$src1, node:$src2, node:$vcc),
463   [(int_amdgcn_div_fmas node:$src0, node:$src1, node:$src2, node:$vcc),
464    (AMDGPUdiv_fmas_impl node:$src0, node:$src1, node:$src2, node:$vcc)]>;
466 def AMDGPUperm : PatFrags<(ops node:$src0, node:$src1, node:$src2),
467   [(int_amdgcn_perm node:$src0, node:$src1, node:$src2),
468    (AMDGPUperm_impl node:$src0, node:$src1, node:$src2)]>;