Lines Matching refs:SDNode
77 static SDNode *packConstantV2I16(const SDNode *N, SelectionDAG &DAG, in packConstantV2I16()
94 static SDNode *packNegConstantV2I16(const SDNode *N, SelectionDAG &DAG) { in packNegConstantV2I16()
132 bool matchLoadD16FromBuildVector(SDNode *N) const;
136 void Select(SDNode *N) override;
141 void SelectBuildVector(SDNode *N, unsigned RegClassID);
146 bool isInlineImmediate(const SDNode *N, bool Negated = false) const;
147 bool isNegInlineImmediate(const SDNode *N) const { in isNegInlineImmediate()
167 bool isVGPRImm(const SDNode *N) const;
168 bool isUniformLoad(const SDNode *N) const;
169 bool isUniformBr(const SDNode *N) const;
176 SDNode *glueCopyToOp(SDNode *N, SDValue NewChain, SDValue Glue) const;
177 SDNode *glueCopyToM0(SDNode *N, SDValue Val) const;
178 SDNode *glueCopyToM0LDSInit(SDNode *N) const;
180 const TargetRegisterClass *getOperandRegClass(SDNode *N, unsigned OpNo) const;
198 bool SelectMUBUFScratchOffen(SDNode *Parent,
201 bool SelectMUBUFScratchOffset(SDNode *Parent,
208 bool SelectFlatOffsetImpl(SDNode *N, SDValue Addr, SDValue &VAddr,
210 bool SelectFlatOffset(SDNode *N, SDValue Addr, SDValue &VAddr,
212 bool SelectGlobalOffset(SDNode *N, SDValue Addr, SDValue &VAddr,
214 bool SelectScratchOffset(SDNode *N, SDValue Addr, SDValue &VAddr,
216 bool SelectGlobalSAddr(SDNode *N, SDValue Addr, SDValue &SAddr,
218 bool SelectScratchSAddr(SDNode *N, SDValue Addr, SDValue &SAddr,
261 void SelectADD_SUB_I64(SDNode *N);
262 void SelectAddcSubb(SDNode *N);
263 void SelectUADDO_USUBO(SDNode *N);
264 void SelectDIV_SCALE(SDNode *N);
265 void SelectMAD_64_32(SDNode *N);
266 void SelectFMA_W_CHAIN(SDNode *N);
267 void SelectFMUL_W_CHAIN(SDNode *N);
269 SDNode *getS_BFE(unsigned Opcode, const SDLoc &DL, SDValue Val,
271 void SelectS_BFEFromShifts(SDNode *N);
272 void SelectS_BFE(SDNode *N);
273 bool isCBranchSCC(const SDNode *N) const;
274 void SelectBRCOND(SDNode *N);
275 void SelectFMAD_FMA(SDNode *N);
276 void SelectATOMIC_CMP_SWAP(SDNode *N);
277 void SelectDSAppendConsume(SDNode *N, unsigned IntrID);
278 void SelectDS_GWS(SDNode *N, unsigned IntrID);
279 void SelectInterpP1F16(SDNode *N);
280 void SelectINTRINSIC_W_CHAIN(SDNode *N);
281 void SelectINTRINSIC_WO_CHAIN(SDNode *N);
282 void SelectINTRINSIC_VOID(SDNode *N);
300 void Select(SDNode *N) override;
471 bool AMDGPUDAGToDAGISel::matchLoadD16FromBuildVector(SDNode *N) const { in matchLoadD16FromBuildVector()
559 SDNode *N = &*--Position; in PreprocessISelDAG()
590 bool AMDGPUDAGToDAGISel::isInlineImmediate(const SDNode *N, in isInlineImmediate()
618 const TargetRegisterClass *AMDGPUDAGToDAGISel::getOperandRegClass(SDNode *N, in getOperandRegClass()
662 SDNode *AMDGPUDAGToDAGISel::glueCopyToOp(SDNode *N, SDValue NewChain, in glueCopyToOp()
673 SDNode *AMDGPUDAGToDAGISel::glueCopyToM0(SDNode *N, SDValue Val) const { in glueCopyToM0()
683 SDNode *AMDGPUDAGToDAGISel::glueCopyToM0LDSInit(SDNode *N) const { in glueCopyToM0LDSInit()
699 SDNode *Lo = CurDAG->getMachineNode( in buildSMovImm64()
702 SDNode *Hi = in buildSMovImm64()
713 void AMDGPUDAGToDAGISel::SelectBuildVector(SDNode *N, unsigned RegClassID) { in SelectBuildVector()
768 void AMDGPUDAGToDAGISel::Select(SDNode *N) { in Select()
830 if (SDNode *Packed = packConstantV2I16(N, *CurDAG)) { in Select()
977 bool AMDGPUDAGToDAGISel::isUniformBr(const SDNode *N) const { in isUniformBr()
1070 SDNode *Mov = CurDAG->getMachineNode( in getMaterializedScalarImm32()
1077 void AMDGPUDAGToDAGISel::SelectADD_SUB_I64(SDNode *N) { in SelectADD_SUB_I64()
1091 SDNode *Lo0 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, in SelectADD_SUB_I64()
1093 SDNode *Hi0 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, in SelectADD_SUB_I64()
1096 SDNode *Lo1 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, in SelectADD_SUB_I64()
1098 SDNode *Hi1 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, in SelectADD_SUB_I64()
1112 SDNode *AddLo; in SelectADD_SUB_I64()
1125 SDNode *AddHi = CurDAG->getMachineNode(CarryOpc, DL, VTList, AddHiArgs); in SelectADD_SUB_I64()
1134 SDNode *RegSequence = CurDAG->getMachineNode(AMDGPU::REG_SEQUENCE, DL, in SelectADD_SUB_I64()
1146 void AMDGPUDAGToDAGISel::SelectAddcSubb(SDNode *N) { in SelectAddcSubb()
1166 void AMDGPUDAGToDAGISel::SelectUADDO_USUBO(SDNode *N) { in SelectUADDO_USUBO()
1173 for (SDNode::use_iterator UI = N->use_begin(), E = N->use_end(); UI != E; in SelectUADDO_USUBO()
1199 void AMDGPUDAGToDAGISel::SelectFMA_W_CHAIN(SDNode *N) { in SelectFMA_W_CHAIN()
1213 void AMDGPUDAGToDAGISel::SelectFMUL_W_CHAIN(SDNode *N) { in SelectFMUL_W_CHAIN()
1228 void AMDGPUDAGToDAGISel::SelectDIV_SCALE(SDNode *N) { in SelectDIV_SCALE()
1248 void AMDGPUDAGToDAGISel::SelectMAD_64_32(SDNode *N) { in SelectMAD_64_32()
1580 bool AMDGPUDAGToDAGISel::SelectMUBUFScratchOffen(SDNode *Parent, in SelectMUBUFScratchOffen()
1653 bool AMDGPUDAGToDAGISel::SelectMUBUFScratchOffset(SDNode *Parent, in SelectMUBUFScratchOffset()
1724 static MemSDNode* findMemSDNode(SDNode *N) { in findMemSDNode()
1736 bool AMDGPUDAGToDAGISel::SelectFlatOffsetImpl(SDNode *N, SDValue Addr, in SelectFlatOffsetImpl()
1794 SDNode *N0Lo = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, in SelectFlatOffsetImpl()
1796 SDNode *N0Hi = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, in SelectFlatOffsetImpl()
1804 SDNode *Add = in SelectFlatOffsetImpl()
1808 SDNode *Addc = CurDAG->getMachineNode( in SelectFlatOffsetImpl()
1829 bool AMDGPUDAGToDAGISel::SelectFlatOffset(SDNode *N, SDValue Addr, in SelectFlatOffset()
1835 bool AMDGPUDAGToDAGISel::SelectGlobalOffset(SDNode *N, SDValue Addr, in SelectGlobalOffset()
1841 bool AMDGPUDAGToDAGISel::SelectScratchOffset(SDNode *N, SDValue Addr, in SelectScratchOffset()
1858 bool AMDGPUDAGToDAGISel::SelectGlobalSAddr(SDNode *N, in SelectGlobalSAddr()
1888 SDNode *VMov = CurDAG->getMachineNode( in SelectGlobalSAddr()
1945 SDNode *VMov = in SelectGlobalSAddr()
1972 bool AMDGPUDAGToDAGISel::SelectScratchSAddr(SDNode *Parent, SDValue Addr, in SelectScratchSAddr()
2205 SDNode *AMDGPUDAGToDAGISel::getS_BFE(unsigned Opcode, const SDLoc &DL, in getS_BFE()
2217 void AMDGPUDAGToDAGISel::SelectS_BFEFromShifts(SDNode *N) { in SelectS_BFEFromShifts()
2242 void AMDGPUDAGToDAGISel::SelectS_BFE(SDNode *N) { in SelectS_BFE()
2318 bool AMDGPUDAGToDAGISel::isCBranchSCC(const SDNode *N) const { in isCBranchSCC()
2344 void AMDGPUDAGToDAGISel::SelectBRCOND(SDNode *N) { in SelectBRCOND()
2391 void AMDGPUDAGToDAGISel::SelectFMAD_FMA(SDNode *N) { in SelectFMAD_FMA()
2439 void AMDGPUDAGToDAGISel::SelectATOMIC_CMP_SWAP(SDNode *N) { in SelectATOMIC_CMP_SWAP()
2501 void AMDGPUDAGToDAGISel::SelectDSAppendConsume(SDNode *N, unsigned IntrID) { in SelectDSAppendConsume()
2537 SDNode *Selected = CurDAG->SelectNodeTo(N, Opc, N->getVTList(), Ops); in SelectDSAppendConsume()
2560 void AMDGPUDAGToDAGISel::SelectDS_GWS(SDNode *N, unsigned IntrID) { in SelectDS_GWS()
2600 SDNode *SGPROffset in SelectDS_GWS()
2604 SDNode *M0Base in SelectDS_GWS()
2621 SDNode *Selected = CurDAG->SelectNodeTo(N, Opc, N->getVTList(), Ops); in SelectDS_GWS()
2625 void AMDGPUDAGToDAGISel::SelectInterpP1F16(SDNode *N) { in SelectInterpP1F16()
2658 SDNode *InterpMov = in SelectInterpP1F16()
2666 SDNode *InterpP1LV = in SelectInterpP1F16()
2683 void AMDGPUDAGToDAGISel::SelectINTRINSIC_W_CHAIN(SDNode *N) { in SelectINTRINSIC_W_CHAIN()
2698 void AMDGPUDAGToDAGISel::SelectINTRINSIC_WO_CHAIN(SDNode *N) { in SelectINTRINSIC_WO_CHAIN()
2727 void AMDGPUDAGToDAGISel::SelectINTRINSIC_VOID(SDNode *N) { in SelectINTRINSIC_VOID()
3016 bool AMDGPUDAGToDAGISel::isVGPRImm(const SDNode * N) const { in isVGPRImm()
3026 for (SDNode::use_iterator U = N->use_begin(), E = SDNode::use_end(); in isVGPRImm()
3038 SDNode * User = *U; in isVGPRImm()
3064 bool AMDGPUDAGToDAGISel::isUniformLoad(const SDNode * N) const { in isUniformLoad()
3099 SDNode *Node = &*Position++; in PostprocessISelDAG()
3104 SDNode *ResNode = Lowering.PostISelFolding(MachineNode, *CurDAG); in PostprocessISelDAG()
3150 void R600DAGToDAGISel::Select(SDNode *N) { in Select()