Lines Matching refs:AMDGPUCodeGenPrepare
70 class AMDGPUCodeGenPrepare : public FunctionPass, class
71 public InstVisitor<AMDGPUCodeGenPrepare, bool> {
201 AMDGPUCodeGenPrepare() : FunctionPass(ID) {} in AMDGPUCodeGenPrepare() function in __anonb3ed75c90111::AMDGPUCodeGenPrepare
232 unsigned AMDGPUCodeGenPrepare::getBaseElementBitWidth(const Type *T) const { in getBaseElementBitWidth()
240 Type *AMDGPUCodeGenPrepare::getI32Ty(IRBuilder<> &B, const Type *T) const { in getI32Ty()
248 bool AMDGPUCodeGenPrepare::isSigned(const BinaryOperator &I) const { in isSigned()
253 bool AMDGPUCodeGenPrepare::isSigned(const SelectInst &I) const { in isSigned()
258 bool AMDGPUCodeGenPrepare::needsPromotionToI32(const Type *T) const { in needsPromotionToI32()
306 bool AMDGPUCodeGenPrepare::canWidenScalarExtLoad(LoadInst &I) const { in canWidenScalarExtLoad()
315 bool AMDGPUCodeGenPrepare::promoteUniformOpToI32(BinaryOperator &I) const { in promoteUniformOpToI32()
362 bool AMDGPUCodeGenPrepare::promoteUniformOpToI32(ICmpInst &I) const { in promoteUniformOpToI32()
389 bool AMDGPUCodeGenPrepare::promoteUniformOpToI32(SelectInst &I) const { in promoteUniformOpToI32()
418 bool AMDGPUCodeGenPrepare::promoteUniformBitreverseToI32( in promoteUniformBitreverseToI32()
444 unsigned AMDGPUCodeGenPrepare::numBitsUnsigned(Value *Op, in numBitsUnsigned()
450 unsigned AMDGPUCodeGenPrepare::numBitsSigned(Value *Op, in numBitsSigned()
457 bool AMDGPUCodeGenPrepare::isI24(Value *V, unsigned ScalarSize) const { in isI24()
463 bool AMDGPUCodeGenPrepare::isU24(Value *V, unsigned ScalarSize) const { in isU24()
492 bool AMDGPUCodeGenPrepare::replaceMulWithMul24(BinaryOperator &I) const { in replaceMulWithMul24()
573 bool AMDGPUCodeGenPrepare::foldBinOpIntoSelect(BinaryOperator &BO) const { in foldBinOpIntoSelect()
740 bool AMDGPUCodeGenPrepare::visitFDiv(BinaryOperator &FDiv) { in visitFDiv()
812 bool AMDGPUCodeGenPrepare::visitXor(BinaryOperator &I) { in visitXor()
863 int AMDGPUCodeGenPrepare::getDivNumBits(BinaryOperator &I, in getDivNumBits()
884 Value *AMDGPUCodeGenPrepare::expandDivRem24(IRBuilder<> &Builder, in expandDivRem24()
894 Value *AMDGPUCodeGenPrepare::expandDivRem24Impl(IRBuilder<> &Builder, in expandDivRem24Impl()
998 bool AMDGPUCodeGenPrepare::divHasSpecialOptimization( in divHasSpecialOptimization()
1040 Value *AMDGPUCodeGenPrepare::expandDivRem32(IRBuilder<> &Builder, in expandDivRem32()
1165 Value *AMDGPUCodeGenPrepare::shrinkDivRem64(IRBuilder<> &Builder, in shrinkDivRem64()
1196 void AMDGPUCodeGenPrepare::expandDivRem64(BinaryOperator &I) const { in expandDivRem64()
1212 bool AMDGPUCodeGenPrepare::visitBinaryOperator(BinaryOperator &I) { in visitBinaryOperator()
1295 bool AMDGPUCodeGenPrepare::visitLoadInst(LoadInst &I) { in visitLoadInst()
1343 bool AMDGPUCodeGenPrepare::visitICmpInst(ICmpInst &I) { in visitICmpInst()
1353 bool AMDGPUCodeGenPrepare::visitSelectInst(SelectInst &I) { in visitSelectInst()
1363 bool AMDGPUCodeGenPrepare::visitIntrinsicInst(IntrinsicInst &I) { in visitIntrinsicInst()
1372 bool AMDGPUCodeGenPrepare::visitBitreverseIntrinsicInst(IntrinsicInst &I) { in visitBitreverseIntrinsicInst()
1382 bool AMDGPUCodeGenPrepare::doInitialization(Module &M) { in doInitialization()
1388 bool AMDGPUCodeGenPrepare::runOnFunction(Function &F) { in runOnFunction()
1436 INITIALIZE_PASS_BEGIN(AMDGPUCodeGenPrepare, DEBUG_TYPE,
1440 INITIALIZE_PASS_END(AMDGPUCodeGenPrepare, DEBUG_TYPE, "AMDGPU IR optimizations",
1443 char AMDGPUCodeGenPrepare::ID = 0;
1446 return new AMDGPUCodeGenPrepare(); in createAMDGPUCodeGenPreparePass()