Lines Matching refs:addLiveIn

146     MIRBuilder.getMBB().addLiveIn(PhysReg);  in markPhysRegUsed()
375     Register LiveInReturn = MF.addLiveIn(TRI->getReturnAddressReg(MF),  in lowerReturn()
450     MF.addLiveIn(PrivateSegmentBufferReg, &AMDGPU::SGPR_128RegClass);  in allocateHSAUserSGPRs()
456     MF.addLiveIn(DispatchPtrReg, &AMDGPU::SGPR_64RegClass);  in allocateHSAUserSGPRs()
462     MF.addLiveIn(QueuePtrReg, &AMDGPU::SGPR_64RegClass);  in allocateHSAUserSGPRs()
471     MRI.addLiveIn(InputPtrReg, VReg);  in allocateHSAUserSGPRs()
472     B.getMBB().addLiveIn(InputPtrReg);  in allocateHSAUserSGPRs()
479     MF.addLiveIn(DispatchIDReg, &AMDGPU::SGPR_64RegClass);  in allocateHSAUserSGPRs()
485     MF.addLiveIn(FlatScratchInitReg, &AMDGPU::SGPR_64RegClass);  in allocateHSAUserSGPRs()
596     Register LiveInReturn = MF.addLiveIn(ReturnAddrReg,  in lowerFormalArguments()
598     MBB.addLiveIn(ReturnAddrReg);  in lowerFormalArguments()
604     MF.addLiveIn(ImplicitBufferPtrReg, &AMDGPU::SGPR_64RegClass);  in lowerFormalArguments()