Lines Matching refs:CallConv
254 CallingConv::ID CallConv, in canLowerReturn() argument
258 if (AMDGPU::isEntryFunctionCC(CallConv)) in canLowerReturn()
263 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, in canLowerReturn()
266 return checkReturn(CCInfo, Outs, TLI.CCAssignFnForReturn(CallConv, IsVarArg)); in canLowerReturn()
934 CallingConv::ID CalleeCC = Info.CallConv; in doCallerAndCalleePassArgsTheSameWay()
980 CallingConv::ID CalleeCC = Info.CallConv; in areCalleeOutgoingArgsTailCallable()
1038 CallingConv::ID CalleeCC = Info.CallConv; in isEligibleForTailCallOptimization()
1117 CallingConv::ID CalleeCC = Info.CallConv; in lowerTailCall()
1183 CCState CCInfo(Info.CallConv, Info.IsVarArg, MF, ArgLocs, F.getContext()); in lowerTailCall()
1191 Info.CallConv != CallingConv::AMDGPU_Gfx) { in lowerTailCall()
1258 Info.CallConv != CallingConv::AMDGPU_Gfx) { in lowerCall()
1265 splitToValueTypes(OrigArg, OutArgs, DL, Info.CallConv); in lowerCall()
1269 splitToValueTypes(Info.OrigRet, InArgs, DL, Info.CallConv); in lowerCall()
1288 getAssignFnsForCC(Info.CallConv, TLI); in lowerCall()
1305 const uint32_t *Mask = TRI->getCallPreservedMask(MF, Info.CallConv); in lowerCall()
1309 CCState CCInfo(Info.CallConv, Info.IsVarArg, MF, ArgLocs, F.getContext()); in lowerCall()
1317 Info.CallConv != CallingConv::AMDGPU_Gfx) { in lowerCall()
1361 CCAssignFn *RetAssignFn = TLI.CCAssignFnForReturn(Info.CallConv, in lowerCall()
1366 Info.CallConv, Info.IsVarArg)) in lowerCall()