572 static bool isPreLdStPairCandidate(MachineInstr &FirstMI, MachineInstr &MI) {  in isPreLdStPairCandidate()  argument
574   unsigned OpcA = FirstMI.getOpcode();  in isPreLdStPairCandidate()
1294 static bool areCandidatesToMergeOrPair(MachineInstr &FirstMI, MachineInstr &MI,  in areCandidatesToMergeOrPair()  argument
1302   assert(!FirstMI.hasOrderedMemoryRef() &&  in areCandidatesToMergeOrPair()
1303          !TII->isLdStPairSuppressed(FirstMI) &&  in areCandidatesToMergeOrPair()
1306   unsigned OpcA = FirstMI.getOpcode();  in areCandidatesToMergeOrPair()
1311     return !AArch64InstrInfo::isPreLdSt(FirstMI);  in areCandidatesToMergeOrPair()
1337   if (isPreLdStPairCandidate(FirstMI, MI))  in areCandidatesToMergeOrPair()
1348 canRenameUpToDef(MachineInstr &FirstMI, LiveRegUnits &UsedInBetween,  in canRenameUpToDef()  argument
1351   if (!FirstMI.mayStore())  in canRenameUpToDef()
1356   auto *RegClass = TRI->getMinimalPhysRegClass(getLdStRegOp(FirstMI).getReg());  in canRenameUpToDef()
1357   MachineFunction &MF = *FirstMI.getParent()->getParent();  in canRenameUpToDef()
1361   auto RegToRename = getLdStRegOp(FirstMI).getReg();  in canRenameUpToDef()
1363   if (!getLdStRegOp(FirstMI).isKill() &&  in canRenameUpToDef()
1364       !any_of(FirstMI.operands(),  in canRenameUpToDef()
1370     LLVM_DEBUG(dbgs() << "  Operand not killed at " << FirstMI << "\n");  in canRenameUpToDef()
1460   if (!forAllMIsUntilDef(FirstMI, RegToRename, TRI, LdStLimit, CheckMIs))  in canRenameUpToDef()
1476     MachineInstr &FirstMI, MachineInstr &MI, LiveRegUnits &DefinedInBB,  in tryToFindRegisterToRename()  argument
1480   auto &MF = *FirstMI.getParent()->getParent();  in tryToFindRegisterToRename()
1502   auto *RegClass = TRI->getMinimalPhysRegClass(getLdStRegOp(FirstMI).getReg());  in tryToFindRegisterToRename()
1527   MachineInstr &FirstMI = *I;  in findMatchingInsn()  local
1530   bool MayLoad = FirstMI.mayLoad();  in findMatchingInsn()
1531   bool IsUnscaled = TII->hasUnscaledLdStOffset(FirstMI);  in findMatchingInsn()
1532   Register Reg = getLdStRegOp(FirstMI).getReg();  in findMatchingInsn()
1533   Register BaseReg = getLdStBaseOp(FirstMI).getReg();  in findMatchingInsn()
1534   int Offset = getLdStOffsetOp(FirstMI).getImm();  in findMatchingInsn()
1535   int OffsetStride = IsUnscaled ? TII->getMemScale(FirstMI) : 1;  in findMatchingInsn()
1536   bool IsPromotableZeroStore = isPromotableZeroStoreInst(FirstMI);  in findMatchingInsn()
1568     if (areCandidatesToMergeOrPair(FirstMI, MI, Flags, TII) &&  in findMatchingInsn()
1600       bool IsPreLdSt = isPreLdStPairCandidate(FirstMI, MI);  in findMatchingInsn()
1709               !UsedRegUnits.available(getLdStRegOp(FirstMI).getReg())) &&  in findMatchingInsn()
1710             !mayAlias(FirstMI, MemInsns, AA)) {  in findMatchingInsn()
1712           if (ModifiedRegUnits.available(getLdStRegOp(FirstMI).getReg())) {  in findMatchingInsn()
1720               MaybeCanRename = {canRenameUpToDef(FirstMI, UsedInBetween,  in findMatchingInsn()
1725                   FirstMI, MI, DefinedInBB, UsedInBetween, RequiredClasses,  in findMatchingInsn()