Lines Matching refs:RC
619 const TargetRegisterClass *RC = in canInsertSelect() local
621 if (!RC) in canInsertSelect()
627 if (!RI.getCommonSubClass(RC, MRI.getRegClass(DstReg))) in canInsertSelect()
635 if (AArch64::GPR64allRegClass.hasSubClassEq(RC) || in canInsertSelect()
636 AArch64::GPR32allRegClass.hasSubClassEq(RC)) { in canInsertSelect()
649 if (AArch64::FPR64RegClass.hasSubClassEq(RC) || in canInsertSelect()
650 AArch64::FPR32RegClass.hasSubClassEq(RC)) { in canInsertSelect()
745 const TargetRegisterClass *RC = nullptr; in insertSelect() local
748 RC = &AArch64::GPR64RegClass; in insertSelect()
752 RC = &AArch64::GPR32RegClass; in insertSelect()
756 RC = &AArch64::FPR64RegClass; in insertSelect()
759 RC = &AArch64::FPR32RegClass; in insertSelect()
762 assert(RC && "Unsupported regclass"); in insertSelect()
786 MRI.constrainRegClass(TrueReg, RC); in insertSelect()
787 MRI.constrainRegClass(FalseReg, RC); in insertSelect()
3661 bool isKill, int FI, const TargetRegisterClass *RC, in storeRegToStackSlot() argument
3673 switch (TRI->getSpillSize(*RC)) { in storeRegToStackSlot()
3675 if (AArch64::FPR8RegClass.hasSubClassEq(RC)) in storeRegToStackSlot()
3679 if (AArch64::FPR16RegClass.hasSubClassEq(RC)) in storeRegToStackSlot()
3681 else if (AArch64::PPRRegClass.hasSubClassEq(RC)) { in storeRegToStackSlot()
3688 if (AArch64::GPR32allRegClass.hasSubClassEq(RC)) { in storeRegToStackSlot()
3694 } else if (AArch64::FPR32RegClass.hasSubClassEq(RC)) in storeRegToStackSlot()
3698 if (AArch64::GPR64allRegClass.hasSubClassEq(RC)) { in storeRegToStackSlot()
3704 } else if (AArch64::FPR64RegClass.hasSubClassEq(RC)) { in storeRegToStackSlot()
3706 } else if (AArch64::WSeqPairsClassRegClass.hasSubClassEq(RC)) { in storeRegToStackSlot()
3714 if (AArch64::FPR128RegClass.hasSubClassEq(RC)) in storeRegToStackSlot()
3716 else if (AArch64::DDRegClass.hasSubClassEq(RC)) { in storeRegToStackSlot()
3720 } else if (AArch64::XSeqPairsClassRegClass.hasSubClassEq(RC)) { in storeRegToStackSlot()
3725 } else if (AArch64::ZPRRegClass.hasSubClassEq(RC)) { in storeRegToStackSlot()
3732 if (AArch64::DDDRegClass.hasSubClassEq(RC)) { in storeRegToStackSlot()
3739 if (AArch64::DDDDRegClass.hasSubClassEq(RC)) { in storeRegToStackSlot()
3743 } else if (AArch64::QQRegClass.hasSubClassEq(RC)) { in storeRegToStackSlot()
3747 } else if (AArch64::ZPR2RegClass.hasSubClassEq(RC)) { in storeRegToStackSlot()
3754 if (AArch64::QQQRegClass.hasSubClassEq(RC)) { in storeRegToStackSlot()
3758 } else if (AArch64::ZPR3RegClass.hasSubClassEq(RC)) { in storeRegToStackSlot()
3765 if (AArch64::QQQQRegClass.hasSubClassEq(RC)) { in storeRegToStackSlot()
3769 } else if (AArch64::ZPR4RegClass.hasSubClassEq(RC)) { in storeRegToStackSlot()
3815 int FI, const TargetRegisterClass *RC, in loadRegFromStackSlot() argument
3827 switch (TRI->getSpillSize(*RC)) { in loadRegFromStackSlot()
3829 if (AArch64::FPR8RegClass.hasSubClassEq(RC)) in loadRegFromStackSlot()
3833 if (AArch64::FPR16RegClass.hasSubClassEq(RC)) in loadRegFromStackSlot()
3835 else if (AArch64::PPRRegClass.hasSubClassEq(RC)) { in loadRegFromStackSlot()
3842 if (AArch64::GPR32allRegClass.hasSubClassEq(RC)) { in loadRegFromStackSlot()
3848 } else if (AArch64::FPR32RegClass.hasSubClassEq(RC)) in loadRegFromStackSlot()
3852 if (AArch64::GPR64allRegClass.hasSubClassEq(RC)) { in loadRegFromStackSlot()
3858 } else if (AArch64::FPR64RegClass.hasSubClassEq(RC)) { in loadRegFromStackSlot()
3860 } else if (AArch64::WSeqPairsClassRegClass.hasSubClassEq(RC)) { in loadRegFromStackSlot()
3868 if (AArch64::FPR128RegClass.hasSubClassEq(RC)) in loadRegFromStackSlot()
3870 else if (AArch64::DDRegClass.hasSubClassEq(RC)) { in loadRegFromStackSlot()
3874 } else if (AArch64::XSeqPairsClassRegClass.hasSubClassEq(RC)) { in loadRegFromStackSlot()
3879 } else if (AArch64::ZPRRegClass.hasSubClassEq(RC)) { in loadRegFromStackSlot()
3886 if (AArch64::DDDRegClass.hasSubClassEq(RC)) { in loadRegFromStackSlot()
3893 if (AArch64::DDDDRegClass.hasSubClassEq(RC)) { in loadRegFromStackSlot()
3897 } else if (AArch64::QQRegClass.hasSubClassEq(RC)) { in loadRegFromStackSlot()
3901 } else if (AArch64::ZPR2RegClass.hasSubClassEq(RC)) { in loadRegFromStackSlot()
3908 if (AArch64::QQQRegClass.hasSubClassEq(RC)) { in loadRegFromStackSlot()
3912 } else if (AArch64::ZPR3RegClass.hasSubClassEq(RC)) { in loadRegFromStackSlot()
3919 if (AArch64::QQQQRegClass.hasSubClassEq(RC)) { in loadRegFromStackSlot()
3923 } else if (AArch64::ZPR4RegClass.hasSubClassEq(RC)) { in loadRegFromStackSlot()
5068 unsigned MaddOpc, const TargetRegisterClass *RC, in genFusedMultiply() argument
5093 MRI.constrainRegClass(ResultReg, RC); in genFusedMultiply()
5095 MRI.constrainRegClass(SrcReg0, RC); in genFusedMultiply()
5097 MRI.constrainRegClass(SrcReg1, RC); in genFusedMultiply()
5099 MRI.constrainRegClass(SrcReg2, RC); in genFusedMultiply()
5132 unsigned IdxMulOpd, unsigned MaddOpc, const TargetRegisterClass *RC) { in genFusedMultiplyAcc() argument
5133 return genFusedMultiply(MF, MRI, TII, Root, InsInstrs, IdxMulOpd, MaddOpc, RC, in genFusedMultiplyAcc()
5143 unsigned MnegOpc, const TargetRegisterClass *RC) { in genNeg() argument
5144 Register NewVR = MRI.createVirtualRegister(RC); in genNeg()
5162 unsigned MaddOpc, unsigned MnegOpc, const TargetRegisterClass *RC) { in genFusedMultiplyAccNeg() argument
5166 genNeg(MF, MRI, TII, Root, InsInstrs, InstrIdxForVirtReg, MnegOpc, RC); in genFusedMultiplyAccNeg()
5167 return genFusedMultiply(MF, MRI, TII, Root, InsInstrs, IdxMulOpd, MaddOpc, RC, in genFusedMultiplyAccNeg()
5178 unsigned IdxMulOpd, unsigned MaddOpc, const TargetRegisterClass *RC) { in genFusedMultiplyIdx() argument
5179 return genFusedMultiply(MF, MRI, TII, Root, InsInstrs, IdxMulOpd, MaddOpc, RC, in genFusedMultiplyIdx()
5189 unsigned MaddOpc, unsigned MnegOpc, const TargetRegisterClass *RC) { in genFusedMultiplyIdxNeg() argument
5193 genNeg(MF, MRI, TII, Root, InsInstrs, InstrIdxForVirtReg, MnegOpc, RC); in genFusedMultiplyIdxNeg()
5195 return genFusedMultiply(MF, MRI, TII, Root, InsInstrs, IdxMulOpd, MaddOpc, RC, in genFusedMultiplyIdxNeg()
5222 const TargetRegisterClass *RC) { in genMaddR() argument
5233 MRI.constrainRegClass(ResultReg, RC); in genMaddR()
5235 MRI.constrainRegClass(SrcReg0, RC); in genMaddR()
5237 MRI.constrainRegClass(SrcReg1, RC); in genMaddR()
5239 MRI.constrainRegClass(VR, RC); in genMaddR()
5265 const TargetRegisterClass *RC; in genAlternativeCodeSequence() local
5281 RC = &AArch64::GPR32RegClass; in genAlternativeCodeSequence()
5284 RC = &AArch64::GPR64RegClass; in genAlternativeCodeSequence()
5286 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC); in genAlternativeCodeSequence()
5296 RC = &AArch64::GPR32RegClass; in genAlternativeCodeSequence()
5299 RC = &AArch64::GPR64RegClass; in genAlternativeCodeSequence()
5301 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5318 RC = &AArch64::GPR32RegClass; in genAlternativeCodeSequence()
5325 RC = &AArch64::GPR64RegClass; in genAlternativeCodeSequence()
5343 MUL = genMaddR(MF, MRI, TII, Root, InsInstrs, 1, Opc, NewVR, RC); in genAlternativeCodeSequence()
5361 RC = &AArch64::GPR32RegClass; in genAlternativeCodeSequence()
5367 RC = &AArch64::GPR64RegClass; in genAlternativeCodeSequence()
5377 MUL = genMaddR(MF, MRI, TII, Root, InsInstrs, 1, Opc, NewVR, RC); in genAlternativeCodeSequence()
5388 RC = &AArch64::GPR32RegClass; in genAlternativeCodeSequence()
5391 RC = &AArch64::GPR64RegClass; in genAlternativeCodeSequence()
5393 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5410 RC = &AArch64::GPR32RegClass; in genAlternativeCodeSequence()
5417 RC = &AArch64::GPR64RegClass; in genAlternativeCodeSequence()
5434 MUL = genMaddR(MF, MRI, TII, Root, InsInstrs, 1, Opc, NewVR, RC); in genAlternativeCodeSequence()
5441 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5442 MUL = genFusedMultiplyAcc(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC); in genAlternativeCodeSequence()
5446 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5447 MUL = genFusedMultiplyAcc(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5451 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5452 MUL = genFusedMultiplyAcc(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC); in genAlternativeCodeSequence()
5456 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5457 MUL = genFusedMultiplyAcc(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5461 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5462 MUL = genFusedMultiplyAcc(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC); in genAlternativeCodeSequence()
5466 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5467 MUL = genFusedMultiplyAcc(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5471 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5472 MUL = genFusedMultiplyAcc(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC); in genAlternativeCodeSequence()
5476 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5477 MUL = genFusedMultiplyAcc(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5481 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5482 MUL = genFusedMultiplyAcc(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC); in genAlternativeCodeSequence()
5486 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5487 MUL = genFusedMultiplyAcc(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5491 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5492 MUL = genFusedMultiplyAcc(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC); in genAlternativeCodeSequence()
5496 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5497 MUL = genFusedMultiplyAcc(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5502 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5505 RC); in genAlternativeCodeSequence()
5509 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5510 MUL = genFusedMultiplyAcc(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5514 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5517 RC); in genAlternativeCodeSequence()
5521 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5522 MUL = genFusedMultiplyAcc(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5526 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5529 RC); in genAlternativeCodeSequence()
5533 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5534 MUL = genFusedMultiplyAcc(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5538 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5541 RC); in genAlternativeCodeSequence()
5545 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5546 MUL = genFusedMultiplyAcc(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5550 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5553 RC); in genAlternativeCodeSequence()
5557 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5558 MUL = genFusedMultiplyAcc(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5562 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5565 RC); in genAlternativeCodeSequence()
5569 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5570 MUL = genFusedMultiplyAcc(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5575 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5576 MUL = genFusedMultiplyIdx(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC); in genAlternativeCodeSequence()
5580 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5581 MUL = genFusedMultiplyIdx(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5585 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5586 MUL = genFusedMultiplyIdx(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC); in genAlternativeCodeSequence()
5590 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5591 MUL = genFusedMultiplyIdx(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5595 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5596 MUL = genFusedMultiplyIdx(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC); in genAlternativeCodeSequence()
5600 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5601 MUL = genFusedMultiplyIdx(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5605 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5606 MUL = genFusedMultiplyIdx(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC); in genAlternativeCodeSequence()
5610 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5611 MUL = genFusedMultiplyIdx(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5616 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5619 RC); in genAlternativeCodeSequence()
5623 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5624 MUL = genFusedMultiplyIdx(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5628 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5631 RC); in genAlternativeCodeSequence()
5635 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5636 MUL = genFusedMultiplyIdx(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5640 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5643 RC); in genAlternativeCodeSequence()
5647 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5648 MUL = genFusedMultiplyIdx(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5652 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5655 RC); in genAlternativeCodeSequence()
5659 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5660 MUL = genFusedMultiplyIdx(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5666 RC = &AArch64::FPR16RegClass; in genAlternativeCodeSequence()
5667 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC); in genAlternativeCodeSequence()
5671 RC = &AArch64::FPR32RegClass; in genAlternativeCodeSequence()
5672 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC); in genAlternativeCodeSequence()
5676 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5677 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC); in genAlternativeCodeSequence()
5682 RC = &AArch64::FPR16RegClass; in genAlternativeCodeSequence()
5683 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5687 RC = &AArch64::FPR32RegClass; in genAlternativeCodeSequence()
5688 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5692 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5693 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5698 RC = &AArch64::FPR32RegClass; in genAlternativeCodeSequence()
5699 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC, in genAlternativeCodeSequence()
5704 RC = &AArch64::FPR32RegClass; in genAlternativeCodeSequence()
5705 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC, in genAlternativeCodeSequence()
5711 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5712 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC, in genAlternativeCodeSequence()
5717 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5718 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC, in genAlternativeCodeSequence()
5723 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5725 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC, in genAlternativeCodeSequence()
5729 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5731 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC, in genAlternativeCodeSequence()
5735 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5737 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC, in genAlternativeCodeSequence()
5741 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5743 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC, in genAlternativeCodeSequence()
5749 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5752 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC, in genAlternativeCodeSequence()
5756 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC, in genAlternativeCodeSequence()
5762 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5765 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC, in genAlternativeCodeSequence()
5769 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC, in genAlternativeCodeSequence()
5775 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5777 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC, in genAlternativeCodeSequence()
5781 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5783 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC, in genAlternativeCodeSequence()
5787 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5789 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC, in genAlternativeCodeSequence()
5793 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5795 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC, in genAlternativeCodeSequence()
5801 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5804 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC, in genAlternativeCodeSequence()
5808 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC, in genAlternativeCodeSequence()
5814 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5817 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC, in genAlternativeCodeSequence()
5821 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC, in genAlternativeCodeSequence()
5828 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5831 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC, in genAlternativeCodeSequence()
5835 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC, in genAlternativeCodeSequence()
5842 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5845 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC, in genAlternativeCodeSequence()
5849 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC, in genAlternativeCodeSequence()
5856 RC = &AArch64::FPR16RegClass; in genAlternativeCodeSequence()
5857 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC); in genAlternativeCodeSequence()
5861 RC = &AArch64::FPR32RegClass; in genAlternativeCodeSequence()
5862 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC); in genAlternativeCodeSequence()
5866 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5867 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC); in genAlternativeCodeSequence()
5872 RC = &AArch64::FPR16RegClass; in genAlternativeCodeSequence()
5873 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC); in genAlternativeCodeSequence()
5877 RC = &AArch64::FPR32RegClass; in genAlternativeCodeSequence()
5878 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC); in genAlternativeCodeSequence()
5882 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5883 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC); in genAlternativeCodeSequence()
5888 RC = &AArch64::FPR16RegClass; in genAlternativeCodeSequence()
5889 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5893 RC = &AArch64::FPR32RegClass; in genAlternativeCodeSequence()
5894 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5898 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5899 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC); in genAlternativeCodeSequence()
5904 RC = &AArch64::FPR32RegClass; in genAlternativeCodeSequence()
5905 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC, in genAlternativeCodeSequence()
5911 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5912 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC, in genAlternativeCodeSequence()
5918 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5919 Register NewVR = MRI.createVirtualRegister(RC); in genAlternativeCodeSequence()
5927 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC, in genAlternativeCodeSequence()
5931 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC, in genAlternativeCodeSequence()
5937 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5939 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC, in genAlternativeCodeSequence()
5943 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5945 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC, in genAlternativeCodeSequence()
5951 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
5954 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC, in genAlternativeCodeSequence()
5958 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC, in genAlternativeCodeSequence()
5965 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5966 Register NewVR = MRI.createVirtualRegister(RC); in genAlternativeCodeSequence()
5974 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC, in genAlternativeCodeSequence()
5978 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC, in genAlternativeCodeSequence()
5984 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5986 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC, in genAlternativeCodeSequence()
5990 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
5992 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC, in genAlternativeCodeSequence()
5998 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
6001 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC, in genAlternativeCodeSequence()
6005 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC, in genAlternativeCodeSequence()
6012 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
6015 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC, in genAlternativeCodeSequence()
6019 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 2, Opc, RC, in genAlternativeCodeSequence()
6025 RC = &AArch64::FPR64RegClass; in genAlternativeCodeSequence()
6026 Register NewVR = MRI.createVirtualRegister(RC); in genAlternativeCodeSequence()
6034 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC, in genAlternativeCodeSequence()
6038 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC, in genAlternativeCodeSequence()
6045 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
6046 Register NewVR = MRI.createVirtualRegister(RC); in genAlternativeCodeSequence()
6054 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC, in genAlternativeCodeSequence()
6058 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC, in genAlternativeCodeSequence()
6065 RC = &AArch64::FPR128RegClass; in genAlternativeCodeSequence()
6066 Register NewVR = MRI.createVirtualRegister(RC); in genAlternativeCodeSequence()
6074 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC, in genAlternativeCodeSequence()
6078 MUL = genFusedMultiply(MF, MRI, TII, Root, InsInstrs, 1, Opc, RC, in genAlternativeCodeSequence()