747   if (MRI.constrainRegClass(DstReg, &AArch64::GPR64RegClass)) {  in insertSelect()
748     RC = &AArch64::GPR64RegClass;  in insertSelect()
2079             AArch64::GPR64RegClass.contains(DstReg));  in isGPRCopy()
3586       AArch64::GPR64RegClass.contains(SrcReg)) {  in copyPhysReg()
3591   if (AArch64::GPR64RegClass.contains(DestReg) &&  in copyPhysReg()
3612     assert(AArch64::GPR64RegClass.contains(SrcReg) && "Invalid NZCV copy");  in copyPhysReg()
3621     assert(AArch64::GPR64RegClass.contains(DestReg) && "Invalid NZCV copy");  in copyPhysReg()
3701         MF.getRegInfo().constrainRegClass(SrcReg, &AArch64::GPR64RegClass);  in storeRegToStackSlot()
3855         MF.getRegInfo().constrainRegClass(DestReg, &AArch64::GPR64RegClass);  in loadRegFromStackSlot()
4043         &AArch64::GPR64RegClass);  in emitFrameOffsetAdj()
4159       MF.getRegInfo().constrainRegClass(DstReg, &AArch64::GPR64RegClass);  in foldMemoryOperandImpl()
4163       MF.getRegInfo().constrainRegClass(SrcReg, &AArch64::GPR64RegClass);  in foldMemoryOperandImpl()
4245           SpillRC = &AArch64::GPR64RegClass;  in foldMemoryOperandImpl()
5284       RC = &AArch64::GPR64RegClass;  in genAlternativeCodeSequence()
5299       RC = &AArch64::GPR64RegClass;  in genAlternativeCodeSequence()
5325       RC = &AArch64::GPR64RegClass;  in genAlternativeCodeSequence()
5367       RC = &AArch64::GPR64RegClass;  in genAlternativeCodeSequence()
5391       RC = &AArch64::GPR64RegClass;  in genAlternativeCodeSequence()
5417       RC = &AArch64::GPR64RegClass;  in genAlternativeCodeSequence()
6411   for (unsigned Reg : AArch64::GPR64RegClass) {  in findRegisterToSaveLRTo()
6973   for (unsigned Reg : AArch64::GPR64RegClass) {  in isMBBSafeToOutlineFrom()