Lines Matching refs:OpenIdx
380 OpenIdx = 0; in reset()
647 OpenIdx = Edit->size(); in openIntv()
649 return OpenIdx; in openIntv()
655 LLVM_DEBUG(dbgs() << " selectIntv " << OpenIdx << " -> " << Idx << '\n'); in selectIntv()
656 OpenIdx = Idx; in selectIntv()
660 assert(OpenIdx && "openIntv not called before enterIntvBefore"); in enterIntvBefore()
672 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Idx, *MI->getParent(), MI); in enterIntvBefore()
677 assert(OpenIdx && "openIntv not called before enterIntvAfter"); in enterIntvAfter()
689 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Idx, *MI->getParent(), in enterIntvAfter()
695 assert(OpenIdx && "openIntv not called before enterIntvAtEnd"); in enterIntvAtEnd()
723 VNInfo *VNI = defFromParent(OpenIdx, ParentVNI, Last, MBB, in enterIntvAtEnd()
725 RegAssign.insert(VNI->def, End, OpenIdx); in enterIntvAtEnd()
736 assert(OpenIdx && "openIntv not called before useIntv"); in useIntv()
738 RegAssign.insert(Start, End, OpenIdx); in useIntv()
743 assert(OpenIdx && "openIntv not called before leaveIntvAfter"); in leaveIntvAfter()
774 assert(OpenIdx && "openIntv not called before leaveIntvBefore"); in leaveIntvBefore()
793 assert(OpenIdx && "openIntv not called before leaveIntvAtTop"); in leaveIntvAtTop()
806 RegAssign.insert(Start, VNI->def, OpenIdx); in leaveIntvAtTop()
818 assert(OpenIdx && "openIntv not called before overlapIntv"); in overlapIntv()
839 RegAssign.insert(Start, End, OpenIdx); in overlapIntv()