399   SUnit *PredSU = PredEdge->getSUnit();  in ReleasePred()  local
402   if (PredSU->NumSuccsLeft == 0) {  in ReleasePred()
404     dumpNode(*PredSU);  in ReleasePred()
409   --PredSU->NumSuccsLeft;  in ReleasePred()
414     PredSU->setHeightToAtLeast(SU->getHeight() + PredEdge->getLatency());  in ReleasePred()
419   if (PredSU->NumSuccsLeft == 0 && PredSU != &EntrySU) {  in ReleasePred()
420     PredSU->isAvailable = true;  in ReleasePred()
422     unsigned Height = PredSU->getHeight();  in ReleasePred()
426     if (isReady(PredSU)) {  in ReleasePred()
427       AvailableQueue->push(PredSU);  in ReleasePred()
431     else if (!PredSU->isPending) {  in ReleasePred()
432       PredSU->isPending = true;  in ReleasePred()
433       PendingQueue.push_back(PredSU);  in ReleasePred()
821   SUnit *PredSU = PredEdge->getSUnit();  in CapturePred()  local
822   if (PredSU->isAvailable) {  in CapturePred()
823     PredSU->isAvailable = false;  in CapturePred()
824     if (!PredSU->isPending)  in CapturePred()
825       AvailableQueue->remove(PredSU);  in CapturePred()
828   assert(PredSU->NumSuccsLeft < std::numeric_limits<unsigned>::max() &&  in CapturePred()
830   ++PredSU->NumSuccsLeft;  in CapturePred()
1966       SUnit *PredSU = Pred.getSUnit();  in CalcNodeSethiUllmanNumber()  local
1967       if (SUNumbers[PredSU->NodeNum] == 0) {  in CalcNodeSethiUllmanNumber()
1971           assert(It.SU != PredSU && "Trying to push an element twice?");  in CalcNodeSethiUllmanNumber()
1975         WorkList.push_back(PredSU);  in CalcNodeSethiUllmanNumber()
1989       SUnit *PredSU = Pred.getSUnit();  in CalcNodeSethiUllmanNumber()  local
1990       unsigned PredSethiUllman = SUNumbers[PredSU->NodeNum];  in CalcNodeSethiUllmanNumber()
2093     SUnit *PredSU = Pred.getSUnit();  in HighRegPressure()  local
2096     if (PredSU->NumRegDefsLeft == 0) {  in HighRegPressure()
2099     for (ScheduleDAGSDNodes::RegDefIter RegDefPos(PredSU, scheduleDAG);  in HighRegPressure()
2142     SUnit *PredSU = Pred.getSUnit();  in RegPressureDiff()  local
2145     if (PredSU->NumRegDefsLeft == 0) {  in RegPressureDiff()
2146       if (PredSU->getNode()->isMachineOpcode())  in RegPressureDiff()
2150     for (ScheduleDAGSDNodes::RegDefIter RegDefPos(PredSU, scheduleDAG);  in RegPressureDiff()
2185     SUnit *PredSU = Pred.getSUnit();  in scheduledNode()  local
2188     if (PredSU->NumRegDefsLeft == 0) {  in scheduledNode()
2206     --PredSU->NumRegDefsLeft;  in scheduledNode()
2207     unsigned SkipRegDefs = PredSU->NumRegDefsLeft;  in scheduledNode()
2208     for (ScheduleDAGSDNodes::RegDefIter RegDefPos(PredSU, scheduleDAG);  in scheduledNode()
2267     SUnit *PredSU = Pred.getSUnit();  in unscheduledNode()  local
2270     if (PredSU->NumSuccsLeft != PredSU->Succs.size())  in unscheduledNode()
2272     const SDNode *PN = PredSU->getNode();  in unscheduledNode()
2363     const SUnit *PredSU = Pred.getSUnit();  in hasOnlyLiveInOpers()  local
2364     if (PredSU->getNode() &&  in hasOnlyLiveInOpers()
2365         PredSU->getNode()->getOpcode() == ISD::CopyFromReg) {  in hasOnlyLiveInOpers()
2367         cast<RegisterSDNode>(PredSU->getNode()->getOperand(1))->getReg();  in hasOnlyLiveInOpers()
2434     SUnit *PredSU = Pred.getSUnit();  in resetVRegCycle()  local
2435     if (PredSU->isVRegCycle) {  in resetVRegCycle()
2436       assert(PredSU->getNode()->getOpcode() == ISD::CopyFromReg &&  in resetVRegCycle()
2986     SUnit *PredSU = nullptr;  in PrescheduleNodesWithMultipleUses()  local
2989         PredSU = Pred.getSUnit();  in PrescheduleNodesWithMultipleUses()
2992     assert(PredSU);  in PrescheduleNodesWithMultipleUses()
2996     if (PredSU->hasPhysRegDefs)  in PrescheduleNodesWithMultipleUses()
2999     if (PredSU->NumSuccs == 1)  in PrescheduleNodesWithMultipleUses()
3010     for (const SDep &PredSucc : PredSU->Succs) {  in PrescheduleNodesWithMultipleUses()
3030                << PredSU->NodeNum  in PrescheduleNodesWithMultipleUses()
3032     for (unsigned i = 0; i != PredSU->Succs.size(); ++i) {  in PrescheduleNodesWithMultipleUses()
3033       SDep Edge = PredSU->Succs[i];  in PrescheduleNodesWithMultipleUses()
3037         Edge.setSUnit(PredSU);  in PrescheduleNodesWithMultipleUses()