159   SDValue EmitStackConvert(SDValue SrcOp, EVT SlotVT, EVT DestVT,
161   SDValue EmitStackConvert(SDValue SrcOp, EVT SlotVT, EVT DestVT,
878       EVT DestVT = Node->getValueType(0);  in LegalizeLoadOps()  local
879       if (!TLI.isLoadExtLegal(ISD::EXTLOAD, DestVT, SrcVT)) {  in LegalizeLoadOps()
905           EVT IDestVT = DestVT.changeTypeToInteger();  in LegalizeLoadOps()
910           Value = DAG.getNode(ISD::FP16_TO_FP, dl, DestVT, Result);  in LegalizeLoadOps()
1695                                                EVT DestVT, const SDLoc &dl) {  in EmitStackConvert()  argument
1696   return EmitStackConvert(SrcOp, SlotVT, DestVT, dl, DAG.getEntryNode());  in EmitStackConvert()
1700                                                EVT DestVT, const SDLoc &dl,  in EmitStackConvert()  argument
1704   unsigned DestSize = DestVT.getSizeInBits();  in EmitStackConvert()
1705   Type *DestType = DestVT.getTypeForEVT(*DAG.getContext());  in EmitStackConvert()
1712        !TLI.isLoadExtLegalOrCustom(ISD::EXTLOAD, DestVT, SlotVT)))  in EmitStackConvert()
1740     return DAG.getLoad(DestVT, dl, Store, FIPtr, PtrInfo, DestAlign);  in EmitStackConvert()
1743   return DAG.getExtLoad(ISD::EXTLOAD, dl, DestVT, Store, FIPtr, PtrInfo, SlotVT,  in EmitStackConvert()
2285   EVT DestVT = Node->getValueType(0);  in ExpandLegalINT_TO_FP()  local
2294       (DestVT.bitsLE(MVT::f64) ||  in ExpandLegalINT_TO_FP()
2297                             DestVT))) {  in ExpandLegalINT_TO_FP()
2344       if (DestVT != Sub.getValueType()) {  in ExpandLegalINT_TO_FP()
2347             DAG.getStrictFPExtendOrRound(Sub, Chain, dl, DestVT);  in ExpandLegalINT_TO_FP()
2355       Result = DAG.getFPExtendOrRound(Sub, dl, DestVT);  in ExpandLegalINT_TO_FP()
2364   if (((SrcVT == MVT::i32 || SrcVT == MVT::i64) && DestVT == MVT::f32) ||  in ExpandLegalINT_TO_FP()
2365       (SrcVT == MVT::i64 && DestVT == MVT::f64)) {  in ExpandLegalINT_TO_FP()
2398       Fast = DAG.getNode(ISD::STRICT_SINT_TO_FP, dl, { DestVT, MVT::Other },  in ExpandLegalINT_TO_FP()
2400       Slow = DAG.getNode(ISD::STRICT_FADD, dl, { DestVT, MVT::Other },  in ExpandLegalINT_TO_FP()
2412       SDValue SignCvt = DAG.getNode(ISD::SINT_TO_FP, dl, DestVT, Or);  in ExpandLegalINT_TO_FP()
2413       Slow = DAG.getNode(ISD::FADD, dl, DestVT, SignCvt, SignCvt);  in ExpandLegalINT_TO_FP()
2414       Fast = DAG.getNode(ISD::SINT_TO_FP, dl, DestVT, Op0);  in ExpandLegalINT_TO_FP()
2417     return DAG.getSelect(dl, DestVT, SignBitTest, Slow, Fast);  in ExpandLegalINT_TO_FP()
2422           Node->isStrictFPOpcode() ? ISD::STRICT_FADD : ISD::FADD, DestVT))  in ExpandLegalINT_TO_FP()
2428   assert(APFloat::semanticsPrecision(DAG.EVTToAPFloatSemantics(DestVT)) >=  in ExpandLegalINT_TO_FP()
2434     Tmp1 = DAG.getNode(ISD::STRICT_SINT_TO_FP, dl, { DestVT, MVT::Other },  in ExpandLegalINT_TO_FP()
2437     Tmp1 = DAG.getNode(ISD::SINT_TO_FP, dl, DestVT, Op0);  in ExpandLegalINT_TO_FP()
2469   if (DestVT == MVT::f32)  in ExpandLegalINT_TO_FP()
2476         ISD::EXTLOAD, dl, DestVT, DAG.getEntryNode(), CPIdx,  in ExpandLegalINT_TO_FP()
2485     SDValue Result = DAG.getNode(ISD::STRICT_FADD, dl, { DestVT, MVT::Other },  in ExpandLegalINT_TO_FP()
2491   return DAG.getNode(ISD::FADD, dl, DestVT, Tmp1, FudgeInReg);  in ExpandLegalINT_TO_FP()
2504   EVT DestVT = N->getValueType(0);  in PromoteLegalINT_TO_FP()  local
2540         DAG.getNode(OpToUse, dl, {DestVT, MVT::Other},  in PromoteLegalINT_TO_FP()
2550       DAG.getNode(OpToUse, dl, DestVT,  in PromoteLegalINT_TO_FP()
2565   EVT DestVT = N->getValueType(0);  in PromoteLegalFP_TO_INT()  local
2568   EVT NewOutTy = DestVT;  in PromoteLegalFP_TO_INT()
2601   SDValue Trunc = DAG.getNode(ISD::TRUNCATE, dl, DestVT, Operation);  in PromoteLegalFP_TO_INT()