Lines Matching refs:createResultReg
324 Reg = createResultReg(TLI.getRegClassFor(VT)); in materializeConstant()
804 CLI.ResultReg = createResultReg(TLI.getRegClassFor(MVT::i64)); in selectPatchpoint()
1436 ResultReg = createResultReg(DstClass); in selectBitCast()
1466 Register ResultReg = createResultReg(TyRegClass); in selectFreeze()
1912 Register FastISel::createResultReg(const TargetRegisterClass *RC) { in createResultReg() function in FastISel
1924 Register NewOp = createResultReg(RegClass); in constrainOperandRegClass()
1935 Register ResultReg = createResultReg(RC); in fastEmitInst_()
1946 Register ResultReg = createResultReg(RC); in fastEmitInst_r()
1967 Register ResultReg = createResultReg(RC); in fastEmitInst_rr()
1990 Register ResultReg = createResultReg(RC); in fastEmitInst_rrr()
2016 Register ResultReg = createResultReg(RC); in fastEmitInst_ri()
2038 Register ResultReg = createResultReg(RC); in fastEmitInst_rii()
2062 Register ResultReg = createResultReg(RC); in fastEmitInst_f()
2081 Register ResultReg = createResultReg(RC); in fastEmitInst_rri()
2103 Register ResultReg = createResultReg(RC); in fastEmitInst_i()
2119 Register ResultReg = createResultReg(TLI.getRegClassFor(RetVT)); in fastEmitInst_extractsubreg()