678                           EVT LoadResultTy, EVT &ExtVT);
5222                                    EVT LoadResultTy, EVT &ExtVT) {  in isAndLoadExtLoad()  argument
5228   ExtVT = EVT::getIntegerVT(*DAG.getContext(), ActiveBits);  in isAndLoadExtLoad()
5231   if (ExtVT == LoadedVT &&  in isAndLoadExtLoad()
5233        TLI.isLoadExtLegal(ISD::ZEXTLOAD, LoadResultTy, ExtVT))) {  in isAndLoadExtLoad()
5245   if (!LoadedVT.bitsGT(ExtVT) || !ExtVT.isRound())  in isAndLoadExtLoad()
5249       !TLI.isLoadExtLegal(ISD::ZEXTLOAD, LoadResultTy, ExtVT))  in isAndLoadExtLoad()
5252   if (!TLI.shouldReduceLoadWidth(LoadN, ISD::ZEXTLOAD, ExtVT))  in isAndLoadExtLoad()
5371       EVT ExtVT;  in SearchForAndLoads()  local
5372       if (isAndLoadExtLoad(Mask, Load, Load->getValueType(0), ExtVT) &&  in SearchForAndLoads()
5373           isLegalNarrowLdSt(Load, ISD::ZEXTLOAD, ExtVT)) {  in SearchForAndLoads()
5377             ExtVT.bitsGE(Load->getMemoryVT()))  in SearchForAndLoads()
5381         if (ExtVT.bitsLE(Load->getMemoryVT()))  in SearchForAndLoads()
5391       EVT ExtVT = EVT::getIntegerVT(*DAG.getContext(), ActiveBits);  in SearchForAndLoads()  local
5398       if (ExtVT.bitsGE(VT))  in SearchForAndLoads()
5646       EVT ExtVT = VT;  in visitAND()  local
5647       if (TLI.isLoadExtLegal(ISD::ZEXTLOAD, ExtVT, LoadVT)) {  in visitAND()
5656                 ExtVT, SDLoc(N), MLoad->getChain(), MLoad->getBasePtr(),  in visitAND()
8582     EVT ExtVT = EVT::getIntegerVT(*DAG.getContext(), LowBits);  in visitSRA()  local
8584       ExtVT = EVT::getVectorVT(*DAG.getContext(), ExtVT,  in visitSRA()
8587         TLI.getOperationAction(ISD::SIGN_EXTEND_INREG, ExtVT) ==  in visitSRA()
8590                          N0.getOperand(0), DAG.getValueType(ExtVT));  in visitSRA()
11409           EVT ExtVT;  in visitZERO_EXTEND()  local
11410           if (isAndLoadExtLoad(AndC, LN00, LoadResultTy, ExtVT))  in visitZERO_EXTEND()
11805   EVT ExtVT = VT;  in ReduceLoadWidth()  local
11817     ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT();  in ReduceLoadWidth()
11833       ExtVT = EVT::getIntegerVT(*DAG.getContext(), MemoryWidth - ShiftAmt);  in ReduceLoadWidth()
11835       ExtVT = EVT::getIntegerVT(*DAG.getContext(),  in ReduceLoadWidth()
11856     ExtVT = EVT::getIntegerVT(*DAG.getContext(), ActiveBits);  in ReduceLoadWidth()
11863       unsigned EVTBits = ExtVT.getScalarSizeInBits();  in ReduceLoadWidth()
11898           if ((ExtVT.getScalarSizeInBits() > MaskedVT.getScalarSizeInBits()) &&  in ReduceLoadWidth()
11900             ExtVT = MaskedVT;  in ReduceLoadWidth()
11910       ExtVT == VT && TLI.isNarrowingProfitable(N0.getValueType(), VT)) {  in ReduceLoadWidth()
11925       !isLegalNarrowLdSt(LN0, ExtType, ExtVT, ShAmt))  in ReduceLoadWidth()
11931     unsigned EVTStoreBits = ExtVT.getStoreSizeInBits().getFixedSize();  in ReduceLoadWidth()
11957                           LN0->getPointerInfo().getWithOffset(PtrOff), ExtVT,  in ReduceLoadWidth()
12005   EVT ExtVT = cast<VTSDNode>(N1)->getVT();  in visitSIGN_EXTEND_INREG()  local
12007   unsigned ExtVTBits = ExtVT.getScalarSizeInBits();  in visitSIGN_EXTEND_INREG()
12023       ExtVT.bitsLT(cast<VTSDNode>(N0.getOperand(1))->getVT()))  in visitSIGN_EXTEND_INREG()
12072     return DAG.getZeroExtendInReg(N0, SDLoc(N), ExtVT);  in visitSIGN_EXTEND_INREG()
12105       ExtVT == cast<LoadSDNode>(N0)->getMemoryVT() &&  in visitSIGN_EXTEND_INREG()
12108        TLI.isLoadExtLegal(ISD::SEXTLOAD, VT, ExtVT))) {  in visitSIGN_EXTEND_INREG()
12112                                      LN0->getBasePtr(), ExtVT,  in visitSIGN_EXTEND_INREG()
12123       ExtVT == cast<LoadSDNode>(N0)->getMemoryVT() &&  in visitSIGN_EXTEND_INREG()
12125        TLI.isLoadExtLegal(ISD::SEXTLOAD, VT, ExtVT))) {  in visitSIGN_EXTEND_INREG()
12129                                      LN0->getBasePtr(), ExtVT,  in visitSIGN_EXTEND_INREG()
12139     if (ExtVT == Ld->getMemoryVT() && N0.hasOneUse() &&  in visitSIGN_EXTEND_INREG()
12141         TLI.isLoadExtLegal(ISD::SEXTLOAD, VT, ExtVT)) {  in visitSIGN_EXTEND_INREG()
12144           Ld->getMask(), Ld->getPassThru(), ExtVT, Ld->getMemOperand(),  in visitSIGN_EXTEND_INREG()
12155         ExtVT == GN0->getMemoryVT() &&  in visitSIGN_EXTEND_INREG()
12161           DAG.getVTList(VT, MVT::Other), ExtVT, SDLoc(N), Ops,  in visitSIGN_EXTEND_INREG()
18893   EVT ExtVT = VecVT.getVectorElementType();  in visitEXTRACT_VECTOR_ELT()  local
18894   EVT LVT = ExtVT;  in visitEXTRACT_VECTOR_ELT()
18904     if (!BCVT.isVector() || ExtVT.bitsGT(BCVT.getVectorElementType()))  in visitEXTRACT_VECTOR_ELT()
18909     ExtVT = BCVT.getVectorElementType();  in visitEXTRACT_VECTOR_ELT()
18934              VecOp.getOperand(0).getValueType() == ExtVT &&  in visitEXTRACT_VECTOR_ELT()
19882     EVT ExtVT = ExtVec.getValueType();  in combineConcatVectorOfExtracts()  local
19893     if (ExtVT.getSizeInBits() != VT.getSizeInBits())  in combineConcatVectorOfExtracts()
19897     int NumExtElts = ExtVT.getVectorNumElements();  in combineConcatVectorOfExtracts()