Lines Matching refs:MCRegister
295 std::pair<Register /* evictor */, MCRegister /* physreg */>;
319 void addEviction(MCRegister PhysReg, Register Evictor, Register Evictee) { in addEviction()
353 MCRegister PhysReg;
365 void reset(InterferenceCache &Cache, MCRegister Reg) { in reset()
426 MCRegister selectOrSplit(LiveInterval &,
446 MCRegister selectOrSplitImpl(LiveInterval &, SmallVectorImpl<Register> &,
470 void calcGapWeights(MCRegister, SmallVectorImpl<float> &);
473 bool canEvictInterference(LiveInterval &, MCRegister, bool, EvictionCost &,
476 MCRegister PhysReg, SlotIndex Start,
478 MCRegister getCheapestEvicteeWeight(const AllocationOrder &Order,
482 void evictInterference(LiveInterval &, MCRegister,
484 bool mayRecolorAllInterferences(MCRegister PhysReg, LiveInterval &VirtReg,
488 MCRegister tryAssign(LiveInterval&, AllocationOrder&,
491 MCRegister tryEvict(LiveInterval &, AllocationOrder &,
494 MCRegister tryRegionSplit(LiveInterval &, AllocationOrder &,
508 MCRegister tryAssignCSRFirstTime(LiveInterval &VirtReg,
509 AllocationOrder &Order, MCRegister PhysReg,
538 MCRegister PhysReg;
540 HintInfo(BlockFrequency Freq, Register Reg, MCRegister PhysReg) in HintInfo()
545 BlockFrequency getBrokenHintFreq(const HintsInfo &, MCRegister);
548 bool isUnusedCalleeSavedReg(MCRegister PhysReg) const;
818 MCRegister RAGreedy::tryAssign(LiveInterval &VirtReg, in tryAssign()
822 MCRegister PhysReg; in tryAssign()
841 MCRegister PhysHint = Hint.asMCReg(); in tryAssign()
864 MCRegister CheapReg = tryEvict(VirtReg, Order, NewVRegs, Cost, FixedRegisters); in tryAssign()
875 MCRegister PhysReg; in canReassign()
937 LiveInterval &VirtReg, MCRegister PhysReg, bool IsHint, in canEvictInterference()
1035 MCRegister PhysReg, SlotIndex Start, in canEvictInterferenceInRange()
1086 MCRegister RAGreedy::getCheapestEvicteeWeight(const AllocationOrder &Order, in getCheapestEvicteeWeight()
1093 MCRegister BestEvicteePhys; in getCheapestEvicteeWeight()
1096 for (MCRegister PhysReg : Order.getOrder()) { in getCheapestEvicteeWeight()
1112 void RAGreedy::evictInterference(LiveInterval &VirtReg, MCRegister PhysReg, in evictInterference()
1157 bool RAGreedy::isUnusedCalleeSavedReg(MCRegister PhysReg) const { in isUnusedCalleeSavedReg()
1158 MCRegister CSR = RegClassInfo.getLastCalleeSavedAlias(PhysReg); in isUnusedCalleeSavedReg()
1169 MCRegister RAGreedy::tryEvict(LiveInterval &VirtReg, AllocationOrder &Order, in tryEvict()
1179 MCRegister BestPhys; in tryEvict()
1208 MCRegister PhysReg = *I; in tryEvict()
1436 Cand.reset(IntfCache, MCRegister::NoRegister); in calcCompactRegion()
1547 MCRegister PhysReg = VregEvictorInfo.second; in splitCanCauseEvictionChain()
1554 MCRegister FutureEvictedPhysReg = in splitCanCauseEvictionChain()
1855 MCRegister RAGreedy::tryRegionSplit(LiveInterval &VirtReg, in tryRegionSplit()
1859 return MCRegister::NoRegister; in tryRegionSplit()
1889 return MCRegister::NoRegister; in tryRegionSplit()
1894 return MCRegister::NoRegister; in tryRegionSplit()
2177 void RAGreedy::calcGapWeights(MCRegister PhysReg, in calcGapWeights()
2524 MCRegister PhysReg = tryRegionSplit(VirtReg, Order, NewVRegs); in trySplit()
2555 MCRegister PhysReg, LiveInterval &VirtReg, SmallLISet &RecoloringCandidates, in mayRecolorAllInterferences()
2654 DenseMap<Register, MCRegister> VirtRegToPhysReg; in tryLastChanceRecoloring()
2661 for (MCRegister PhysReg : Order) { in tryLastChanceRecoloring()
2743 MCRegister ItPhysReg = VirtRegToPhysReg[ItVirtReg]; in tryLastChanceRecoloring()
2767 MCRegister PhysReg = in tryRecoloringCandidates()
2795 MCRegister RAGreedy::selectOrSplit(LiveInterval &VirtReg, in selectOrSplit()
2800 MCRegister Reg = selectOrSplitImpl(VirtReg, NewVRegs, FixedRegisters); in selectOrSplit()
2825 MCRegister
2827 MCRegister PhysReg, uint8_t &CostPerUseLimit, in tryAssignCSRFirstTime()
2905 MCRegister OtherPhysReg = in collectHintInfo()
2917 MCRegister PhysReg) { in getBrokenHintFreq()
2942 MCRegister PhysReg = VRM->getPhys(Reg); in tryHintRecoloring()
2968 MCRegister CurrPhys = VRM->getPhys(Reg); in tryHintRecoloring()
3059 MCRegister RAGreedy::selectOrSplitImpl(LiveInterval &VirtReg, in selectOrSplitImpl()
3067 if (MCRegister PhysReg = in selectOrSplitImpl()
3076 MCRegister CSRReg = tryAssignCSRFirstTime(VirtReg, Order, PhysReg, in selectOrSplitImpl()