Lines Matching refs:Schedule

67   BB = Schedule.getLoop()->getTopBlock();  in expand()
74 for (MachineInstr *MI : Schedule.getInstructions()) { in expand()
75 int DefStage = Schedule.getStage(MI); in expand()
89 int UseStage = Schedule.getStage(UseMI); in expand()
115 unsigned MaxStageCount = Schedule.getNumStages() - 1; in generatePipelinedLoop()
132 for (MachineInstr *CI : Schedule.getInstructions()) { in generatePipelinedLoop()
135 unsigned StageNum = Schedule.getStage(CI); in generatePipelinedLoop()
216 if (Schedule.getStage(&*BBI) == StageNum) { in generateProlog()
294 if ((unsigned)Schedule.getStage(In) == StageNum) { in generateEpilog()
398 int StageScheduled = Schedule.getStage(&*BBI); in generateExistingPhis()
399 int LoopValStage = Schedule.getStage(MRI.getVRegDef(LoopVal)); in generateExistingPhis()
453 int PhiStage = Schedule.getStage(InstOp1); in generateExistingPhis()
459 int PhiOpStage = Schedule.getStage(InstOp1); in generateExistingPhis()
629 int StageScheduled = Schedule.getStage(&*BBI); in generatePhis()
1015 if (Schedule.getStage(LoopDef) > (signed)InstStageNum) in cloneAndChangeInstr()
1046 int DefStageNum = Schedule.getStage(Def); in updateInstruction()
1121 unsigned PhiStage = (unsigned)Schedule.getStage(MRI.getVRegDef(PhiDef)); in rewritePhiValues()
1122 unsigned LoopStage = (unsigned)Schedule.getStage(MRI.getVRegDef(LoopVal)); in rewritePhiValues()
1144 bool InProlog = (CurStageNum < (unsigned)Schedule.getNumStages() - 1); in rewriteScheduledInstr()
1145 int StagePhi = Schedule.getStage(Phi) + PhiNum; in rewriteScheduledInstr()
1165 int StageSched = Schedule.getStage(OrigMI); in rewriteScheduledInstr()
1166 int CycleSched = Schedule.getCycle(OrigMI); in rewriteScheduledInstr()
1170 int CyclePhi = Schedule.getCycle(Phi); in rewriteScheduledInstr()
1197 int DefCycle = Schedule.getCycle(&Phi); in isLoopCarried()
1198 int DefStage = Schedule.getStage(&Phi); in isLoopCarried()
1206 int LoopCycle = Schedule.getCycle(Use); in isLoopCarried()
1207 int LoopStage = Schedule.getStage(Use); in isLoopCarried()
1726 BitVector LS(Schedule.getNumStages(), true); in peelPrologAndEpilogs()
1727 BitVector AS(Schedule.getNumStages(), true); in peelPrologAndEpilogs()
1733 for (int I = 0; I < Schedule.getNumStages() - 1; ++I) { in peelPrologAndEpilogs()
1764 for (int I = 1; I <= Schedule.getNumStages() - 1; ++I) { in peelPrologAndEpilogs()
1767 filterInstructions(B, Schedule.getNumStages() - I); in peelPrologAndEpilogs()
1772 PhiNodeLoopIteration[&*Phi] = Schedule.getNumStages() - I; in peelPrologAndEpilogs()
1778 unsigned Stage = Schedule.getNumStages() - 1 + I - J; in peelPrologAndEpilogs()
1939 int TC = Schedule.getNumStages() - 1; in fixupBranches()
1976 LoopInfo->adjustTripCount(-(Schedule.getNumStages() - 1)); in fixupBranches()
1984 KernelRewriter KR(*Schedule.getLoop(), Schedule, BB); in rewriteKernel()
1989 BB = Schedule.getLoop()->getTopBlock(); in expand()
1990 Preheader = Schedule.getLoop()->getLoopPreheader(); in expand()
1991 LLVM_DEBUG(Schedule.dump()); in expand()
2001 BB = Schedule.getLoop()->getTopBlock(); in validateAgainstModuloScheduleExpander()
2002 Preheader = Schedule.getLoop()->getLoopPreheader(); in validateAgainstModuloScheduleExpander()
2008 Schedule.print(OS); in validateAgainstModuloScheduleExpander()
2014 ModuloScheduleExpander MSE(MF, Schedule, *LIS, in validateAgainstModuloScheduleExpander()
2027 KernelRewriter KR(*Schedule.getLoop(), Schedule, BB); in validateAgainstModuloScheduleExpander()