Lines Matching refs:LaneMask
377 Register Reg, LaneBitmask LaneMask) { in extendSegmentsToUses() argument
388 if ((SR.LaneMask & M).any()) { in extendSegmentsToUses()
389 assert(SR.LaneMask == M && "Expecting lane masks to match exactly"); in extendSegmentsToUses()
397 const LiveRange &OldRange = getSubRange(LI, LaneMask); in extendSegmentsToUses()
444 assert(LaneMask.any() && in extendSegmentsToUses()
447 LI.computeSubRangeUndefs(Undefs, LaneMask, *MRI, *Indexes); in extendSegmentsToUses()
579 LaneBitmask LaneMask = TRI->getSubRegIndexLaneMask(SubReg); in shrinkToUses() local
580 if ((LaneMask & SR.LaneMask).none()) in shrinkToUses()
608 extendSegmentsToUses(NewLR, WorkList, Reg, SR.LaneMask); in shrinkToUses()
783 DefinedLanesMask |= SR.LaneMask; in addKillFlags()
1037 LaneBitmask LaneMask = SubReg ? TRI.getSubRegIndexLaneMask(SubReg) in updateAllRanges() local
1040 if ((S.LaneMask & LaneMask).none()) in updateAllRanges()
1042 updateRange(S, Reg, S.LaneMask); in updateAllRanges()
1077 void updateRange(LiveRange &LR, Register Reg, LaneBitmask LaneMask) { in updateRange() argument
1084 if (LaneMask.any()) in updateRange()
1085 dbgs() << " L" << PrintLaneMask(LaneMask); in updateRange()
1094 handleMoveUp(LR, Reg, LaneMask); in updateRange()
1274 void handleMoveUp(LiveRange &LR, Register Reg, LaneBitmask LaneMask) { in handleMoveUp() argument
1298 OldIdxIn->end = findLastUseBefore(DefBeforeOldIdx, Reg, LaneMask); in handleMoveUp()
1457 LaneBitmask LaneMask) { in findLastUseBefore() argument
1464 if (SubReg != 0 && LaneMask.any() in findLastUseBefore()
1465 && (TRI.getSubRegIndexLaneMask(SubReg) & LaneMask).none()) in findLastUseBefore()
1571 LaneBitmask LaneMask) { in repairOldRegInRange() argument
1605 if ((Mask & LaneMask).none()) in repairOldRegInRange()
1706 repairOldRegInRange(Begin, End, EndIdx, S, Reg, S.LaneMask); in repairIntervalsInRange()