Lines Matching refs:RevCond
1038 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); in AnalyzeBranches() local
1039 BBI.IsBrReversible = (RevCond.size() == 0) || in AnalyzeBranches()
1040 !TII->reverseBranchCondition(RevCond); in AnalyzeBranches()
1286 RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); in AnalyzeBlock() local
1287 bool CanRevCond = !TII->reverseBranchCondition(RevCond); in AnalyzeBlock()
1305 bool FalseFeasible = FeasibilityAnalysis(FalseBBI, RevCond, in AnalyzeBlock()
1396 FeasibilityAnalysis(FalseBBI, RevCond, true)) { in AnalyzeBlock()
1407 FeasibilityAnalysis(FalseBBI, RevCond, true, true)) { in AnalyzeBlock()
1417 FeasibilityAnalysis(FalseBBI, RevCond)) { in AnalyzeBlock()
1705 SmallVector<MachineOperand, 4> RevCond(CvtBBI->BrCond.begin(), in IfConvertTriangle() local
1707 if (TII->reverseBranchCondition(RevCond)) in IfConvertTriangle()
1723 TII->insertBranch(*BBI.BB, CvtBBI->FalseBB, nullptr, RevCond, dl); in IfConvertTriangle()
1797 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); in IfConvertDiamondCommon() local
1798 if (TII->reverseBranchCondition(RevCond)) in IfConvertDiamondCommon()
1801 SmallVector<MachineOperand, 4> *Cond2 = &RevCond; in IfConvertDiamondCommon()