Lines Matching refs:assert

63     assert(RegBanks[Idx] != nullptr && "Invalid RegisterBank");  in RegisterBankInfo()
64 assert(RegBanks[Idx]->isValid() && "RegisterBank should be valid"); in RegisterBankInfo()
73 assert(Idx == RegBank.getID() && in verify()
76 assert(RegBank.verify(TRI) && "RegBank is invalid"); in verify()
91 assert(Reg && "NoRegister does not have a register bank"); in getRegBank()
103 assert(Register::isPhysicalRegister(Reg) && "Reg must be a physreg"); in getMinimalPhysRegClass()
127 assert(RegBank.covers(*RC) && in getRegBankFromConstraints()
259 assert(CompleteMapping && "Setting an uncomplete mapping"); in getInstrMappingImpl()
385 assert(((IsInvalid && ID == InvalidMappingID && Cost == 0 && in getInstructionMappingImpl()
427 assert(Mapping->verify(MI) && "Mapping is invalid"); in getInstrPossibleMappings()
455 assert(OpdMapper.getInstrMapping().getOperandMapping(OpIdx).NumBreakDowns != in applyDefaultMapping()
458 assert(OpdMapper.getInstrMapping().getOperandMapping(OpIdx).NumBreakDowns == in applyDefaultMapping()
482 assert(OrigTy.getSizeInBits() <= NewTy.getSizeInBits() && in applyDefaultMapping()
502 assert(RC && "Expecting Register class"); in getSizeInBits()
519 assert(RegBank && "Register bank not set"); in verify()
520 assert(Length && "Empty mapping"); in verify()
521 assert((StartIdx <= getHighBitIdx()) && "Overflow, switch to APInt?"); in verify()
523 assert(RegBank->getSize() >= Length && "Register bank too small for Mask"); in verify()
549 assert(NumBreakDowns && "Value mapped nowhere?!"); in verify()
554 assert(PartMap.verify() && "Partial mapping is invalid"); in verify()
560 assert(OrigValueBitWidth >= MeaningfulBitWidth && in verify()
570 assert((ValueMask & PartMapMask) == PartMapMask && in verify()
573 assert(ValueMask.isAllOnesValue() && "Value is not fully mapped"); in verify()
600 assert(NumOperands == (isCopyLike(MI) ? 1 : MI.getNumOperands()) && in verify()
602 assert(MI.getParent() && MI.getMF() && in verify()
611 assert(!getOperandMapping(Idx).isValid() && in verify()
618 assert(getOperandMapping(Idx).isValid() && in verify()
624 assert(MOMapping.verify(RBI->getSizeInBits( in verify()
657 assert(InstrMapping.verify(MI) && "Invalid mapping for MI"); in OperandsMapper()
662 assert(OpIdx < getInstrMapping().getNumOperands() && "Out-of-bound access"); in getVRegsMem()
690 assert((NewVRegs.size() == StartIdx + NumVal || in getNewVRegsEnd()
698 assert(OpIdx < getInstrMapping().getNumOperands() && "Out-of-bound access"); in createVRegs()
704 assert(PartMap != ValMapping.end() && "Out-of-bound access"); in createVRegs()
705 assert(NewVReg == 0 && "Register has already been created"); in createVRegs()
720 assert(OpIdx < getInstrMapping().getNumOperands() && "Out-of-bound access"); in setVRegs()
721 assert(getInstrMapping().getOperandMapping(OpIdx).NumBreakDowns > in setVRegs()
726 assert(NewVRegs[OpToNewVRegIdx[OpIdx] + PartialMapIdx] == 0 && in setVRegs()
735 assert(OpIdx < getInstrMapping().getNumOperands() && "Out-of-bound access"); in getVRegs()
749 assert((VReg || ForDebug) && "Some registers are uninitialized"); in getVRegs()