Lines Matching refs:getReg
242 Regs[StartIdx + I] = MI.getOperand(I).getReg(); in getUnmergeResults()
282 PadReg = MIRBuilder.buildConstant(GCDTy, 0).getReg(0); in buildLCMMergePieces()
284 PadReg = MIRBuilder.buildUndef(GCDTy).getReg(0); in buildLCMMergePieces()
291 PadReg = MIRBuilder.buildAShr(GCDTy, VRegs.back(), ShiftAmt).getReg(0); in buildLCMMergePieces()
329 AllPadReg = MIRBuilder.buildUndef(NarrowTy).getReg(0); in buildLCMMergePieces()
331 AllPadReg = MIRBuilder.buildConstant(NarrowTy, 0).getReg(0); in buildLCMMergePieces()
347 Remerge[I] = MIRBuilder.buildMerge(NarrowTy, SubMerge).getReg(0); in buildLCMMergePieces()
523 Register VReg = MI.getOperand(0).getReg(); in isLibCallInTailPosition()
524 if (!VReg.isVirtual() || VReg != Next->getOperand(1).getReg()) in isLibCallInTailPosition()
527 Register PReg = Next->getOperand(0).getReg(); in isLibCallInTailPosition()
538 if (PReg != Ret->getOperand(0).getReg()) in isLibCallInTailPosition()
588 Args.push_back({MI.getOperand(i).getReg(), OpType, 0}); in simpleLibcall()
590 {MI.getOperand(0).getReg(), OpType, 0}, Args); in simpleLibcall()
601 Register Reg = MI.getOperand(i).getReg(); in createMemLibcall()
708 {MI.getOperand(0).getReg(), ToType, 0}, in conversionLibcall()
709 {{MI.getOperand(1).getReg(), FromType, 0}}); in conversionLibcall()
714 LLT LLTy = MRI.getType(MI.getOperand(0).getReg()); in libcall()
766 Type *FromTy = getFloatTypeForLLT(Ctx, MRI.getType(MI.getOperand(1).getReg())); in libcall()
767 Type *ToTy = getFloatTypeForLLT(Ctx, MRI.getType(MI.getOperand(0).getReg())); in libcall()
778 unsigned FromSize = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in libcall()
779 unsigned ToSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in libcall()
793 unsigned FromSize = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in libcall()
794 unsigned ToSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in libcall()
825 uint64_t SizeOp0 = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in narrowScalar()
832 Register DstReg = MI.getOperand(0).getReg(); in narrowScalar()
846 Register ImplicitReg = MIRBuilder.buildUndef(ImplicitTy).getReg(0); in narrowScalar()
857 DstRegs.push_back(MIRBuilder.buildUndef(NarrowTy).getReg(0)); in narrowScalar()
867 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in narrowScalar()
878 PartRegs.push_back(K.getReg(0)); in narrowScalar()
889 LeftoverRegs.push_back(K.getReg(0)); in narrowScalar()
892 insertParts(MI.getOperand(0).getReg(), in narrowScalar()
906 uint64_t SizeOp1 = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in narrowScalar()
913 MIRBuilder.buildCopy(MI.getOperand(0), Unmerge.getReg(0)); in narrowScalar()
1078 extractParts(MI.getOperand(i).getReg(), NarrowTy, NumParts, in narrowScalar()
1108 Register LHS = MI.getOperand(2).getReg(); in narrowScalar()
1126 if (!extractParts(MI.getOperand(3).getReg(), SrcTy, NarrowTy, Unused, in narrowScalar()
1132 Register Dst = MI.getOperand(0).getReg(); in narrowScalar()
1143 auto Xor = MIRBuilder.buildXor(NarrowTy, LHS, RHS).getReg(0); in narrowScalar()
1153 auto Xor = MIRBuilder.buildXor(LeftoverTy, LHS, RHS).getReg(0); in narrowScalar()
1200 MO1.setReg(TruncMIB.getReg(0)); in narrowScalar()
1236 .getReg(0); in narrowScalar()
1253 .getReg(0)); in narrowScalar()
1261 .getReg(0)); in narrowScalar()
1267 Register DstReg = MI.getOperand(0).getReg(); in narrowScalar()
1280 extractParts(MI.getOperand(1).getReg(), NarrowTy, NumParts, SrcRegs); in narrowScalar()
1285 DstRegs.push_back(DstPart.getReg(0)); in narrowScalar()
1326 return MIRBuilder.buildPtrToInt(NewTy, Val).getReg(0); in coerceToScalar()
1334 NewVal = MIRBuilder.buildPtrToInt(NewTy, NewVal).getReg(0); in coerceToScalar()
1335 return MIRBuilder.buildBitcast(NewTy, NewVal).getReg(0); in coerceToScalar()
1342 MO.setReg(ExtB.getReg(0)); in widenScalarSrc()
1349 MO.setReg(ExtB.getReg(0)); in narrowScalarSrc()
1374 MO.setReg(widenWithUnmerge(WideTy, MO.getReg())); in moreElementsVectorDst()
1381 LLT OldTy = MRI.getType(MO.getReg()); in moreElementsVectorSrc()
1390 Parts.push_back(MO.getReg()); in moreElementsVectorSrc()
1392 Register ImpDef = MIRBuilder.buildUndef(OldTy).getReg(0); in moreElementsVectorSrc()
1397 MO.setReg(Concat.getReg(0)); in moreElementsVectorSrc()
1402 Register ImpDef = MIRBuilder.buildUndef(MoreTy).getReg(0); in moreElementsVectorSrc()
1403 MIRBuilder.buildInsert(MoreReg, ImpDef, MO.getReg(), 0); in moreElementsVectorSrc()
1409 Op.setReg(MIRBuilder.buildBitcast(CastTy, Op).getReg(0)); in bitcastSrc()
1426 Register DstReg = MI.getOperand(0).getReg(); in widenScalarMergeValues()
1431 Register Src1 = MI.getOperand(1).getReg(); in widenScalarMergeValues()
1444 Register ResultReg = MIRBuilder.buildZExt(WideTy, Src1).getReg(0); in widenScalarMergeValues()
1449 Register SrcReg = MI.getOperand(I).getReg(); in widenScalarMergeValues()
1503 Register SrcReg = MI.getOperand(I).getReg(); in widenScalarMergeValues()
1509 Unmerges.push_back(Unmerge.getReg(J)); in widenScalarMergeValues()
1515 Register UndefReg = MIRBuilder.buildUndef(GCDTy).getReg(0); in widenScalarMergeValues()
1526 NewMergeRegs.push_back(Merge.getReg(0)); in widenScalarMergeValues()
1535 MIRBuilder.buildTrunc(DstReg, FinalMerge.getReg(0)); in widenScalarMergeValues()
1560 Register Undef = MIRBuilder.buildUndef(WideTy).getReg(0); in widenWithUnmerge()
1563 UnmergeSrc = MIRBuilder.buildMerge(LCMTy, MergeParts).getReg(0); in widenWithUnmerge()
1583 Register SrcReg = MI.getOperand(NumDst).getReg(); in widenScalarUnmergeValues()
1588 Register Dst0Reg = MI.getOperand(0).getReg(); in widenScalarUnmergeValues()
1603 SrcReg = MIRBuilder.buildPtrToInt(SrcTy, SrcReg).getReg(0); in widenScalarUnmergeValues()
1611 SrcReg = MIRBuilder.buildAnyExt(WideTy, SrcReg).getReg(0); in widenScalarUnmergeValues()
1640 WideSrc = MIRBuilder.buildAnyExt(LCMTy, WideSrc).getReg(0); in widenScalarUnmergeValues()
1675 MIB.addDef(MI.getOperand(Idx).getReg()); in widenScalarUnmergeValues()
1682 MIB.addUse(Unmerge.getReg(I)); in widenScalarUnmergeValues()
1687 extractGCDType(Parts, GCDTy, Unmerge.getReg(J)); in widenScalarUnmergeValues()
1696 MIRBuilder.buildMerge(MI.getOperand(I).getReg(), RemergeParts); in widenScalarUnmergeValues()
1708 Register DstReg = MI.getOperand(0).getReg(); in widenScalarExtract()
1709 Register SrcReg = MI.getOperand(1).getReg(); in widenScalarExtract()
1826 CarryIn = MI.getOperand(4).getReg(); in widenScalarAddSubOverflow()
1831 CarryIn = MI.getOperand(4).getReg(); in widenScalarAddSubOverflow()
1836 CarryIn = MI.getOperand(4).getReg(); in widenScalarAddSubOverflow()
1841 CarryIn = MI.getOperand(4).getReg(); in widenScalarAddSubOverflow()
1850 LLT CarryOutTy = MRI.getType(MI.getOperand(1).getReg()); in widenScalarAddSubOverflow()
1854 .getReg(0); in widenScalarAddSubOverflow()
1856 NewOp = MIRBuilder.buildInstr(Opcode, {WideTy}, {LHSExt, RHSExt}).getReg(0); in widenScalarAddSubOverflow()
1858 LLT OrigTy = MRI.getType(MI.getOperand(0).getReg()); in widenScalarAddSubOverflow()
1886 Register DstReg = MI.getOperand(0).getReg(); in widenScalarAddSubShlSat()
1920 Register Result = MI.getOperand(0).getReg(); in widenScalarMulo()
1921 Register OriginalOverflow = MI.getOperand(1).getReg(); in widenScalarMulo()
1922 Register LHS = MI.getOperand(2).getReg(); in widenScalarMulo()
1923 Register RHS = MI.getOperand(3).getReg(); in widenScalarMulo()
2052 Register SrcReg = MI.getOperand(1).getReg(); in widenScalar()
2084 Register DstReg = MI.getOperand(0).getReg(); in widenScalar()
2107 Register DstReg = MI.getOperand(0).getReg(); in widenScalar()
2252 bool IsVec = MRI.getType(MI.getOperand(1).getReg()).isVector(); in widenScalar()
2302 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in widenScalar()
2319 MRI.getType(MI.getOperand(0).getReg())); in widenScalar()
2424 Register VecReg = MI.getOperand(1).getReg(); in widenScalar()
2449 Register VecReg = MI.getOperand(1).getReg(); in widenScalar()
2578 Pieces.push_back(Unmerge.getReg(I)); in getUnmergePieces()
2583 Register Dst = MI.getOperand(0).getReg(); in lowerBitcast()
2584 Register Src = MI.getOperand(1).getReg(); in lowerBitcast()
2629 SrcReg = MIRBuilder.buildBitcast(DstCastTy, SrcReg).getReg(0); in lowerBitcast()
2668 B.buildConstant(IdxTy, Log2_32(OldEltSize))).getReg(0); in getBitcastWiderVectorElementOffset()
2683 Register Dst = MI.getOperand(0).getReg(); in bitcastExtractVectorElt()
2684 Register SrcVec = MI.getOperand(1).getReg(); in bitcastExtractVectorElt()
2685 Register Idx = MI.getOperand(2).getReg(); in bitcastExtractVectorElt()
2694 Register CastVec = MIRBuilder.buildBitcast(CastTy, SrcVec).getReg(0); in bitcastExtractVectorElt()
2726 NewOps[I] = Elt.getReg(0); in bitcastExtractVectorElt()
2767 ScaledIdx).getReg(0); in bitcastExtractVectorElt()
2809 return B.buildOr(TargetTy, MaskedOldElt, ShiftedInsertVal).getReg(0); in buildBitFieldInsert()
2823 Register Dst = MI.getOperand(0).getReg(); in bitcastInsertVectorElt()
2824 Register SrcVec = MI.getOperand(1).getReg(); in bitcastInsertVectorElt()
2825 Register Val = MI.getOperand(2).getReg(); in bitcastInsertVectorElt()
2826 Register Idx = MI.getOperand(3).getReg(); in bitcastInsertVectorElt()
2839 Register CastVec = MIRBuilder.buildBitcast(CastTy, SrcVec).getReg(0); in bitcastInsertVectorElt()
2859 ScaledIdx).getReg(0); in bitcastInsertVectorElt()
2870 CastTy, CastVec, InsertedElt, ScaledIdx).getReg(0); in bitcastInsertVectorElt()
3016 SrcReg = MIRBuilder.buildAnyExt(WideTy, SrcReg).getReg(0); in lowerStore()
3100 if (MRI.getType(MI.getOperand(1).getReg()).isVector()) { in bitcast()
3150 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in lower()
3170 Register Res = MI.getOperand(0).getReg(); in lower()
3171 Register Overflow = MI.getOperand(1).getReg(); in lower()
3172 Register LHS = MI.getOperand(2).getReg(); in lower()
3173 Register RHS = MI.getOperand(3).getReg(); in lower()
3204 Register Res = MI.getOperand(0).getReg(); in lower()
3213 Register SubByReg = MI.getOperand(1).getReg(); in lower()
3219 Register Res = MI.getOperand(0).getReg(); in lower()
3227 Register LHS = MI.getOperand(1).getReg(); in lower()
3228 Register RHS = MI.getOperand(2).getReg(); in lower()
3248 Register OldValRes = MI.getOperand(0).getReg(); in lower()
3249 Register SuccessRes = MI.getOperand(1).getReg(); in lower()
3250 Register Addr = MI.getOperand(2).getReg(); in lower()
3251 Register CmpVal = MI.getOperand(3).getReg(); in lower()
3252 Register NewVal = MI.getOperand(4).getReg(); in lower()
3272 Register Res = MI.getOperand(0).getReg(); in lower()
3273 Register CarryOut = MI.getOperand(1).getReg(); in lower()
3274 Register LHS = MI.getOperand(2).getReg(); in lower()
3275 Register RHS = MI.getOperand(3).getReg(); in lower()
3284 Register Res = MI.getOperand(0).getReg(); in lower()
3285 Register CarryOut = MI.getOperand(1).getReg(); in lower()
3286 Register LHS = MI.getOperand(2).getReg(); in lower()
3287 Register RHS = MI.getOperand(3).getReg(); in lower()
3288 Register CarryIn = MI.getOperand(4).getReg(); in lower()
3300 Register Res = MI.getOperand(0).getReg(); in lower()
3301 Register BorrowOut = MI.getOperand(1).getReg(); in lower()
3302 Register LHS = MI.getOperand(2).getReg(); in lower()
3303 Register RHS = MI.getOperand(3).getReg(); in lower()
3312 Register Res = MI.getOperand(0).getReg(); in lower()
3313 Register BorrowOut = MI.getOperand(1).getReg(); in lower()
3314 Register LHS = MI.getOperand(2).getReg(); in lower()
3315 Register RHS = MI.getOperand(3).getReg(); in lower()
3316 Register BorrowIn = MI.getOperand(4).getReg(); in lower()
3361 Register DstReg = MI.getOperand(0).getReg(); in lower()
3362 Register SrcReg = MI.getOperand(1).getReg(); in lower()
3395 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in lower()
3402 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in lower()
3464 return B.buildAnd(IdxTy, IdxReg, B.buildConstant(IdxTy, Imm)).getReg(0); in clampDynamicVectorIndex()
3468 .getReg(0); in clampDynamicVectorIndex()
3487 return MIRBuilder.buildPtrAdd(PtrTy, VecPtr, Mul).getReg(0); in getVectorElementPointer()
3492 Register DstReg = MI.getOperand(0).getReg(); in fewerElementsVectorImplicitDef()
3499 SmallVector<Register, 8> Parts(NumParts, NewUndef.getReg(0)); in fewerElementsVectorImplicitDef()
3525 const Register DstReg = MI.getOperand(0).getReg(); in fewerElementsVectorMultiEltType()
3542 Register SrcReg = MI.getOperand(I).getReg(); in fewerElementsVectorMultiEltType()
3606 Register DstReg = MI.getOperand(0).getReg(); in fewerElementsVectorCasts()
3607 Register SrcReg = MI.getOperand(1).getReg(); in fewerElementsVectorCasts()
3651 Register DstReg = MI.getOperand(0).getReg(); in fewerElementsVectorCmp()
3652 Register Src0Reg = MI.getOperand(2).getReg(); in fewerElementsVectorCmp()
3690 extractParts(MI.getOperand(2).getReg(), NarrowTy1, NumParts, Src1Regs); in fewerElementsVectorCmp()
3691 extractParts(MI.getOperand(3).getReg(), NarrowTy1, NumParts, Src2Regs); in fewerElementsVectorCmp()
3718 Register DstReg = MI.getOperand(0).getReg(); in fewerElementsVectorSelect()
3719 Register CondReg = MI.getOperand(1).getReg(); in fewerElementsVectorSelect()
3767 extractParts(MI.getOperand(1).getReg(), NarrowTy1, NumParts, Src0Regs); in fewerElementsVectorSelect()
3769 extractParts(MI.getOperand(2).getReg(), NarrowTy0, NumParts, Src1Regs); in fewerElementsVectorSelect()
3770 extractParts(MI.getOperand(3).getReg(), NarrowTy0, NumParts, Src2Regs); in fewerElementsVectorSelect()
3791 const Register DstReg = MI.getOperand(0).getReg(); in fewerElementsVectorPhi()
3832 Register SrcReg = MI.getOperand(I).getReg(); in fewerElementsVectorPhi()
3863 const Register SrcReg = MI.getOperand(NumDst).getReg(); in fewerElementsVectorUnmergeValues()
3866 LLT DstTy = MRI.getType(MI.getOperand(0).getReg()); in fewerElementsVectorUnmergeValues()
3887 MIB.addDef(MI.getOperand(I * PartsPerUnmerge + J).getReg()); in fewerElementsVectorUnmergeValues()
3888 MIB.addUse(Unmerge.getReg(I)); in fewerElementsVectorUnmergeValues()
3898 Register Result = MI.getOperand(0).getReg(); in fewerElementsVectorMulo()
3899 Register Overflow = MI.getOperand(1).getReg(); in fewerElementsVectorMulo()
3900 Register LHS = MI.getOperand(2).getReg(); in fewerElementsVectorMulo()
3901 Register RHS = MI.getOperand(3).getReg(); in fewerElementsVectorMulo()
3925 Register Operand1 = UnmergeLHS->getOperand(I).getReg(); in fewerElementsVectorMulo()
3926 Register Operand2 = UnmergeRHS->getOperand(I).getReg(); in fewerElementsVectorMulo()
3929 ResultParts.push_back(PartMul->getOperand(0).getReg()); in fewerElementsVectorMulo()
3930 OverflowParts.push_back(PartMul->getOperand(1).getReg()); in fewerElementsVectorMulo()
3962 Register DstReg = MI.getOperand(0).getReg(); in fewerElementsVectorMerge()
3964 LLT SrcTy = MRI.getType(MI.getOperand(1).getReg()); in fewerElementsVectorMerge()
3970 extractGCDType(Parts, GCDTy, MI.getOperand(I).getReg()); in fewerElementsVectorMerge()
3987 Register DstReg = MI.getOperand(0).getReg(); in fewerElementsVectorExtractInsertVectorElt()
3988 Register SrcVec = MI.getOperand(1).getReg(); in fewerElementsVectorExtractInsertVectorElt()
3994 InsertVal = MI.getOperand(2).getReg(); in fewerElementsVectorExtractInsertVectorElt()
3996 Register Idx = MI.getOperand(MI.getNumOperands() - 1).getReg(); in fewerElementsVectorExtractInsertVectorElt()
4039 VecParts[PartIdx] = InsertPart.getReg(0); in fewerElementsVectorExtractInsertVectorElt()
4073 Register ValReg = LdStMI.getReg(0); in reduceLoadStoreWidth()
4169 DstRegs.push_back(MI.getOperand(I).getReg()); in reduceOperationWidth()
4182 Register SrcReg = MI.getOperand(I + NumDefOps).getReg(); in reduceOperationWidth()
4196 SrcReg = MIRBuilder.buildBitcast(SrcTy, SrcReg).getReg(0); in reduceOperationWidth()
4247 ResultRegs[J].push_back(Inst.getReg(J)); in reduceOperationWidth()
4254 Register Undef = MIRBuilder.buildUndef(NarrowDstTy).getReg(0); in reduceOperationWidth()
4282 Register DstReg = MI.getOperand(0).getReg(); in fewerElementsVectorSextInReg()
4283 Register SrcReg = MI.getOperand(1).getReg(); in fewerElementsVectorSextInReg()
4293 R = MIRBuilder.buildSExtInReg(NarrowTy, R, Imm).getReg(0); in fewerElementsVectorSextInReg()
4439 Register DstReg = MI.getOperand(0).getReg(); in fewerElementsVectorShuffle()
4440 Register Src1Reg = MI.getOperand(1).getReg(); in fewerElementsVectorShuffle()
4441 Register Src2Reg = MI.getOperand(2).getReg(); in fewerElementsVectorShuffle()
4537 SVOps.push_back(MIRBuilder.buildUndef(EltTy).getReg(0)); in fewerElementsVectorShuffle()
4549 .getReg(0)); in fewerElementsVectorShuffle()
4553 Output = MIRBuilder.buildBuildVector(NarrowTy, SVOps).getReg(0); in fewerElementsVectorShuffle()
4556 Output = MIRBuilder.buildUndef(NarrowTy).getReg(0); in fewerElementsVectorShuffle()
4561 ? MIRBuilder.buildUndef(NarrowTy).getReg(0) in fewerElementsVectorShuffle()
4564 Output = MIRBuilder.buildShuffleVector(NarrowTy, Op0, Op1, Ops).getReg(0); in fewerElementsVectorShuffle()
4587 Register SrcReg = MI.getOperand(1).getReg(); in fewerElementsVectorReductions()
4589 Register DstReg = MI.getOperand(0).getReg(); in fewerElementsVectorReductions()
4601 MIRBuilder.buildInstr(Opc, {DstTy}, {SplitSrcs[Part]}).getReg(0)); in fewerElementsVectorReductions()
4665 .getReg(0); in fewerElementsVectorReductions()
4689 MIRBuilder.buildInstr(ScalarOpc, {NarrowTy}, {LHS, RHS}).getReg(0); in tryNarrowPow2Reduction()
4800 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarShift()
4805 Register Amt = MI.getOperand(2).getReg(); in narrowScalarShift()
4858 ResultRegs[0] = Lo.getReg(0); in narrowScalarShift()
4859 ResultRegs[1] = Hi.getReg(0); in narrowScalarShift()
4887 ResultRegs[0] = Lo.getReg(0); in narrowScalarShift()
4888 ResultRegs[1] = Hi.getReg(0); in narrowScalarShift()
4979 if (MRI.getType(MI.getOperand(1).getReg()).isVector()) in moreElementsVector()
4992 LLT DstTy = MRI.getType(MI.getOperand(0).getReg()); in moreElementsVector()
4998 MIB.addDef(MI.getOperand(I).getReg()); in moreElementsVector()
5004 MIB.addUse(MI.getOperand(NumDst).getReg()); in moreElementsVector()
5023 Register DstReg = MI.getOperand(0).getReg(); in moreElementsVectorShuffle()
5024 Register Src1Reg = MI.getOperand(1).getReg(); in moreElementsVectorShuffle()
5025 Register Src2Reg = MI.getOperand(2).getReg(); in moreElementsVectorShuffle()
5053 MIRBuilder.buildShuffleVector(MI.getOperand(0).getReg(), in moreElementsVectorShuffle()
5054 MI.getOperand(1).getReg(), in moreElementsVectorShuffle()
5055 MI.getOperand(2).getReg(), NewMask); in moreElementsVectorShuffle()
5070 B.buildMul(NarrowTy, Src1Regs[DstIdx], Src2Regs[DstIdx]).getReg(0); in multiplyRegisters()
5082 Factors.push_back(Mul.getReg(0)); in multiplyRegisters()
5089 Factors.push_back(Umulh.getReg(0)); in multiplyRegisters()
5101 FactorSum = Uaddo.getReg(0); in multiplyRegisters()
5102 CarrySum = B.buildZExt(NarrowTy, Uaddo.getReg(1)).getReg(0); in multiplyRegisters()
5106 FactorSum = Uaddo.getReg(0); in multiplyRegisters()
5107 MachineInstrBuilder Carry = B.buildZExt(NarrowTy, Uaddo.getReg(1)); in multiplyRegisters()
5108 CarrySum = B.buildAdd(NarrowTy, CarrySum, Carry).getReg(0); in multiplyRegisters()
5112 FactorSum = B.buildAdd(NarrowTy, Factors[0], Factors[1]).getReg(0); in multiplyRegisters()
5114 FactorSum = B.buildAdd(NarrowTy, FactorSum, Factors[i]).getReg(0); in multiplyRegisters()
5129 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarAddSub()
5166 Register Src1 = MI.getOperand(NumDefs).getReg(); in narrowScalarAddSub()
5167 Register Src2 = MI.getOperand(NumDefs + 1).getReg(); in narrowScalarAddSub()
5170 CarryDst = MI.getOperand(1).getReg(); in narrowScalarAddSub()
5172 CarryIn = MI.getOperand(NumDefs + 2).getReg(); in narrowScalarAddSub()
5174 LLT RegTy = MRI.getType(MI.getOperand(0).getReg()); in narrowScalarAddSub()
5209 insertParts(MI.getOperand(0).getReg(), RegTy, NarrowTy, in narrowScalarAddSub()
5219 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarMul()
5220 Register Src1 = MI.getOperand(1).getReg(); in narrowScalarMul()
5221 Register Src2 = MI.getOperand(2).getReg(); in narrowScalarMul()
5260 Register Src = MI.getOperand(1).getReg(); in narrowScalarFPTOI()
5285 int64_t SizeOp1 = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits(); in narrowScalarExtract()
5294 extractParts(MI.getOperand(1).getReg(), NarrowTy, NumParts, SrcRegs); in narrowScalarExtract()
5296 Register OpReg = MI.getOperand(0).getReg(); in narrowScalarExtract()
5333 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarExtract()
5353 LLT RegTy = MRI.getType(MI.getOperand(0).getReg()); in narrowScalarInsert()
5355 extractParts(MI.getOperand(1).getReg(), RegTy, NarrowTy, LeftoverTy, SrcRegs, in narrowScalarInsert()
5362 Register OpReg = MI.getOperand(2).getReg(); in narrowScalarInsert()
5416 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarInsert()
5431 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarBasic()
5440 if (!extractParts(MI.getOperand(1).getReg(), DstTy, NarrowTy, LeftoverTy, in narrowScalarBasic()
5445 if (!extractParts(MI.getOperand(2).getReg(), DstTy, NarrowTy, Unused, in narrowScalarBasic()
5452 DstRegs.push_back(Inst.getReg(0)); in narrowScalarBasic()
5459 DstLeftoverRegs.push_back(Inst.getReg(0)); in narrowScalarBasic()
5475 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarExt()
5476 Register SrcReg = MI.getOperand(1).getReg(); in narrowScalarExt()
5497 Register CondReg = MI.getOperand(1).getReg(); in narrowScalarSelect()
5502 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarSelect()
5509 if (!extractParts(MI.getOperand(2).getReg(), DstTy, NarrowTy, LeftoverTy, in narrowScalarSelect()
5514 if (!extractParts(MI.getOperand(3).getReg(), DstTy, NarrowTy, Unused, in narrowScalarSelect()
5521 DstRegs.push_back(Select.getReg(0)); in narrowScalarSelect()
5527 DstLeftoverRegs.push_back(Select.getReg(0)); in narrowScalarSelect()
5543 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarCTLZ()
5544 Register SrcReg = MI.getOperand(1).getReg(); in narrowScalarCTLZ()
5557 UnmergeSrc.getReg(1), C_0); in narrowScalarCTLZ()
5559 B.buildCTLZ_ZERO_UNDEF(DstTy, UnmergeSrc.getReg(0)) : in narrowScalarCTLZ()
5560 B.buildCTLZ(DstTy, UnmergeSrc.getReg(0)); in narrowScalarCTLZ()
5563 auto HiCTLZ = B.buildCTLZ_ZERO_UNDEF(DstTy, UnmergeSrc.getReg(1)); in narrowScalarCTLZ()
5579 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarCTTZ()
5580 Register SrcReg = MI.getOperand(1).getReg(); in narrowScalarCTTZ()
5593 UnmergeSrc.getReg(0), C_0); in narrowScalarCTTZ()
5595 B.buildCTTZ_ZERO_UNDEF(DstTy, UnmergeSrc.getReg(1)) : in narrowScalarCTTZ()
5596 B.buildCTTZ(DstTy, UnmergeSrc.getReg(1)); in narrowScalarCTTZ()
5599 auto LoCTTZ = B.buildCTTZ_ZERO_UNDEF(DstTy, UnmergeSrc.getReg(0)); in narrowScalarCTTZ()
5615 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarCTPOP()
5617 LLT SrcTy = MRI.getType(MI.getOperand(1).getReg()); in narrowScalarCTPOP()
5623 auto LoCTPOP = MIRBuilder.buildCTPOP(DstTy, UnmergeSrc.getReg(0)); in narrowScalarCTPOP()
5624 auto HiCTPOP = MIRBuilder.buildCTPOP(DstTy, UnmergeSrc.getReg(1)); in narrowScalarCTPOP()
5653 Register DstReg = MI.getOperand(0).getReg(); in lowerBitCount()
5654 Register SrcReg = MI.getOperand(1).getReg(); in lowerBitCount()
5687 Op = MIBOp.getReg(0); in lowerBitCount()
5703 Register DstReg = MI.getOperand(0).getReg(); in lowerBitCount()
5704 Register SrcReg = MI.getOperand(1).getReg(); in lowerBitCount()
5738 MI.getOperand(1).setReg(MIBTmp.getReg(0)); in lowerBitCount()
5742 Register SrcReg = MI.getOperand(1).getReg(); in lowerBitCount()
5789 B.buildLShr(MI.getOperand(0).getReg(), ResTmp, C_SizeM8); in lowerBitCount()
5812 Register Dst = MI.getOperand(0).getReg(); in lowerFunnelShiftWithInverse()
5813 Register X = MI.getOperand(1).getReg(); in lowerFunnelShiftWithInverse()
5814 Register Y = MI.getOperand(2).getReg(); in lowerFunnelShiftWithInverse()
5815 Register Z = MI.getOperand(3).getReg(); in lowerFunnelShiftWithInverse()
5831 Z = MIRBuilder.buildSub(Ty, Zero, Z).getReg(0); in lowerFunnelShiftWithInverse()
5837 Y = MIRBuilder.buildInstr(RevOpcode, {Ty}, {X, Y, One}).getReg(0); in lowerFunnelShiftWithInverse()
5838 X = MIRBuilder.buildLShr(Ty, X, One).getReg(0); in lowerFunnelShiftWithInverse()
5840 X = MIRBuilder.buildInstr(RevOpcode, {Ty}, {X, Y, One}).getReg(0); in lowerFunnelShiftWithInverse()
5841 Y = MIRBuilder.buildShl(Ty, Y, One).getReg(0); in lowerFunnelShiftWithInverse()
5844 Z = MIRBuilder.buildNot(ShTy, Z).getReg(0); in lowerFunnelShiftWithInverse()
5854 Register Dst = MI.getOperand(0).getReg(); in lowerFunnelShiftAsShifts()
5855 Register X = MI.getOperand(1).getReg(); in lowerFunnelShiftAsShifts()
5856 Register Y = MI.getOperand(2).getReg(); in lowerFunnelShiftAsShifts()
5857 Register Z = MI.getOperand(3).getReg(); in lowerFunnelShiftAsShifts()
5873 ShAmt = MIRBuilder.buildURem(ShTy, Z, BitWidthC).getReg(0); in lowerFunnelShiftAsShifts()
5874 InvShAmt = MIRBuilder.buildSub(ShTy, BitWidthC, ShAmt).getReg(0); in lowerFunnelShiftAsShifts()
5875 ShX = MIRBuilder.buildShl(Ty, X, IsFSHL ? ShAmt : InvShAmt).getReg(0); in lowerFunnelShiftAsShifts()
5876 ShY = MIRBuilder.buildLShr(Ty, Y, IsFSHL ? InvShAmt : ShAmt).getReg(0); in lowerFunnelShiftAsShifts()
5883 ShAmt = MIRBuilder.buildAnd(ShTy, Z, Mask).getReg(0); in lowerFunnelShiftAsShifts()
5886 InvShAmt = MIRBuilder.buildAnd(ShTy, NotZ, Mask).getReg(0); in lowerFunnelShiftAsShifts()
5889 ShAmt = MIRBuilder.buildURem(ShTy, Z, BitWidthC).getReg(0); in lowerFunnelShiftAsShifts()
5890 InvShAmt = MIRBuilder.buildSub(ShTy, Mask, ShAmt).getReg(0); in lowerFunnelShiftAsShifts()
5895 ShX = MIRBuilder.buildShl(Ty, X, ShAmt).getReg(0); in lowerFunnelShiftAsShifts()
5897 ShY = MIRBuilder.buildLShr(Ty, ShY1, InvShAmt).getReg(0); in lowerFunnelShiftAsShifts()
5900 ShX = MIRBuilder.buildShl(Ty, ShX1, InvShAmt).getReg(0); in lowerFunnelShiftAsShifts()
5901 ShY = MIRBuilder.buildLShr(Ty, Y, ShAmt).getReg(0); in lowerFunnelShiftAsShifts()
5916 Register Dst = MI.getOperand(0).getReg(); in lowerFunnelShift()
5918 LLT ShTy = MRI.getType(MI.getOperand(3).getReg()); in lowerFunnelShift()
5936 Register Dst = MI.getOperand(0).getReg(); in lowerRotateWithReverseRotate()
5937 Register Src = MI.getOperand(1).getReg(); in lowerRotateWithReverseRotate()
5938 Register Amt = MI.getOperand(2).getReg(); in lowerRotateWithReverseRotate()
5950 Register Dst = MI.getOperand(0).getReg(); in lowerRotate()
5951 Register Src = MI.getOperand(1).getReg(); in lowerRotate()
5952 Register Amt = MI.getOperand(2).getReg(); in lowerRotate()
5979 ShVal = MIRBuilder.buildInstr(ShOpc, {DstTy}, {Src, ShAmt}).getReg(0); in lowerRotate()
5982 MIRBuilder.buildInstr(RevShiftOpc, {DstTy}, {Src, RevAmt}).getReg(0); in lowerRotate()
5988 ShVal = MIRBuilder.buildInstr(ShOpc, {DstTy}, {Src, ShAmt}).getReg(0); in lowerRotate()
5993 MIRBuilder.buildInstr(RevShiftOpc, {DstTy}, {Inner, RevAmt}).getReg(0); in lowerRotate()
6004 Register Dst = MI.getOperand(0).getReg(); in lowerU64ToF32BitOps()
6005 Register Src = MI.getOperand(1).getReg(); in lowerU64ToF32BitOps()
6060 Register Dst = MI.getOperand(0).getReg(); in lowerUITOFP()
6061 Register Src = MI.getOperand(1).getReg(); in lowerUITOFP()
6088 Register Dst = MI.getOperand(0).getReg(); in lowerSITOFP()
6089 Register Src = MI.getOperand(1).getReg(); in lowerSITOFP()
6134 Register Dst = MI.getOperand(0).getReg(); in lowerFPTOUI()
6135 Register Src = MI.getOperand(1).getReg(); in lowerFPTOUI()
6177 Register Dst = MI.getOperand(0).getReg(); in lowerFPTOSI()
6178 Register Src = MI.getOperand(1).getReg(); in lowerFPTOSI()
6246 Register Dst = MI.getOperand(0).getReg(); in lowerFPTRUNC_F64_TO_F16()
6247 Register Src = MI.getOperand(1).getReg(); in lowerFPTRUNC_F64_TO_F16()
6259 Register U = Unmerge.getReg(0); in lowerFPTRUNC_F64_TO_F16()
6260 Register UH = Unmerge.getReg(1); in lowerFPTRUNC_F64_TO_F16()
6351 Register Dst = MI.getOperand(0).getReg(); in lowerFPTRUNC()
6352 Register Src = MI.getOperand(1).getReg(); in lowerFPTRUNC()
6368 Register Dst = MI.getOperand(0).getReg(); in lowerFPOWI()
6369 Register Src0 = MI.getOperand(1).getReg(); in lowerFPOWI()
6370 Register Src1 = MI.getOperand(2).getReg(); in lowerFPOWI()
6395 Register Dst = MI.getOperand(0).getReg(); in lowerMinMax()
6396 Register Src0 = MI.getOperand(1).getReg(); in lowerMinMax()
6397 Register Src1 = MI.getOperand(2).getReg(); in lowerMinMax()
6411 Register Dst = MI.getOperand(0).getReg(); in lowerFCopySign()
6412 Register Src0 = MI.getOperand(1).getReg(); in lowerFCopySign()
6413 Register Src1 = MI.getOperand(2).getReg(); in lowerFCopySign()
6427 Register And0 = MIRBuilder.buildAnd(Src0Ty, Src0, NotSignBitMask).getReg(0); in lowerFCopySign()
6430 And1 = MIRBuilder.buildAnd(Src1Ty, Src1, SignBitMask).getReg(0); in lowerFCopySign()
6435 And1 = MIRBuilder.buildAnd(Src0Ty, Shift, SignBitMask).getReg(0); in lowerFCopySign()
6440 And1 = MIRBuilder.buildAnd(Src0Ty, Trunc, SignBitMask).getReg(0); in lowerFCopySign()
6458 Register Dst = MI.getOperand(0).getReg(); in lowerFMinNumMaxNum()
6459 Register Src0 = MI.getOperand(1).getReg(); in lowerFMinNumMaxNum()
6460 Register Src1 = MI.getOperand(2).getReg(); in lowerFMinNumMaxNum()
6471 Src0 = MIRBuilder.buildFCanonicalize(Ty, Src0, MI.getFlags()).getReg(0); in lowerFMinNumMaxNum()
6474 Src1 = MIRBuilder.buildFCanonicalize(Ty, Src1, MI.getFlags()).getReg(0); in lowerFMinNumMaxNum()
6486 Register DstReg = MI.getOperand(0).getReg(); in lowerFMad()
6499 Register DstReg = MI.getOperand(0).getReg(); in lowerIntrinsicRound()
6500 Register X = MI.getOperand(1).getReg(); in lowerIntrinsicRound()
6532 Register DstReg = MI.getOperand(0).getReg(); in lowerFFloor()
6533 Register SrcReg = MI.getOperand(1).getReg(); in lowerFFloor()
6560 Register DstReg = MI.getOperand(0).getReg(); in lowerMergeValues()
6561 Register Src0Reg = MI.getOperand(1).getReg(); in lowerMergeValues()
6567 Register ResultReg = MIRBuilder.buildZExt(WideTy, Src0Reg).getReg(0); in lowerMergeValues()
6572 Register SrcReg = MI.getOperand(I).getReg(); in lowerMergeValues()
6601 Register SrcReg = MI.getOperand(NumDst).getReg(); in lowerUnmergeValues()
6602 Register Dst0Reg = MI.getOperand(0).getReg(); in lowerUnmergeValues()
6640 Register DstReg = MI.getOperand(0).getReg(); in lowerExtractInsertVectorElt()
6641 Register SrcVec = MI.getOperand(1).getReg(); in lowerExtractInsertVectorElt()
6644 InsertVal = MI.getOperand(2).getReg(); in lowerExtractInsertVectorElt()
6646 Register Idx = MI.getOperand(MI.getNumOperands() - 1).getReg(); in lowerExtractInsertVectorElt()
6666 Register EltPtr = getVectorElementPointer(StackTemp.getReg(0), VecTy, Idx); in lowerExtractInsertVectorElt()
6695 Register DstReg = MI.getOperand(0).getReg(); in lowerShuffleVector()
6696 Register Src0Reg = MI.getOperand(1).getReg(); in lowerShuffleVector()
6697 Register Src1Reg = MI.getOperand(2).getReg(); in lowerShuffleVector()
6712 Val = MIRBuilder.buildUndef(DstTy).getReg(0); in lowerShuffleVector()
6727 Undef = MIRBuilder.buildUndef(EltTy).getReg(0); in lowerShuffleVector()
6740 BuildVec.push_back(Extract.getReg(0)); in lowerShuffleVector()
6756 Register Dst = MI.getOperand(0).getReg(); in lowerDynStackAlloc()
6757 Register AllocSize = MI.getOperand(1).getReg(); in lowerDynStackAlloc()
6788 Register Dst = MI.getOperand(0).getReg(); in lowerExtract()
6789 Register Src = MI.getOperand(1).getReg(); in lowerExtract()
6801 Src = MIRBuilder.buildBitcast(SrcIntTy, Src).getReg(0); in lowerExtract()
6820 Register Dst = MI.getOperand(0).getReg(); in lowerInsert()
6821 Register Src = MI.getOperand(1).getReg(); in lowerInsert()
6822 Register InsertSrc = MI.getOperand(2).getReg(); in lowerInsert()
6845 Src = MIRBuilder.buildCast(IntDstTy, Src).getReg(0); in lowerInsert()
6850 InsertSrc = MIRBuilder.buildPtrToInt(IntInsertTy, InsertSrc).getReg(0); in lowerInsert()
6853 Register ExtInsSrc = MIRBuilder.buildZExt(IntDstTy, InsertSrc).getReg(0); in lowerInsert()
6856 ExtInsSrc = MIRBuilder.buildShl(IntDstTy, ExtInsSrc, ShiftAmt).getReg(0); in lowerInsert()
6873 Register Dst0 = MI.getOperand(0).getReg(); in lowerSADDO_SSUBO()
6874 Register Dst1 = MI.getOperand(1).getReg(); in lowerSADDO_SSUBO()
6875 Register LHS = MI.getOperand(2).getReg(); in lowerSADDO_SSUBO()
6876 Register RHS = MI.getOperand(3).getReg(); in lowerSADDO_SSUBO()
6909 Register Res = MI.getOperand(0).getReg(); in lowerAddSubSatToMinMax()
6910 Register LHS = MI.getOperand(1).getReg(); in lowerAddSubSatToMinMax()
6911 Register RHS = MI.getOperand(2).getReg(); in lowerAddSubSatToMinMax()
6975 Register Not = IsAdd ? MIRBuilder.buildNot(Ty, LHS).getReg(0) : LHS; in lowerAddSubSatToMinMax()
6986 Register Res = MI.getOperand(0).getReg(); in lowerAddSubSatToAddoSubo()
6987 Register LHS = MI.getOperand(1).getReg(); in lowerAddSubSatToAddoSubo()
6988 Register RHS = MI.getOperand(2).getReg(); in lowerAddSubSatToAddoSubo()
7021 Register Tmp = OverflowRes.getReg(0); in lowerAddSubSatToAddoSubo()
7022 Register Ov = OverflowRes.getReg(1); in lowerAddSubSatToAddoSubo()
7058 Register Res = MI.getOperand(0).getReg(); in lowerShlSat()
7059 Register LHS = MI.getOperand(1).getReg(); in lowerShlSat()
7060 Register RHS = MI.getOperand(2).getReg(); in lowerShlSat()
7088 Register Dst = MI.getOperand(0).getReg(); in lowerBswap()
7089 Register Src = MI.getOperand(1).getReg(); in lowerBswap()
7134 Register Dst = MI.getOperand(0).getReg(); in lowerBitreverse()
7135 Register Src = MI.getOperand(1).getReg(); in lowerBitreverse()
7171 Register ValReg = MI.getOperand(ValRegIndex).getReg(); in lowerReadWriteRegister()
7193 Register Result = MI.getOperand(0).getReg(); in lowerSMULH_UMULH()
7213 Register DstReg = MI.getOperand(0).getReg(); in lowerSelect()
7214 Register MaskReg = MI.getOperand(1).getReg(); in lowerSelect()
7215 Register Op1Reg = MI.getOperand(2).getReg(); in lowerSelect()
7216 Register Op2Reg = MI.getOperand(3).getReg(); in lowerSelect()
7228 MaskElt = MIRBuilder.buildSExt(DstTy.getElementType(), MaskElt).getReg(0); in lowerSelect()
7232 MI.getOperand(1).setReg(ShufSplat.getReg(0)); in lowerSelect()
7256 {MI.getOperand(0).getReg()}, {MI.getOperand(2), MI.getOperand(3)}); in lowerDIVREM()
7260 {MI.getOperand(1).getReg()}, {MI.getOperand(2), MI.getOperand(3)}); in lowerDIVREM()
7271 LLT DstTy = MRI.getType(MI.getOperand(0).getReg()); in lowerAbsToAddXor()
7272 Register OpReg = MI.getOperand(1).getReg(); in lowerAbsToAddXor()
7277 MIRBuilder.buildXor(MI.getOperand(0).getReg(), Add, Shift); in lowerAbsToAddXor()
7288 Register SrcReg = MI.getOperand(1).getReg(); in lowerAbsToMaxNeg()
7290 auto Zero = MIRBuilder.buildConstant(Ty, 0).getReg(0); in lowerAbsToMaxNeg()
7291 auto Sub = MIRBuilder.buildSub(Ty, Zero, SrcReg).getReg(0); in lowerAbsToMaxNeg()