Lines Matching refs:Register

152 void LegalizerHelper::extractParts(Register Reg, LLT Ty, int NumParts,  in extractParts()
153 SmallVectorImpl<Register> &VRegs) { in extractParts()
159 bool LegalizerHelper::extractParts(Register Reg, LLT RegTy, in extractParts()
161 SmallVectorImpl<Register> &VRegs, in extractParts()
162 SmallVectorImpl<Register> &LeftoverRegs) { in extractParts()
190 Register NewReg = MRI.createGenericVirtualRegister(MainTy); in extractParts()
197 Register NewReg = MRI.createGenericVirtualRegister(LeftoverTy); in extractParts()
205 void LegalizerHelper::insertParts(Register DstReg, in insertParts()
207 ArrayRef<Register> PartRegs, in insertParts()
209 ArrayRef<Register> LeftoverRegs) { in insertParts()
225 SmallVector<Register> GCDRegs; in insertParts()
227 for (auto PartReg : concat<const Register>(PartRegs, LeftoverRegs)) in insertParts()
234 static void getUnmergeResults(SmallVectorImpl<Register> &Regs, in getUnmergeResults()
245 void LegalizerHelper::extractGCDType(SmallVectorImpl<Register> &Parts, in extractGCDType()
246 LLT GCDTy, Register SrcReg) { in extractGCDType()
259 LLT LegalizerHelper::extractGCDType(SmallVectorImpl<Register> &Parts, LLT DstTy, in extractGCDType()
260 LLT NarrowTy, Register SrcReg) { in extractGCDType()
268 SmallVectorImpl<Register> &VRegs, in buildLCMMergePieces()
276 Register PadReg; in buildLCMMergePieces()
296 SmallVector<Register, 4> Remerge(NumParts); in buildLCMMergePieces()
300 SmallVector<Register, 4> SubMerge(NumSubParts); in buildLCMMergePieces()
304 Register AllPadReg; in buildLCMMergePieces()
358 void LegalizerHelper::buildWidenedRemergeToDst(Register DstReg, LLT LCMTy, in buildWidenedRemergeToDst()
359 ArrayRef<Register> RemergeRegs) { in buildWidenedRemergeToDst()
378 SmallVector<Register, 8> UnmergeDefs(NumDefs); in buildWidenedRemergeToDst()
523 Register VReg = MI.getOperand(0).getReg(); in isLibCallInTailPosition()
527 Register PReg = Next->getOperand(0).getReg(); in isLibCallInTailPosition()
601 Register Reg = MI.getOperand(i).getReg(); in createMemLibcall()
832 Register DstReg = MI.getOperand(0).getReg(); in narrowScalar()
846 Register ImplicitReg = MIRBuilder.buildUndef(ImplicitTy).getReg(0); in narrowScalar()
855 SmallVector<Register, 2> DstRegs; in narrowScalar()
873 SmallVector<Register, 4> PartRegs; in narrowScalar()
883 SmallVector<Register, 1> LeftoverRegs; in narrowScalar()
940 Register DstReg = LoadMI.getDstReg(); in narrowScalar()
946 Register TmpReg = MRI.createGenericVirtualRegister(NarrowTy); in narrowScalar()
958 Register DstReg = LoadMI.getDstReg(); in narrowScalar()
959 Register PtrReg = LoadMI.getPointerReg(); in narrowScalar()
961 Register TmpReg = MRI.createGenericVirtualRegister(NarrowTy); in narrowScalar()
985 Register SrcReg = StoreMI.getValueReg(); in narrowScalar()
997 Register TmpReg = MRI.createGenericVirtualRegister(NarrowTy); in narrowScalar()
1072 SmallVector<Register, 2> DstRegs(NumParts); in narrowScalar()
1073 SmallVector<SmallVector<Register, 2>, 2> SrcRegs(MI.getNumOperands() / 2); in narrowScalar()
1108 Register LHS = MI.getOperand(2).getReg(); in narrowScalar()
1119 SmallVector<Register, 4> LHSPartRegs, LHSLeftoverRegs; in narrowScalar()
1125 SmallVector<Register, 4> RHSPartRegs, RHSLeftoverRegs; in narrowScalar()
1132 Register Dst = MI.getOperand(0).getReg(); in narrowScalar()
1139 SmallVector<Register, 4> Xors; in narrowScalar()
1149 SmallVector<Register, 4> WidenedXors; in narrowScalar()
1172 Register LHSL = LHSPartRegs[0]; in narrowScalar()
1173 Register LHSH = LHSPartRegs[1]; in narrowScalar()
1174 Register RHSL = RHSPartRegs[0]; in narrowScalar()
1175 Register RHSH = RHSPartRegs[1]; in narrowScalar()
1203 Register DstExt = MRI.createGenericVirtualRegister(NarrowTy); in narrowScalar()
1220 SmallVector<Register, 2> DstRegs; in narrowScalar()
1222 SmallVector<Register, 2> SrcRegs; in narrowScalar()
1226 Register SrcReg = MRI.createGenericVirtualRegister(NarrowTy); in narrowScalar()
1234 Register AshrCstReg = in narrowScalar()
1237 Register FullExtensionReg = 0; in narrowScalar()
1238 Register PartialExtensionReg = 0; in narrowScalar()
1267 Register DstReg = MI.getOperand(0).getReg(); in narrowScalar()
1278 SmallVector<Register, 2> SrcRegs, DstRegs; in narrowScalar()
1316 Register LegalizerHelper::coerceToScalar(Register Val) { in coerceToScalar()
1325 return Register(); in coerceToScalar()
1329 Register NewVal = Val; in coerceToScalar()
1355 Register DstExt = MRI.createGenericVirtualRegister(WideTy); in widenScalarDst()
1364 Register DstTrunc = MRI.createGenericVirtualRegister(NarrowTy); in narrowScalarDst()
1389 SmallVector<Register, 8> Parts; in moreElementsVectorSrc()
1392 Register ImpDef = MIRBuilder.buildUndef(OldTy).getReg(0); in moreElementsVectorSrc()
1401 Register MoreReg = MRI.createGenericVirtualRegister(MoreTy); in moreElementsVectorSrc()
1402 Register ImpDef = MIRBuilder.buildUndef(MoreTy).getReg(0); in moreElementsVectorSrc()
1414 Register CastDst = MRI.createGenericVirtualRegister(CastTy); in bitcastDst()
1426 Register DstReg = MI.getOperand(0).getReg(); in widenScalarMergeValues()
1431 Register Src1 = MI.getOperand(1).getReg(); in widenScalarMergeValues()
1444 Register ResultReg = MIRBuilder.buildZExt(WideTy, Src1).getReg(0); in widenScalarMergeValues()
1449 Register SrcReg = MI.getOperand(I).getReg(); in widenScalarMergeValues()
1454 Register NextResult = I + 1 == NumOps && WideTy == DstTy ? DstReg : in widenScalarMergeValues()
1496 SmallVector<Register, 8> Parts; in widenScalarMergeValues()
1497 SmallVector<Register, 8> NewMergeRegs; in widenScalarMergeValues()
1498 SmallVector<Register, 8> Unmerges; in widenScalarMergeValues()
1503 Register SrcReg = MI.getOperand(I).getReg(); in widenScalarMergeValues()
1515 Register UndefReg = MIRBuilder.buildUndef(GCDTy).getReg(0); in widenScalarMergeValues()
1523 ArrayRef<Register> Slicer(Unmerges); in widenScalarMergeValues()
1542 Register LegalizerHelper::widenWithUnmerge(LLT WideTy, Register OrigReg) { in widenWithUnmerge()
1543 Register WideReg = MRI.createGenericVirtualRegister(WideTy); in widenWithUnmerge()
1550 Register UnmergeSrc = WideReg; in widenWithUnmerge()
1560 Register Undef = MIRBuilder.buildUndef(WideTy).getReg(0); in widenWithUnmerge()
1561 SmallVector<Register, 8> MergeParts(NumMergeParts, Undef); in widenWithUnmerge()
1567 SmallVector<Register, 8> UnmergeResults(NumUnmergeParts); in widenWithUnmerge()
1583 Register SrcReg = MI.getOperand(NumDst).getReg(); in widenScalarUnmergeValues()
1588 Register Dst0Reg = MI.getOperand(0).getReg(); in widenScalarUnmergeValues()
1632 Register WideSrc = SrcReg; in widenScalarUnmergeValues()
1685 SmallVector<Register, 16> Parts; in widenScalarUnmergeValues()
1689 SmallVector<Register, 8> RemergeParts; in widenScalarUnmergeValues()
1708 Register DstReg = MI.getOperand(0).getReg(); in widenScalarExtract()
1709 Register SrcReg = MI.getOperand(1).getReg(); in widenScalarExtract()
1803 Optional<Register> CarryIn = None; in widenScalarAddSubOverflow()
1848 Register NewOp; in widenScalarAddSubOverflow()
1886 Register DstReg = MI.getOperand(0).getReg(); in widenScalarAddSubShlSat()
1920 Register Result = MI.getOperand(0).getReg(); in widenScalarMulo()
1921 Register OriginalOverflow = MI.getOperand(1).getReg(); in widenScalarMulo()
1922 Register LHS = MI.getOperand(2).getReg(); in widenScalarMulo()
1923 Register RHS = MI.getOperand(3).getReg(); in widenScalarMulo()
2052 Register SrcReg = MI.getOperand(1).getReg(); in widenScalar()
2084 Register DstReg = MI.getOperand(0).getReg(); in widenScalar()
2086 Register ShrReg = MRI.createGenericVirtualRegister(WideTy); in widenScalar()
2087 Register DstExt = MRI.createGenericVirtualRegister(WideTy); in widenScalar()
2088 Register ShiftAmtReg = MRI.createGenericVirtualRegister(WideTy); in widenScalar()
2107 Register DstReg = MI.getOperand(0).getReg(); in widenScalar()
2111 Register DstExt = MRI.createGenericVirtualRegister(WideTy); in widenScalar()
2424 Register VecReg = MI.getOperand(1).getReg(); in widenScalar()
2449 Register VecReg = MI.getOperand(1).getReg(); in widenScalar()
2574 static void getUnmergePieces(SmallVectorImpl<Register> &Pieces, in getUnmergePieces()
2575 MachineIRBuilder &B, Register Src, LLT Ty) { in getUnmergePieces()
2583 Register Dst = MI.getOperand(0).getReg(); in lowerBitcast()
2584 Register Src = MI.getOperand(1).getReg(); in lowerBitcast()
2590 SmallVector<Register, 8> SrcRegs; in lowerBitcast()
2628 for (Register &SrcReg : SrcRegs) in lowerBitcast()
2639 SmallVector<Register, 8> SrcRegs; in lowerBitcast()
2656 static Register getBitcastWiderVectorElementOffset(MachineIRBuilder &B, in getBitcastWiderVectorElementOffset()
2657 Register Idx, in getBitcastWiderVectorElementOffset()
2683 Register Dst = MI.getOperand(0).getReg(); in bitcastExtractVectorElt()
2684 Register SrcVec = MI.getOperand(1).getReg(); in bitcastExtractVectorElt()
2685 Register Idx = MI.getOperand(2).getReg(); in bitcastExtractVectorElt()
2694 Register CastVec = MIRBuilder.buildBitcast(CastTy, SrcVec).getReg(0); in bitcastExtractVectorElt()
2719 SmallVector<Register, 8> NewOps(NewEltsPerOldElt); in bitcastExtractVectorElt()
2764 Register WideElt = CastVec; in bitcastExtractVectorElt()
2771 Register OffsetBits = getBitcastWiderVectorElementOffset( in bitcastExtractVectorElt()
2788 static Register buildBitFieldInsert(MachineIRBuilder &B, in buildBitFieldInsert()
2789 Register TargetReg, Register InsertReg, in buildBitFieldInsert()
2790 Register OffsetBits) { in buildBitFieldInsert()
2823 Register Dst = MI.getOperand(0).getReg(); in bitcastInsertVectorElt()
2824 Register SrcVec = MI.getOperand(1).getReg(); in bitcastInsertVectorElt()
2825 Register Val = MI.getOperand(2).getReg(); in bitcastInsertVectorElt()
2826 Register Idx = MI.getOperand(3).getReg(); in bitcastInsertVectorElt()
2839 Register CastVec = MIRBuilder.buildBitcast(CastTy, SrcVec).getReg(0); in bitcastInsertVectorElt()
2856 Register ExtractedElt = CastVec; in bitcastInsertVectorElt()
2863 Register OffsetBits = getBitcastWiderVectorElementOffset( in bitcastInsertVectorElt()
2866 Register InsertedElt = buildBitFieldInsert(MIRBuilder, ExtractedElt, in bitcastInsertVectorElt()
2883 Register DstReg = LoadMI.getDstReg(); in lowerLoad()
2884 Register PtrReg = LoadMI.getPointerReg(); in lowerLoad()
2902 Register LoadReg = DstReg; in lowerLoad()
2969 Register PtrAddReg = MRI.createGenericVirtualRegister(PtrTy); in lowerLoad()
2995 Register SrcReg = StoreMI.getValueReg(); in lowerStore()
2996 Register PtrReg = StoreMI.getPointerReg(); in lowerStore()
3048 Register PtrAddReg = MRI.createGenericVirtualRegister(PtrTy); in lowerStore()
3170 Register Res = MI.getOperand(0).getReg(); in lower()
3171 Register Overflow = MI.getOperand(1).getReg(); in lower()
3172 Register LHS = MI.getOperand(2).getReg(); in lower()
3173 Register RHS = MI.getOperand(3).getReg(); in lower()
3204 Register Res = MI.getOperand(0).getReg(); in lower()
3213 Register SubByReg = MI.getOperand(1).getReg(); in lower()
3219 Register Res = MI.getOperand(0).getReg(); in lower()
3227 Register LHS = MI.getOperand(1).getReg(); in lower()
3228 Register RHS = MI.getOperand(2).getReg(); in lower()
3229 Register Neg = MRI.createGenericVirtualRegister(Ty); in lower()
3248 Register OldValRes = MI.getOperand(0).getReg(); in lower()
3249 Register SuccessRes = MI.getOperand(1).getReg(); in lower()
3250 Register Addr = MI.getOperand(2).getReg(); in lower()
3251 Register CmpVal = MI.getOperand(3).getReg(); in lower()
3252 Register NewVal = MI.getOperand(4).getReg(); in lower()
3272 Register Res = MI.getOperand(0).getReg(); in lower()
3273 Register CarryOut = MI.getOperand(1).getReg(); in lower()
3274 Register LHS = MI.getOperand(2).getReg(); in lower()
3275 Register RHS = MI.getOperand(3).getReg(); in lower()
3284 Register Res = MI.getOperand(0).getReg(); in lower()
3285 Register CarryOut = MI.getOperand(1).getReg(); in lower()
3286 Register LHS = MI.getOperand(2).getReg(); in lower()
3287 Register RHS = MI.getOperand(3).getReg(); in lower()
3288 Register CarryIn = MI.getOperand(4).getReg(); in lower()
3300 Register Res = MI.getOperand(0).getReg(); in lower()
3301 Register BorrowOut = MI.getOperand(1).getReg(); in lower()
3302 Register LHS = MI.getOperand(2).getReg(); in lower()
3303 Register RHS = MI.getOperand(3).getReg(); in lower()
3312 Register Res = MI.getOperand(0).getReg(); in lower()
3313 Register BorrowOut = MI.getOperand(1).getReg(); in lower()
3314 Register LHS = MI.getOperand(2).getReg(); in lower()
3315 Register RHS = MI.getOperand(3).getReg(); in lower()
3316 Register BorrowIn = MI.getOperand(4).getReg(); in lower()
3361 Register DstReg = MI.getOperand(0).getReg(); in lower()
3362 Register SrcReg = MI.getOperand(1).getReg(); in lower()
3364 Register TmpRes = MRI.createGenericVirtualRegister(DstTy); in lower()
3454 static Register clampDynamicVectorIndex(MachineIRBuilder &B, Register IdxReg, in clampDynamicVectorIndex()
3471 Register LegalizerHelper::getVectorElementPointer(Register VecPtr, LLT VecTy, in getVectorElementPointer()
3472 Register Index) { in getVectorElementPointer()
3492 Register DstReg = MI.getOperand(0).getReg(); in fewerElementsVectorImplicitDef()
3499 SmallVector<Register, 8> Parts(NumParts, NewUndef.getReg(0)); in fewerElementsVectorImplicitDef()
3525 const Register DstReg = MI.getOperand(0).getReg(); in fewerElementsVectorMultiEltType()
3538 SmallVector<Register, 4> DstRegs, LeftoverDstRegs; in fewerElementsVectorMultiEltType()
3539 SmallVector<Register, 4> PartRegs, LeftoverRegs; in fewerElementsVectorMultiEltType()
3542 Register SrcReg = MI.getOperand(I).getReg(); in fewerElementsVectorMultiEltType()
3558 for (Register PartReg : PartRegs) { in fewerElementsVectorMultiEltType()
3559 Register PartDstReg = MRI.createGenericVirtualRegister(NarrowTy0); in fewerElementsVectorMultiEltType()
3566 for (Register LeftoverReg : LeftoverRegs) { in fewerElementsVectorMultiEltType()
3567 Register PartDstReg = MRI.createGenericVirtualRegister(LeftoverTy0); in fewerElementsVectorMultiEltType()
3606 Register DstReg = MI.getOperand(0).getReg(); in fewerElementsVectorCasts()
3607 Register SrcReg = MI.getOperand(1).getReg(); in fewerElementsVectorCasts()
3627 SmallVector<Register, 4> SrcRegs, DstRegs; in fewerElementsVectorCasts()
3631 Register DstReg = MRI.createGenericVirtualRegister(NarrowTy0); in fewerElementsVectorCasts()
3651 Register DstReg = MI.getOperand(0).getReg(); in fewerElementsVectorCmp()
3652 Register Src0Reg = MI.getOperand(2).getReg(); in fewerElementsVectorCmp()
3689 SmallVector<Register, 2> Src1Regs, Src2Regs, DstRegs; in fewerElementsVectorCmp()
3694 Register DstReg = MRI.createGenericVirtualRegister(NarrowTy0); in fewerElementsVectorCmp()
3718 Register DstReg = MI.getOperand(0).getReg(); in fewerElementsVectorSelect()
3719 Register CondReg = MI.getOperand(1).getReg(); in fewerElementsVectorSelect()
3765 SmallVector<Register, 2> DstRegs, Src0Regs, Src1Regs, Src2Regs; in fewerElementsVectorSelect()
3773 Register DstReg = MRI.createGenericVirtualRegister(NarrowTy0); in fewerElementsVectorSelect()
3791 const Register DstReg = MI.getOperand(0).getReg(); in fewerElementsVectorPhi()
3804 SmallVector<Register, 4> DstRegs, LeftoverDstRegs; in fewerElementsVectorPhi()
3812 Register PartDstReg = MRI.createGenericVirtualRegister(Ty); in fewerElementsVectorPhi()
3825 SmallVector<Register, 4> PartRegs, LeftoverRegs; in fewerElementsVectorPhi()
3832 Register SrcReg = MI.getOperand(I).getReg(); in fewerElementsVectorPhi()
3863 const Register SrcReg = MI.getOperand(NumDst).getReg(); in fewerElementsVectorUnmergeValues()
3898 Register Result = MI.getOperand(0).getReg(); in fewerElementsVectorMulo()
3899 Register Overflow = MI.getOperand(1).getReg(); in fewerElementsVectorMulo()
3900 Register LHS = MI.getOperand(2).getReg(); in fewerElementsVectorMulo()
3901 Register RHS = MI.getOperand(3).getReg(); in fewerElementsVectorMulo()
3922 SmallVector<Register, 8> ResultParts; in fewerElementsVectorMulo()
3923 SmallVector<Register, 8> OverflowParts; in fewerElementsVectorMulo()
3925 Register Operand1 = UnmergeLHS->getOperand(I).getReg(); in fewerElementsVectorMulo()
3926 Register Operand2 = UnmergeRHS->getOperand(I).getReg(); in fewerElementsVectorMulo()
3962 Register DstReg = MI.getOperand(0).getReg(); in fewerElementsVectorMerge()
3968 SmallVector<Register, 16> Parts; in fewerElementsVectorMerge()
3987 Register DstReg = MI.getOperand(0).getReg(); in fewerElementsVectorExtractInsertVectorElt()
3988 Register SrcVec = MI.getOperand(1).getReg(); in fewerElementsVectorExtractInsertVectorElt()
3989 Register InsertVal; in fewerElementsVectorExtractInsertVectorElt()
3996 Register Idx = MI.getOperand(MI.getNumOperands() - 1).getReg(); in fewerElementsVectorExtractInsertVectorElt()
4019 SmallVector<Register, 8> VecParts; in fewerElementsVectorExtractInsertVectorElt()
4073 Register ValReg = LdStMI.getReg(0); in reduceLoadStoreWidth()
4074 Register AddrReg = LdStMI.getPointerReg(); in reduceLoadStoreWidth()
4086 SmallVector<Register, 8> NarrowRegs, NarrowLeftoverRegs; in reduceLoadStoreWidth()
4110 auto splitTypePieces = [=](LLT PartTy, SmallVectorImpl<Register> &ValRegs, in reduceLoadStoreWidth()
4117 Register NewAddrReg; in reduceLoadStoreWidth()
4125 Register Dst = MRI.createGenericVirtualRegister(PartTy); in reduceLoadStoreWidth()
4167 SmallVector<Register, 2> DstRegs; in reduceOperationWidth()
4176 SmallVector<Register, 8> ExtractedRegs[3]; in reduceOperationWidth()
4177 SmallVector<Register, 8> Parts; in reduceOperationWidth()
4182 Register SrcReg = MI.getOperand(I + NumDefOps).getReg(); in reduceOperationWidth()
4211 SmallVector<Register, 8> ResultRegs[2]; in reduceOperationWidth()
4214 SmallVector<SrcOp, 4> InputRegs(NumSrcOps, Register()); in reduceOperationWidth()
4254 Register Undef = MIRBuilder.buildUndef(NarrowDstTy).getReg(0); in reduceOperationWidth()
4261 Register MergeDstReg; in reduceOperationWidth()
4282 Register DstReg = MI.getOperand(0).getReg(); in fewerElementsVectorSextInReg()
4283 Register SrcReg = MI.getOperand(1).getReg(); in fewerElementsVectorSextInReg()
4288 SmallVector<Register, 8> Parts; in fewerElementsVectorSextInReg()
4292 for (Register &R : Parts) in fewerElementsVectorSextInReg()
4439 Register DstReg = MI.getOperand(0).getReg(); in fewerElementsVectorShuffle()
4440 Register Src1Reg = MI.getOperand(1).getReg(); in fewerElementsVectorShuffle()
4441 Register Src2Reg = MI.getOperand(2).getReg(); in fewerElementsVectorShuffle()
4461 SmallVector<Register> SplitSrc1Regs, SplitSrc2Regs; in fewerElementsVectorShuffle()
4464 Register Inputs[4] = {SplitSrc1Regs[0], SplitSrc1Regs[1], SplitSrc2Regs[0], in fewerElementsVectorShuffle()
4467 Register Hi, Lo; in fewerElementsVectorShuffle()
4474 Register &Output = High ? Hi : Lo; in fewerElementsVectorShuffle()
4525 SmallVector<Register, 16> SVOps; in fewerElementsVectorShuffle()
4558 Register Op0 = Inputs[InputUsed[0]]; in fewerElementsVectorShuffle()
4560 Register Op1 = InputUsed[1] == -1U in fewerElementsVectorShuffle()
4587 Register SrcReg = MI.getOperand(1).getReg(); in fewerElementsVectorReductions()
4589 Register DstReg = MI.getOperand(0).getReg(); in fewerElementsVectorReductions()
4595 SmallVector<Register> SplitSrcs; in fewerElementsVectorReductions()
4598 SmallVector<Register> PartialReductions; in fewerElementsVectorReductions()
4657 Register Acc = PartialReductions[0]; in fewerElementsVectorReductions()
4673 LegalizerHelper::tryNarrowPow2Reduction(MachineInstr &MI, Register SrcReg, in tryNarrowPow2Reduction()
4676 SmallVector<Register> SplitSrcs; in tryNarrowPow2Reduction()
4683 SmallVector<Register> PartialRdxs; in tryNarrowPow2Reduction()
4685 Register LHS = SplitSrcs[Idx]; in tryNarrowPow2Reduction()
4686 Register RHS = SplitSrcs[Idx + 1]; in tryNarrowPow2Reduction()
4688 Register Res = in tryNarrowPow2Reduction()
4705 Register InL = MRI.createGenericVirtualRegister(HalfTy); in narrowScalarShiftByConstant()
4706 Register InH = MRI.createGenericVirtualRegister(HalfTy); in narrowScalarShiftByConstant()
4719 SrcOp Lo(Register(0)), Hi(Register(0)); in narrowScalarShiftByConstant()
4800 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarShift()
4805 Register Amt = MI.getOperand(2).getReg(); in narrowScalarShift()
4829 Register InL = MRI.createGenericVirtualRegister(HalfTy); in narrowScalarShift()
4830 Register InH = MRI.createGenericVirtualRegister(HalfTy); in narrowScalarShift()
4840 Register ResultRegs[2]; in narrowScalarShift()
5023 Register DstReg = MI.getOperand(0).getReg(); in moreElementsVectorShuffle()
5024 Register Src1Reg = MI.getOperand(1).getReg(); in moreElementsVectorShuffle()
5025 Register Src2Reg = MI.getOperand(2).getReg(); in moreElementsVectorShuffle()
5060 void LegalizerHelper::multiplyRegisters(SmallVectorImpl<Register> &DstRegs, in multiplyRegisters()
5061 ArrayRef<Register> Src1Regs, in multiplyRegisters()
5062 ArrayRef<Register> Src2Regs, in multiplyRegisters()
5069 Register FactorSum = in multiplyRegisters()
5074 SmallVector<Register, 4> Factors; in multiplyRegisters()
5096 Register CarrySum; in multiplyRegisters()
5129 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarAddSub()
5166 Register Src1 = MI.getOperand(NumDefs).getReg(); in narrowScalarAddSub()
5167 Register Src2 = MI.getOperand(NumDefs + 1).getReg(); in narrowScalarAddSub()
5168 Register CarryDst, CarryIn; in narrowScalarAddSub()
5176 SmallVector<Register, 2> Src1Regs, Src2Regs, Src1Left, Src2Left, DstRegs; in narrowScalarAddSub()
5188 Register DstReg = in narrowScalarAddSub()
5190 Register CarryOut = MRI.createGenericVirtualRegister(LLT::scalar(1)); in narrowScalarAddSub()
5219 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarMul()
5220 Register Src1 = MI.getOperand(1).getReg(); in narrowScalarMul()
5221 Register Src2 = MI.getOperand(2).getReg(); in narrowScalarMul()
5238 SmallVector<Register, 2> Src1Parts, Src2Parts; in narrowScalarMul()
5239 SmallVector<Register, 2> DstTmpRegs(DstTmpParts); in narrowScalarMul()
5245 ArrayRef<Register> DstRegs( in narrowScalarMul()
5260 Register Src = MI.getOperand(1).getReg(); in narrowScalarFPTOI()
5292 SmallVector<Register, 2> SrcRegs, DstRegs; in narrowScalarExtract()
5296 Register OpReg = MI.getOperand(0).getReg(); in narrowScalarExtract()
5323 Register SegReg = SrcRegs[i]; in narrowScalarExtract()
5333 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarExtract()
5351 SmallVector<Register, 2> SrcRegs, LeftoverRegs, DstRegs; in narrowScalarInsert()
5358 for (Register Reg : LeftoverRegs) in narrowScalarInsert()
5362 Register OpReg = MI.getOperand(2).getReg(); in narrowScalarInsert()
5375 Register SrcReg = SrcRegs[I]; in narrowScalarInsert()
5403 Register SegReg = OpReg; in narrowScalarInsert()
5410 Register DstReg = MRI.createGenericVirtualRegister(NarrowTy); in narrowScalarInsert()
5416 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarInsert()
5418 Register MergeReg = MRI.createGenericVirtualRegister(LLT::scalar(WideSize)); in narrowScalarInsert()
5431 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarBasic()
5436 SmallVector<Register, 4> DstRegs, DstLeftoverRegs; in narrowScalarBasic()
5437 SmallVector<Register, 4> Src0Regs, Src0LeftoverRegs; in narrowScalarBasic()
5438 SmallVector<Register, 4> Src1Regs, Src1LeftoverRegs; in narrowScalarBasic()
5475 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarExt()
5476 Register SrcReg = MI.getOperand(1).getReg(); in narrowScalarExt()
5482 SmallVector<Register, 8> Parts; in narrowScalarExt()
5497 Register CondReg = MI.getOperand(1).getReg(); in narrowScalarSelect()
5502 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarSelect()
5505 SmallVector<Register, 4> DstRegs, DstLeftoverRegs; in narrowScalarSelect()
5506 SmallVector<Register, 4> Src1Regs, Src1LeftoverRegs; in narrowScalarSelect()
5507 SmallVector<Register, 4> Src2Regs, Src2LeftoverRegs; in narrowScalarSelect()
5543 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarCTLZ()
5544 Register SrcReg = MI.getOperand(1).getReg(); in narrowScalarCTLZ()
5579 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarCTTZ()
5580 Register SrcReg = MI.getOperand(1).getReg(); in narrowScalarCTTZ()
5615 Register DstReg = MI.getOperand(0).getReg(); in narrowScalarCTPOP()
5653 Register DstReg = MI.getOperand(0).getReg(); in lowerBitCount()
5654 Register SrcReg = MI.getOperand(1).getReg(); in lowerBitCount()
5681 Register Op = SrcReg; in lowerBitCount()
5703 Register DstReg = MI.getOperand(0).getReg(); in lowerBitCount()
5704 Register SrcReg = MI.getOperand(1).getReg(); in lowerBitCount()
5742 Register SrcReg = MI.getOperand(1).getReg(); in lowerBitCount()
5799 Register Reg, unsigned BW) { in isNonZeroModBitWidthOrUndef()
5812 Register Dst = MI.getOperand(0).getReg(); in lowerFunnelShiftWithInverse()
5813 Register X = MI.getOperand(1).getReg(); in lowerFunnelShiftWithInverse()
5814 Register Y = MI.getOperand(2).getReg(); in lowerFunnelShiftWithInverse()
5815 Register Z = MI.getOperand(3).getReg(); in lowerFunnelShiftWithInverse()
5854 Register Dst = MI.getOperand(0).getReg(); in lowerFunnelShiftAsShifts()
5855 Register X = MI.getOperand(1).getReg(); in lowerFunnelShiftAsShifts()
5856 Register Y = MI.getOperand(2).getReg(); in lowerFunnelShiftAsShifts()
5857 Register Z = MI.getOperand(3).getReg(); in lowerFunnelShiftAsShifts()
5864 Register ShX, ShY; in lowerFunnelShiftAsShifts()
5865 Register ShAmt, InvShAmt; in lowerFunnelShiftAsShifts()
5916 Register Dst = MI.getOperand(0).getReg(); in lowerFunnelShift()
5936 Register Dst = MI.getOperand(0).getReg(); in lowerRotateWithReverseRotate()
5937 Register Src = MI.getOperand(1).getReg(); in lowerRotateWithReverseRotate()
5938 Register Amt = MI.getOperand(2).getReg(); in lowerRotateWithReverseRotate()
5950 Register Dst = MI.getOperand(0).getReg(); in lowerRotate()
5951 Register Src = MI.getOperand(1).getReg(); in lowerRotate()
5952 Register Amt = MI.getOperand(2).getReg(); in lowerRotate()
5972 Register ShVal; in lowerRotate()
5973 Register RevShiftVal; in lowerRotate()
6004 Register Dst = MI.getOperand(0).getReg(); in lowerU64ToF32BitOps()
6005 Register Src = MI.getOperand(1).getReg(); in lowerU64ToF32BitOps()
6060 Register Dst = MI.getOperand(0).getReg(); in lowerUITOFP()
6061 Register Src = MI.getOperand(1).getReg(); in lowerUITOFP()
6088 Register Dst = MI.getOperand(0).getReg(); in lowerSITOFP()
6089 Register Src = MI.getOperand(1).getReg(); in lowerSITOFP()
6114 Register L = Src; in lowerSITOFP()
6134 Register Dst = MI.getOperand(0).getReg(); in lowerFPTOUI()
6135 Register Src = MI.getOperand(1).getReg(); in lowerFPTOUI()
6177 Register Dst = MI.getOperand(0).getReg(); in lowerFPTOSI()
6178 Register Src = MI.getOperand(1).getReg(); in lowerFPTOSI()
6246 Register Dst = MI.getOperand(0).getReg(); in lowerFPTRUNC_F64_TO_F16()
6247 Register Src = MI.getOperand(1).getReg(); in lowerFPTRUNC_F64_TO_F16()
6259 Register U = Unmerge.getReg(0); in lowerFPTRUNC_F64_TO_F16()
6260 Register UH = Unmerge.getReg(1); in lowerFPTRUNC_F64_TO_F16()
6351 Register Dst = MI.getOperand(0).getReg(); in lowerFPTRUNC()
6352 Register Src = MI.getOperand(1).getReg(); in lowerFPTRUNC()
6368 Register Dst = MI.getOperand(0).getReg(); in lowerFPOWI()
6369 Register Src0 = MI.getOperand(1).getReg(); in lowerFPOWI()
6370 Register Src1 = MI.getOperand(2).getReg(); in lowerFPOWI()
6395 Register Dst = MI.getOperand(0).getReg(); in lowerMinMax()
6396 Register Src0 = MI.getOperand(1).getReg(); in lowerMinMax()
6397 Register Src1 = MI.getOperand(2).getReg(); in lowerMinMax()
6411 Register Dst = MI.getOperand(0).getReg(); in lowerFCopySign()
6412 Register Src0 = MI.getOperand(1).getReg(); in lowerFCopySign()
6413 Register Src1 = MI.getOperand(2).getReg(); in lowerFCopySign()
6427 Register And0 = MIRBuilder.buildAnd(Src0Ty, Src0, NotSignBitMask).getReg(0); in lowerFCopySign()
6428 Register And1; in lowerFCopySign()
6458 Register Dst = MI.getOperand(0).getReg(); in lowerFMinNumMaxNum()
6459 Register Src0 = MI.getOperand(1).getReg(); in lowerFMinNumMaxNum()
6460 Register Src1 = MI.getOperand(2).getReg(); in lowerFMinNumMaxNum()
6486 Register DstReg = MI.getOperand(0).getReg(); in lowerFMad()
6499 Register DstReg = MI.getOperand(0).getReg(); in lowerIntrinsicRound()
6500 Register X = MI.getOperand(1).getReg(); in lowerIntrinsicRound()
6532 Register DstReg = MI.getOperand(0).getReg(); in lowerFFloor()
6533 Register SrcReg = MI.getOperand(1).getReg(); in lowerFFloor()
6560 Register DstReg = MI.getOperand(0).getReg(); in lowerMergeValues()
6561 Register Src0Reg = MI.getOperand(1).getReg(); in lowerMergeValues()
6567 Register ResultReg = MIRBuilder.buildZExt(WideTy, Src0Reg).getReg(0); in lowerMergeValues()
6572 Register SrcReg = MI.getOperand(I).getReg(); in lowerMergeValues()
6575 Register NextResult = I + 1 == NumOps && WideTy == DstTy ? DstReg : in lowerMergeValues()
6601 Register SrcReg = MI.getOperand(NumDst).getReg(); in lowerUnmergeValues()
6602 Register Dst0Reg = MI.getOperand(0).getReg(); in lowerUnmergeValues()
6640 Register DstReg = MI.getOperand(0).getReg(); in lowerExtractInsertVectorElt()
6641 Register SrcVec = MI.getOperand(1).getReg(); in lowerExtractInsertVectorElt()
6642 Register InsertVal; in lowerExtractInsertVectorElt()
6646 Register Idx = MI.getOperand(MI.getNumOperands() - 1).getReg(); in lowerExtractInsertVectorElt()
6666 Register EltPtr = getVectorElementPointer(StackTemp.getReg(0), VecTy, Idx); in lowerExtractInsertVectorElt()
6695 Register DstReg = MI.getOperand(0).getReg(); in lowerShuffleVector()
6696 Register Src0Reg = MI.getOperand(1).getReg(); in lowerShuffleVector()
6697 Register Src1Reg = MI.getOperand(2).getReg(); in lowerShuffleVector()
6710 Register Val; in lowerShuffleVector()
6720 Register Undef; in lowerShuffleVector()
6721 SmallVector<Register, 32> BuildVec; in lowerShuffleVector()
6736 Register SrcVec = Idx < NumElts ? Src0Reg : Src1Reg; in lowerShuffleVector()
6756 Register Dst = MI.getOperand(0).getReg(); in lowerDynStackAlloc()
6757 Register AllocSize = MI.getOperand(1).getReg(); in lowerDynStackAlloc()
6763 Register SPReg = TLI.getStackPointerRegisterToSaveRestore(); in lowerDynStackAlloc()
6788 Register Dst = MI.getOperand(0).getReg(); in lowerExtract()
6789 Register Src = MI.getOperand(1).getReg(); in lowerExtract()
6820 Register Dst = MI.getOperand(0).getReg(); in lowerInsert()
6821 Register Src = MI.getOperand(1).getReg(); in lowerInsert()
6822 Register InsertSrc = MI.getOperand(2).getReg(); in lowerInsert()
6853 Register ExtInsSrc = MIRBuilder.buildZExt(IntDstTy, InsertSrc).getReg(0); in lowerInsert()
6873 Register Dst0 = MI.getOperand(0).getReg(); in lowerSADDO_SSUBO()
6874 Register Dst1 = MI.getOperand(1).getReg(); in lowerSADDO_SSUBO()
6875 Register LHS = MI.getOperand(2).getReg(); in lowerSADDO_SSUBO()
6876 Register RHS = MI.getOperand(3).getReg(); in lowerSADDO_SSUBO()
6909 Register Res = MI.getOperand(0).getReg(); in lowerAddSubSatToMinMax()
6910 Register LHS = MI.getOperand(1).getReg(); in lowerAddSubSatToMinMax()
6911 Register RHS = MI.getOperand(2).getReg(); in lowerAddSubSatToMinMax()
6975 Register Not = IsAdd ? MIRBuilder.buildNot(Ty, LHS).getReg(0) : LHS; in lowerAddSubSatToMinMax()
6986 Register Res = MI.getOperand(0).getReg(); in lowerAddSubSatToAddoSubo()
6987 Register LHS = MI.getOperand(1).getReg(); in lowerAddSubSatToAddoSubo()
6988 Register RHS = MI.getOperand(2).getReg(); in lowerAddSubSatToAddoSubo()
7021 Register Tmp = OverflowRes.getReg(0); in lowerAddSubSatToAddoSubo()
7022 Register Ov = OverflowRes.getReg(1); in lowerAddSubSatToAddoSubo()
7058 Register Res = MI.getOperand(0).getReg(); in lowerShlSat()
7059 Register LHS = MI.getOperand(1).getReg(); in lowerShlSat()
7060 Register RHS = MI.getOperand(2).getReg(); in lowerShlSat()
7088 Register Dst = MI.getOperand(0).getReg(); in lowerBswap()
7089 Register Src = MI.getOperand(1).getReg(); in lowerBswap()
7134 Register Dst = MI.getOperand(0).getReg(); in lowerBitreverse()
7135 Register Src = MI.getOperand(1).getReg(); in lowerBitreverse()
7171 Register ValReg = MI.getOperand(ValRegIndex).getReg(); in lowerReadWriteRegister()
7176 Register PhysReg = TLI.getRegisterByName(RegStr->getString().data(), Ty, MF); in lowerReadWriteRegister()
7193 Register Result = MI.getOperand(0).getReg(); in lowerSMULH_UMULH()
7213 Register DstReg = MI.getOperand(0).getReg(); in lowerSelect()
7214 Register MaskReg = MI.getOperand(1).getReg(); in lowerSelect()
7215 Register Op1Reg = MI.getOperand(2).getReg(); in lowerSelect()
7216 Register Op2Reg = MI.getOperand(3).getReg(); in lowerSelect()
7226 Register MaskElt = MaskReg; in lowerSelect()
7272 Register OpReg = MI.getOperand(1).getReg(); in lowerAbsToAddXor()
7288 Register SrcReg = MI.getOperand(1).getReg(); in lowerAbsToMaxNeg()