Lines Matching refs:InL
4705 Register InL = MRI.createGenericVirtualRegister(HalfTy); in narrowScalarShiftByConstant() local
4707 MIRBuilder.buildUnmerge({InL, InH}, MI.getOperand(1)); in narrowScalarShiftByConstant()
4710 MIRBuilder.buildMerge(MI.getOperand(0), {InL, InH}); in narrowScalarShiftByConstant()
4725 Hi = MIRBuilder.buildShl(NVT, InL, in narrowScalarShiftByConstant()
4729 Hi = InL; in narrowScalarShiftByConstant()
4731 Lo = MIRBuilder.buildShl(NVT, InL, MIRBuilder.buildConstant(AmtTy, Amt)); in narrowScalarShiftByConstant()
4735 NVT, InL, MIRBuilder.buildConstant(AmtTy, -Amt + NVTBits)); in narrowScalarShiftByConstant()
4751 auto OrLHS = MIRBuilder.buildLShr(NVT, InL, ShiftAmtConst); in narrowScalarShiftByConstant()
4774 auto OrLHS = MIRBuilder.buildLShr(NVT, InL, ShiftAmtConst); in narrowScalarShiftByConstant()
4829 Register InL = MRI.createGenericVirtualRegister(HalfTy); in narrowScalarShift() local
4831 MIRBuilder.buildUnmerge({InL, InH}, MI.getOperand(1)); in narrowScalarShift()
4844 auto LoS = MIRBuilder.buildShl(HalfTy, InL, Amt); in narrowScalarShift()
4846 auto LoOr = MIRBuilder.buildLShr(HalfTy, InL, AmtLack); in narrowScalarShift()
4852 auto HiL = MIRBuilder.buildShl(HalfTy, InL, AmtExcess); // Hi from Lo part. in narrowScalarShift()
4867 auto LoOr = MIRBuilder.buildLShr(HalfTy, InL, Amt); in narrowScalarShift()
4883 HalfTy, IsZero, InL, MIRBuilder.buildSelect(HalfTy, IsShort, LoS, LoL)); in narrowScalarShift()