156   Register DstReg = MI.getOperand(0).getReg();  in matchCombineCopy()
157   Register SrcReg = MI.getOperand(1).getReg();  in matchCombineCopy()
161   Register DstReg = MI.getOperand(0).getReg();  in applyCombineCopy()
162   Register SrcReg = MI.getOperand(1).getReg();  in applyCombineCopy()
206       assert(MRI.getType(Undef->getOperand(0).getReg()) ==  in matchCombineConcatVectors()
213         Ops.push_back(Undef->getOperand(0).getReg());  in matchCombineConcatVectors()
226   Register DstReg = MI.getOperand(0).getReg();  in applyCombineConcatVectors()
257   LLT DstType = MRI.getType(MI.getOperand(0).getReg());  in matchCombineShuffleVector()
258   Register Src1 = MI.getOperand(1).getReg();  in matchCombineShuffleVector()
294   ArrayRef<int> Mask = MI.getOperand(3).getShuffleMask();  in matchCombineShuffleVector()
313   Register Src2 = MI.getOperand(2).getReg();  in matchCombineShuffleVector()
331   Register DstReg = MI.getOperand(0).getReg();  in applyCombineShuffleVector()
493         LLT UseTy = MRI.getType(UseMI.getOperand(0).getReg());  in matchCombineExtendingLoads()
500                                      MRI.getType(UseMI.getOperand(0).getReg()),  in matchCombineExtendingLoads()
519   Register ChosenDstReg = Preferred.MI->getOperand(0).getReg();  in applyCombineExtendingLoads()
530       UseMO.setReg(PreviouslyEmitted->getOperand(0).getReg());  in applyCombineExtendingLoads()
536     Register NewDstReg = MRI.cloneVirtualRegister(MI.getOperand(0).getReg());  in applyCombineExtendingLoads()
551   auto &LoadValue = MI.getOperand(0);  in applyCombineExtendingLoads()
563       Register UseDstReg = UseMI->getOperand(0).getReg();  in applyCombineExtendingLoads()
564       MachineOperand &UseSrcMO = UseMI->getOperand(1);  in applyCombineExtendingLoads()
622   MI.getOperand(0).setReg(ChosenDstReg);  in applyCombineExtendingLoads()
656   Register SrcReg = MI.getOperand(1).getReg();  in matchSextTruncSextLoad()
666   uint64_t SizeInBits = MI.getOperand(2).getImm();  in matchSextTruncSextLoad()
683   Builder.buildCopy(MI.getOperand(0).getReg(), MI.getOperand(1).getReg());  in applySextTruncSextLoad()
692   if (MRI.getType(MI.getOperand(0).getReg()).isVector())  in matchSextInRegOfLoad()
695   Register SrcReg = MI.getOperand(1).getReg();  in matchSextInRegOfLoad()
697   if (!LoadDef || !MRI.hasOneNonDBGUse(LoadDef->getOperand(0).getReg()) ||  in matchSextInRegOfLoad()
704   unsigned NewSizeBits = std::min((uint64_t)MI.getOperand(2).getImm(),  in matchSextInRegOfLoad()
737   Builder.buildLoadInstr(TargetOpcode::G_SEXTLOAD, MI.getOperand(0).getReg(),  in applySextInRegOfLoad()
753   Base = MI.getOperand(1).getReg();  in findPostIndexCandidate()
764     Offset = Use.getOperand(2).getReg();  in findPostIndexCandidate()
788          MRI.use_nodbg_instructions(Use.getOperand(0).getReg())) {  in findPostIndexCandidate()
803     Addr = Use.getOperand(0).getReg();  in findPostIndexCandidate()
821   Addr = MI.getOperand(1).getReg();  in findPreIndexCandidate()
826   Base = AddrDef->getOperand(1).getReg();  in findPreIndexCandidate()
827   Offset = AddrDef->getOperand(2).getReg();  in findPreIndexCandidate()
845     if (Base == MI.getOperand(0).getReg()) {  in findPreIndexCandidate()
852     if (MI.getOperand(0).getReg() == Addr) {  in findPreIndexCandidate()
928     MIB.addUse(MI.getOperand(0).getReg());  in applyCombineIndexedLoadStore()
930     MIB.addDef(MI.getOperand(0).getReg());  in applyCombineIndexedLoadStore()
965   Register Src1 = MI.getOperand(1).getReg();  in matchCombineDivRem()
996         matchEqualDefs(MI.getOperand(2), UseMI.getOperand(2))) {  in matchCombineDivRem()
1012     DestDivReg = MI.getOperand(0).getReg();  in applyCombineDivRem()
1013     DestRemReg = OtherMI->getOperand(0).getReg();  in applyCombineDivRem()
1015     DestDivReg = OtherMI->getOperand(0).getReg();  in applyCombineDivRem()
1016     DestRemReg = MI.getOperand(0).getReg();  in applyCombineDivRem()
1032                      {MI.getOperand(1).getReg(), MI.getOperand(2).getReg()});  in applyCombineDivRem()
1066   MachineBasicBlock *BrCondTarget = BrCond->getOperand(1).getMBB();  in matchOptBrCondByInvertingCond()
1067   return BrCondTarget != MI.getOperand(0).getMBB() &&  in matchOptBrCondByInvertingCond()
1073   MachineBasicBlock *BrTarget = MI.getOperand(0).getMBB();  in applyOptBrCondByInvertingCond()
1075   LLT Ty = MRI.getType(BrCond->getOperand(0).getReg());  in applyOptBrCondByInvertingCond()
1081   auto Xor = Builder.buildXor(Ty, BrCond->getOperand(0), True);  in applyOptBrCondByInvertingCond()
1083   auto *FallthroughBB = BrCond->getOperand(1).getMBB();  in applyOptBrCondByInvertingCond()
1085   MI.getOperand(0).setMBB(FallthroughBB);  in applyOptBrCondByInvertingCond()
1091   BrCond->getOperand(0).setReg(Xor.getReg(0));  in applyOptBrCondByInvertingCond()
1092   BrCond->getOperand(1).setMBB(BrTarget);  in applyOptBrCondByInvertingCond()
1226   if (FIDef && !MFI.isFixedObjectIndex(FIDef->getOperand(1).getIndex()))  in optimizeMemset()
1253       unsigned FI = FIDef->getOperand(1).getIndex();  in optimizeMemset()
1327   Register Dst = MI.getOperand(0).getReg();  in tryEmitMemcpyInline()
1328   Register Src = MI.getOperand(1).getReg();  in tryEmitMemcpyInline()
1329   Register Len = MI.getOperand(2).getReg();  in tryEmitMemcpyInline()
1381   if (FIDef && !MFI.isFixedObjectIndex(FIDef->getOperand(1).getIndex()))  in optimizeMemcpy()
1417       unsigned FI = FIDef->getOperand(1).getIndex();  in optimizeMemcpy()
1486   if (FIDef && !MFI.isFixedObjectIndex(FIDef->getOperand(1).getIndex()))  in optimizeMemmove()
1522       unsigned FI = FIDef->getOperand(1).getIndex();  in optimizeMemmove()
1586   Register Dst = MI.getOperand(0).getReg();  in tryCombineMemCpyFamily()
1587   Register Src = MI.getOperand(1).getReg();  in tryCombineMemCpyFamily()
1588   Register Len = MI.getOperand(2).getReg();  in tryCombineMemCpyFamily()
1678   Register DstReg = MI.getOperand(0).getReg();  in matchCombineConstantFoldFpUnary()
1679   Register SrcReg = MI.getOperand(1).getReg();  in matchCombineConstantFoldFpUnary()
1691   Register DstReg = MI.getOperand(0).getReg();  in applyCombineConstantFoldFpUnary()
1707   Register Add2 = MI.getOperand(1).getReg();  in matchPtrAddImmedChain()
1708   Register Imm1 = MI.getOperand(2).getReg();  in matchPtrAddImmedChain()
1724   Register Base = Add2Def->getOperand(1).getReg();  in matchPtrAddImmedChain()
1725   Register Imm2 = Add2Def->getOperand(2).getReg();  in matchPtrAddImmedChain()
1740   LLT OffsetTy = MRI.getType(MI.getOperand(2).getReg());  in applyPtrAddImmedChain()
1743   MI.getOperand(1).setReg(MatchInfo.Base);  in applyPtrAddImmedChain()
1744   MI.getOperand(2).setReg(NewOffset.getReg(0));  in applyPtrAddImmedChain()
1763   Register Shl2 = MI.getOperand(1).getReg();  in matchShiftImmedChain()
1764   Register Imm1 = MI.getOperand(2).getReg();  in matchShiftImmedChain()
1773   Register Base = Shl2Def->getOperand(1).getReg();  in matchShiftImmedChain()
1774   Register Imm2 = Shl2Def->getOperand(2).getReg();  in matchShiftImmedChain()
1802   LLT Ty = MRI.getType(MI.getOperand(1).getReg());  in applyShiftImmedChain()
1809       Builder.buildConstant(MI.getOperand(0), 0);  in applyShiftImmedChain()
1818   LLT ImmTy = MRI.getType(MI.getOperand(2).getReg());  in applyShiftImmedChain()
1821   MI.getOperand(1).setReg(MatchInfo.Reg);  in applyShiftImmedChain()
1822   MI.getOperand(2).setReg(NewImm);  in applyShiftImmedChain()
1847   Register LogicDest = MI.getOperand(1).getReg();  in matchShiftOfShiftedLogic()
1858   const Register C1 = MI.getOperand(2).getReg();  in matchShiftOfShiftedLogic()
1868         !MRI.hasOneNonDBGUse(MI->getOperand(0).getReg()))  in matchShiftOfShiftedLogic()
1873         getConstantVRegValWithLookThrough(MI->getOperand(2).getReg(), MRI);  in matchShiftOfShiftedLogic()
1882   Register LogicMIReg1 = LogicMI->getOperand(1).getReg();  in matchShiftOfShiftedLogic()
1884   Register LogicMIReg2 = LogicMI->getOperand(2).getReg();  in matchShiftOfShiftedLogic()
1915   LLT ShlType = MRI.getType(MI.getOperand(2).getReg());  in applyShiftOfShiftedLogic()
1916   LLT DestType = MRI.getType(MI.getOperand(0).getReg());  in applyShiftOfShiftedLogic()
1921   Register Shift1Base = MatchInfo.Shift2->getOperand(1).getReg();  in applyShiftOfShiftedLogic()
1925   Register Shift2Const = MI.getOperand(2).getReg();  in applyShiftOfShiftedLogic()
1931   Register Dest = MI.getOperand(0).getReg();  in applyShiftOfShiftedLogic()
1945       getConstantVRegValWithLookThrough(MI.getOperand(2).getReg(), MRI);  in matchCombineMulToShl()
1957   LLT ShiftTy = MRI.getType(MI.getOperand(0).getReg());  in applyCombineMulToShl()
1961   MI.getOperand(2).setReg(ShiftCst.getReg(0));  in applyCombineMulToShl()
1970   Register LHS = MI.getOperand(1).getReg();  in matchCombineShlOfExtend()
1979   Register RHS = MI.getOperand(2).getReg();  in matchCombineShlOfExtend()
2013   Builder.buildZExt(MI.getOperand(0), NarrowShift);  in applyCombineShlOfExtend()
2049       peekThroughBitcast(MI.getOperand(MI.getNumOperands() - 1).getReg(), MRI);  in matchCombineUnmergeMergeToPlainValues()
2058   LLT SrcMergeTy = MRI.getType(SrcInstr->getOperand(1).getReg());  in matchCombineUnmergeMergeToPlainValues()
2059   LLT Dst0Ty = MRI.getType(MI.getOperand(0).getReg());  in matchCombineUnmergeMergeToPlainValues()
2067     Operands.push_back(SrcInstr->getOperand(Idx).getReg());  in matchCombineUnmergeMergeToPlainValues()
2080   LLT DstTy = MRI.getType(MI.getOperand(0).getReg());  in applyCombineUnmergeMergeToPlainValues()
2084     Register DstReg = MI.getOperand(Idx).getReg();  in applyCombineUnmergeMergeToPlainValues()
2097   Register SrcReg = MI.getOperand(SrcIdx).getReg();  in matchCombineUnmergeConstant()
2103   const MachineOperand &CstVal = SrcInstr->getOperand(1);  in matchCombineUnmergeConstant()
2108   LLT Dst0Ty = MRI.getType(MI.getOperand(0).getReg());  in matchCombineUnmergeConstant()
2128     Register DstReg = MI.getOperand(Idx).getReg();  in applyCombineUnmergeConstant()
2140     if (!MRI.use_nodbg_empty(MI.getOperand(Idx).getReg()))  in matchCombineUnmergeWithDeadLanesToTrunc()
2148   Register SrcReg = MI.getOperand(MI.getNumDefs()).getReg();  in applyCombineUnmergeWithDeadLanesToTrunc()
2157   Register Dst0Reg = MI.getOperand(0).getReg();  in applyCombineUnmergeWithDeadLanesToTrunc()
2170   Register Dst0Reg = MI.getOperand(0).getReg();  in matchCombineUnmergeZExtToZExt()
2177   Register SrcReg = MI.getOperand(MI.getNumDefs()).getReg();  in matchCombineUnmergeZExtToZExt()
2197   Register Dst0Reg = MI.getOperand(0).getReg();  in applyCombineUnmergeZExtToZExt()
2200       MRI.getVRegDef(MI.getOperand(MI.getNumDefs()).getReg());  in applyCombineUnmergeZExtToZExt()
2204   Register ZExtSrcReg = ZExtInstr->getOperand(1).getReg();  in applyCombineUnmergeZExtToZExt()
2222     replaceRegWith(MRI, MI.getOperand(Idx).getReg(), ZeroReg);  in applyCombineUnmergeZExtToZExt()
2234   LLT Ty = MRI.getType(MI.getOperand(0).getReg());  in matchCombineShiftToUnmerge()
2244     getConstantVRegValWithLookThrough(MI.getOperand(2).getReg(), MRI);  in matchCombineShiftToUnmerge()
2254   Register DstReg = MI.getOperand(0).getReg();  in applyCombineShiftToUnmerge()
2255   Register SrcReg = MI.getOperand(1).getReg();  in applyCombineShiftToUnmerge()
2338   Register DstReg = MI.getOperand(0).getReg();  in matchCombineI2PToP2I()
2340   Register SrcReg = MI.getOperand(1).getReg();  in matchCombineI2PToP2I()
2347   Register DstReg = MI.getOperand(0).getReg();  in applyCombineI2PToP2I()
2355   Register SrcReg = MI.getOperand(1).getReg();  in matchCombineP2IToI2P()
2361   Register DstReg = MI.getOperand(0).getReg();  in applyCombineP2IToI2P()
2370   Register LHS = MI.getOperand(1).getReg();  in matchCombineAddP2IToPtrAdd()
2371   Register RHS = MI.getOperand(2).getReg();  in matchCombineAddP2IToPtrAdd()
2394   Register Dst = MI.getOperand(0).getReg();  in applyCombineAddP2IToPtrAdd()
2395   Register LHS = MI.getOperand(1).getReg();  in applyCombineAddP2IToPtrAdd()
2396   Register RHS = MI.getOperand(2).getReg();  in applyCombineAddP2IToPtrAdd()
2414   Register LHS = MI.getOperand(1).getReg();  in matchCombineConstPtrAddToI2P()
2415   Register RHS = MI.getOperand(2).getReg();  in matchCombineConstPtrAddToI2P()
2432   Register Dst = MI.getOperand(0).getReg();  in applyCombineConstPtrAddToI2P()
2441   Register DstReg = MI.getOperand(0).getReg();  in matchCombineAnyExtTrunc()
2442   Register SrcReg = MI.getOperand(1).getReg();  in matchCombineAnyExtTrunc()
2450   Register DstReg = MI.getOperand(0).getReg();  in matchCombineZextTrunc()
2451   Register SrcReg = MI.getOperand(1).getReg();  in matchCombineZextTrunc()
2468   Register SrcReg = MI.getOperand(1).getReg();  in matchCombineExtOfExt()
2477     MatchInfo = std::make_tuple(SrcMI->getOperand(1).getReg(), SrcOpc);  in matchCombineExtOfExt()
2496     MI.getOperand(1).setReg(Reg);  in applyCombineExtOfExt()
2507     Register DstReg = MI.getOperand(0).getReg();  in applyCombineExtOfExt()
2516   Register DstReg = MI.getOperand(0).getReg();  in applyCombineMulByNegativeOne()
2517   Register SrcReg = MI.getOperand(1).getReg();  in applyCombineMulByNegativeOne()
2528   Register SrcReg = MI.getOperand(1).getReg();  in matchCombineFNegOfFNeg()
2534   Src = MI.getOperand(1).getReg();  in matchCombineFAbsOfFAbs()
2542   Register SrcReg = MI.getOperand(1).getReg();  in matchCombineTruncOfExt()
2547     MatchInfo = std::make_pair(SrcMI->getOperand(1).getReg(), SrcOpc);  in matchCombineTruncOfExt()
2558   Register DstReg = MI.getOperand(0).getReg();  in applyCombineTruncOfExt()
2577   Register DstReg = MI.getOperand(0).getReg();  in matchCombineTruncOfShl()
2578   Register SrcReg = MI.getOperand(1).getReg();  in matchCombineTruncOfShl()
2601   Register DstReg = MI.getOperand(0).getReg();  in applyCombineTruncOfShl()
2602   Register SrcReg = MI.getOperand(1).getReg();  in applyCombineTruncOfShl()
2630   ArrayRef<int> Mask = MI.getOperand(3).getShuffleMask();  in matchUndefShuffleVectorMask()
2636   return getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MI.getOperand(0).getReg(),  in matchUndefStore()
2642   return getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MI.getOperand(1).getReg(),  in matchUndefSelectCmp()
2649           getConstantVRegValWithLookThrough(MI.getOperand(1).getReg(), MRI)) {  in matchConstantSelectCmp()
2744   Register OldReg = MI.getOperand(0).getReg();  in replaceSingleDefInstWithOperand()
2745   Register Replacement = MI.getOperand(OpIdx).getReg();  in replaceSingleDefInstWithOperand()
2755   Register OldReg = MI.getOperand(0).getReg();  in replaceSingleDefInstWithReg()
2765   return matchEqualDefs(MI.getOperand(2), MI.getOperand(3)) &&  in matchSelectSameVal()
2766          canReplaceReg(MI.getOperand(0).getReg(), MI.getOperand(2).getReg(),  in matchSelectSameVal()
2771   return matchEqualDefs(MI.getOperand(1), MI.getOperand(2)) &&  in matchBinOpSameVal()
2772          canReplaceReg(MI.getOperand(0).getReg(), MI.getOperand(1).getReg(),  in matchBinOpSameVal()
2777   return matchConstantOp(MI.getOperand(OpIdx), 0) &&  in matchOperandIsZero()
2778          canReplaceReg(MI.getOperand(0).getReg(), MI.getOperand(OpIdx).getReg(),  in matchOperandIsZero()
2783   MachineOperand &MO = MI.getOperand(OpIdx);  in matchOperandIsUndef()
2790   MachineOperand &MO = MI.getOperand(OpIdx);  in matchOperandIsKnownToBeAPowerOfTwo()
2797   Builder.buildFConstant(MI.getOperand(0), C);  in replaceInstWithFConstant()
2805   Builder.buildConstant(MI.getOperand(0), C);  in replaceInstWithConstant()
2813   Builder.buildConstant(MI.getOperand(0), C);  in replaceInstWithConstant()
2821   Builder.buildUndef(MI.getOperand(0));  in replaceInstWithUndef()
2828   Register LHS = MI.getOperand(1).getReg();  in matchSimplifyAddToSub()
2829   Register RHS = MI.getOperand(2).getReg();  in matchSimplifyAddToSub()
2850   Register DstReg = MI.getOperand(0).getReg();  in matchCombineInsertVecElts()
2865       CurrInst->getOperand(0).getReg(), MRI,  in matchCombineInsertVecElts()
2879         MatchInfo[I - 1] = TmpInst->getOperand(I).getReg();  in matchCombineInsertVecElts()
2894     LLT DstTy = MRI.getType(MI.getOperand(0).getReg());  in applyCombineInsertVecElts()
2902   Builder.buildBuildVector(MI.getOperand(0).getReg(), MatchInfo);  in applyCombineInsertVecElts()
2911   Builder.buildSub(MI.getOperand(0).getReg(), SubLHS, SubRHS);  in applySimplifyAddToSub()
2928   Register Dst = MI.getOperand(0).getReg();  in matchHoistLogicOpWithSameOpcodeHands()
2929   Register LHSReg = MI.getOperand(1).getReg();  in matchHoistLogicOpWithSameOpcodeHands()
2930   Register RHSReg = MI.getOperand(2).getReg();  in matchHoistLogicOpWithSameOpcodeHands()
2944   if (!LeftHandInst->getOperand(1).isReg() ||  in matchHoistLogicOpWithSameOpcodeHands()
2945       !RightHandInst->getOperand(1).isReg())  in matchHoistLogicOpWithSameOpcodeHands()
2950   Register X = LeftHandInst->getOperand(1).getReg();  in matchHoistLogicOpWithSameOpcodeHands()
2951   Register Y = RightHandInst->getOperand(1).getReg();  in matchHoistLogicOpWithSameOpcodeHands()
2975     MachineOperand &ZOp = LeftHandInst->getOperand(2);  in matchHoistLogicOpWithSameOpcodeHands()
2976     if (!matchEqualDefs(ZOp, RightHandInst->getOperand(2)))  in matchHoistLogicOpWithSameOpcodeHands()
3027   if (!mi_match(MI.getOperand(0).getReg(), MRI,  in matchAshrShlToSextInreg()
3047   Builder.buildSExtInReg(MI.getOperand(0).getReg(), Src, Size - ShiftAmt);  in applyAshShlToSextInreg()
3056   Register Dst = MI.getOperand(0).getReg();  in matchOverlappingAnd()
3073     replaceRegWith(MRI, Dst, Zero->getOperand(0).getReg());  in matchOverlappingAnd()
3099   Register AndDst = MI.getOperand(0).getReg();  in matchRedundantAnd()
3106   Register LHS = MI.getOperand(1).getReg();  in matchRedundantAnd()
3107   Register RHS = MI.getOperand(2).getReg();  in matchRedundantAnd()
3145   Register OrDst = MI.getOperand(0).getReg();  in matchRedundantOr()
3152   Register LHS = MI.getOperand(1).getReg();  in matchRedundantOr()
3153   Register RHS = MI.getOperand(2).getReg();  in matchRedundantOr()
3181   Register Src = MI.getOperand(1).getReg();  in matchRedundantSExtInReg()
3182   unsigned ExtBits = MI.getOperand(2).getImm();  in matchRedundantSExtInReg()
3197   LLT Ty = MRI.getType(MI.getOperand(0).getReg());  in matchNotCmp()
3202   if (!mi_match(MI.getOperand(0).getReg(), MRI,  in matchNotCmp()
3245       RegsToNegate.push_back(Def->getOperand(1).getReg());  in matchNotCmp()
3246       RegsToNegate.push_back(Def->getOperand(2).getReg());  in matchNotCmp()
3283       MachineOperand &PredOp = Def->getOperand(1);  in applyNotCmp()
3299   replaceRegWith(MRI, MI.getOperand(0).getReg(), MI.getOperand(1).getReg());  in applyNotCmp()
3309   Register AndReg = MI.getOperand(1).getReg();  in matchXorOfAndWithSameReg()
3310   Register SharedReg = MI.getOperand(2).getReg();  in matchXorOfAndWithSameReg()
3343   MI.getOperand(1).setReg(Not->getOperand(0).getReg());  in applyXorOfAndWithSameReg()
3344   MI.getOperand(2).setReg(Y);  in applyXorOfAndWithSameReg()
3349   Register DstReg = MI.getOperand(0).getReg();  in matchPtrAddZero()
3357     auto ConstVal = getConstantVRegVal(MI.getOperand(1).getReg(), MRI);  in matchPtrAddZero()
3362   const MachineInstr *VecMI = MRI.getVRegDef(MI.getOperand(1).getReg());  in matchPtrAddZero()
3369   Builder.buildIntToPtr(MI.getOperand(0), MI.getOperand(2));  in applyPtrAddZero()
3375   Register DstReg = MI.getOperand(0).getReg();  in applySimplifyURemByPow2()
3376   Register Src0 = MI.getOperand(1).getReg();  in applySimplifyURemByPow2()
3377   Register Pow2Src1 = MI.getOperand(2).getReg();  in applySimplifyURemByPow2()
3420       MRI.getType(Root->getOperand(0).getReg()).getSizeInBytes() - 1;  in findCandidatesForLoadOrCombine()
3425     Register OrLHS = Curr->getOperand(1).getReg();  in findCandidatesForLoadOrCombine()
3426     Register OrRHS = Curr->getOperand(2).getReg();  in findCandidatesForLoadOrCombine()
3549     if (!mi_match(Load->getOperand(1).getReg(), MRI,  in findLoadOffsetsForLoadOrCombine()
3551       LoadPtr = Load->getOperand(1).getReg();  in findLoadOffsetsForLoadOrCombine()
3634   Register Dst = MI.getOperand(0).getReg();  in matchLoadOrCombine()
3739   Register DstReg = MI.getOperand(0).getReg();  in matchExtendThroughPhis()
3769     auto *DefMI = getDefIgnoringCopies(MI.getOperand(Idx).getReg(), MRI);  in matchExtendThroughPhis()
3777       InSrcs.insert(getDefIgnoringCopies(MI.getOperand(Idx).getReg(), MRI));  in matchExtendThroughPhis()
3793   Register DstReg = ExtMI->getOperand(0).getReg();  in applyExtendThroughPhis()
3802     auto *SrcMI = MRI.getVRegDef(MI.getOperand(SrcIdx).getReg());  in applyExtendThroughPhis()
3815                                           SrcMI->getOperand(0).getReg());  in applyExtendThroughPhis()
3824     auto &MO = MI.getOperand(SrcIdx);  in applyExtendThroughPhis()
3830     NewPhi.addUse(NewSrc->getOperand(0).getReg());  in applyExtendThroughPhis()
3841   Register SrcVec = MI.getOperand(1).getReg();  in matchExtractVecEltBuildVec()
3847   auto Cst = getConstantVRegValWithLookThrough(MI.getOperand(2).getReg(), MRI);  in matchExtractVecEltBuildVec()
3858     LLT ScalarTy = MRI.getType(BuildVecMI->getOperand(1).getReg());  in matchExtractVecEltBuildVec()
3869   Reg = BuildVecMI->getOperand(VecIdx + 1).getReg();  in matchExtractVecEltBuildVec()
3878   Register DstReg = MI.getOperand(0).getReg();  in applyExtractVecEltBuildVec()
3911   Register DstReg = MI.getOperand(0).getReg();  in matchExtractAllEltsFromBuildVector()
3920     auto Cst = getConstantVRegVal(II.getOperand(2).getReg(), MRI);  in matchExtractAllEltsFromBuildVector()
3928         std::make_pair(MI.getOperand(Idx + 1).getReg(), &II));  in matchExtractAllEltsFromBuildVector()
3940     replaceRegWith(MRI, ExtMI->getOperand(0).getReg(), Pair.first);  in applyExtractAllEltsFromBuildVector()
3963   Register X = MI.getOperand(1).getReg();  in matchFunnelShiftToRotate()
3964   Register Y = MI.getOperand(2).getReg();  in matchFunnelShiftToRotate()
3988       MRI.getType(MI.getOperand(0).getReg()).getScalarSizeInBits();  in matchRotateOutOfRange()
3989   Register AmtReg = MI.getOperand(2).getReg();  in matchRotateOutOfRange()
4003       MRI.getType(MI.getOperand(0).getReg()).getScalarSizeInBits();  in applyRotateOutOfRange()
4005   Register Amt = MI.getOperand(2).getReg();  in applyRotateOutOfRange()
4008   Amt = Builder.buildURem(AmtTy, MI.getOperand(2).getReg(), Bits).getReg(0);  in applyRotateOutOfRange()
4010   MI.getOperand(2).setReg(Amt);  in applyRotateOutOfRange()
4017   auto Pred = static_cast<CmpInst::Predicate>(MI.getOperand(1).getPredicate());  in matchICmpToTrueFalseKnownBits()
4018   auto KnownLHS = KB->getKnownBits(MI.getOperand(2).getReg());  in matchICmpToTrueFalseKnownBits()
4019   auto KnownRHS = KB->getKnownBits(MI.getOperand(3).getReg());  in matchICmpToTrueFalseKnownBits()
4061                            MRI.getType(MI.getOperand(0).getReg()).isVector(),  in matchICmpToTrueFalseKnownBits()
4071   Register Dst = MI.getOperand(0).getReg();  in matchBitfieldExtractFromSExtInReg()
4072   Register Src = MI.getOperand(1).getReg();  in matchBitfieldExtractFromSExtInReg()
4077   int64_t Width = MI.getOperand(2).getImm();  in matchBitfieldExtractFromSExtInReg()
4100   Register Dst = MI.getOperand(0).getReg();  in matchBitfieldExtractFromAnd()
4109   if (!mi_match(MI.getOperand(0).getReg(), MRI,  in matchBitfieldExtractFromAnd()
4137   Register Src1Reg = PtrAdd.getOperand(1).getReg();  in reassociationCanBreakAddressingModePattern()
4142   Register Src2Reg = PtrAdd.getOperand(2).getReg();  in reassociationCanBreakAddressingModePattern()
4147   auto C1 = getConstantVRegVal(Src1Def->getOperand(2).getReg(), MRI);  in reassociationCanBreakAddressingModePattern()
4165       Register DefReg = ConvUseMI->getOperand(0).getReg();  in reassociationCanBreakAddressingModePattern()
4182         MRI.getType(ConvUseMI->getOperand(1).getReg()).getAddressSpace();  in reassociationCanBreakAddressingModePattern()
4184         getTypeForLLT(MRI.getType(ConvUseMI->getOperand(0).getReg()),  in reassociationCanBreakAddressingModePattern()
4212   Register Src1Reg = MI.getOperand(1).getReg();  in matchReassocPtrAdd()
4213   Register Src2Reg = MI.getOperand(2).getReg();  in matchReassocPtrAdd()
4221     auto C2 = getConstantVRegVal(RHS->getOperand(2).getReg(), MRI);  in matchReassocPtrAdd()
4226       LLT PtrTy = MRI.getType(MI.getOperand(0).getReg());  in matchReassocPtrAdd()
4229           Builder.buildPtrAdd(PtrTy, Src1Reg, RHS->getOperand(1).getReg());  in matchReassocPtrAdd()
4231       MI.getOperand(1).setReg(NewBase.getReg(0));  in matchReassocPtrAdd()
4232       MI.getOperand(2).setReg(RHS->getOperand(2).getReg());  in matchReassocPtrAdd()
4237     Register LHSSrc1 = LHS->getOperand(1).getReg();  in matchReassocPtrAdd()
4238     Register LHSSrc2 = LHS->getOperand(2).getReg();  in matchReassocPtrAdd()
4249       MI.getOperand(1).setReg(LHSSrc1);  in matchReassocPtrAdd()
4250       MI.getOperand(2).setReg(NewCst.getReg(0));  in matchReassocPtrAdd()
4258   Register Op1 = MI.getOperand(1).getReg();  in matchConstantFold()
4259   Register Op2 = MI.getOperand(2).getReg();  in matchConstantFold()