88   LaneBitmask transferDefinedLanes(const MachineOperand &Def, unsigned OpNum,
249     const MachineOperand &Def = MI.getOperand(0);  in transferUsedLanes()  local
250     Register DefReg = Def.getReg();  in transferUsedLanes()
284   const MachineOperand &Def = *MI.defs().begin();  in transferDefinedLanesStep()  local
285   Register DefReg = Def.getReg();  in transferDefinedLanesStep()
295   DefinedLanes = transferDefinedLanes(Def, OpNum, DefinedLanes);  in transferDefinedLanesStep()
307 LaneBitmask DetectDeadLanes::transferDefinedLanes(const MachineOperand &Def,  in transferDefinedLanes()  argument
309   const MachineInstr &MI = *Def.getParent();  in transferDefinedLanes()
343   assert(Def.getSubReg() == 0 &&  in transferDefinedLanes()
345   DefinedLanes &= MRI->getMaxLaneMaskForVReg(Def.getReg());  in transferDefinedLanes()
355   const MachineOperand &Def = *MRI->def_begin(Reg);  in determineInitialDefinedLanes()  local
356   const MachineInstr &DefMI = *Def.getParent();  in determineInitialDefinedLanes()
364     if (Def.isDead())  in determineInitialDefinedLanes()
402       DefinedLanes |= transferDefinedLanes(Def, OpNum, MODefinedLanes);  in determineInitialDefinedLanes()
406   if (DefMI.isImplicitDef() || Def.isDead())  in determineInitialDefinedLanes()
409   assert(Def.getSubReg() == 0 &&  in determineInitialDefinedLanes()
427       const MachineOperand &Def = *UseMI.defs().begin();  in determineInitialUsedLanes()  local
428       Register DefReg = Def.getReg();  in determineInitialUsedLanes()
469   const MachineOperand &Def = MI.getOperand(0);  in isUndefInput()  local
470   Register DefReg = Def.getReg();  in isUndefInput()
511     MachineOperand &Def = *MRI->def_begin(Reg);  in runOnce()  local
512     const MachineInstr &MI = *Def.getParent();  in runOnce()