Lines Matching refs:setflags
1156 if setflags then in EmulateADDRdSPImm()
1217 if setflags then in EmulateMOVRdSP()
1279 if setflags then in EmulateMOVRdRm()
1292 bool setflags; in EmulateMOVRdRm() local
1297 setflags = false; in EmulateMOVRdRm()
1304 setflags = true; in EmulateMOVRdRm()
1311 setflags = BitIsSet(opcode, 20); in EmulateMOVRdRm()
1313 if (setflags && (BadReg(Rd) || BadReg(Rm))) in EmulateMOVRdRm()
1317 if (!setflags && (Rd == 15 || Rm == 15 || (Rd == 13 && Rm == 13))) in EmulateMOVRdRm()
1323 setflags = BitIsSet(opcode, 20); in EmulateMOVRdRm()
1327 if (Rd == 15 && setflags) in EmulateMOVRdRm()
1349 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags)) in EmulateMOVRdRm()
1370 if setflags then in EmulateMOVRdImm()
1385 bool setflags; in EmulateMOVRdImm() local
1389 setflags = !InITBlock(); in EmulateMOVRdImm()
1397 setflags = BitIsSet(opcode, 20); in EmulateMOVRdImm()
1408 setflags = false; in EmulateMOVRdImm()
1424 setflags = BitIsSet(opcode, 20); in EmulateMOVRdImm()
1429 if ((Rd == 15) && setflags) in EmulateMOVRdImm()
1437 setflags = false; in EmulateMOVRdImm()
1457 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateMOVRdImm()
1480 if setflags then in EmulateMUL()
1493 bool setflags; in EmulateMUL() local
1502 setflags = !InITBlock(); in EmulateMUL()
1515 setflags = false; in EmulateMUL()
1528 setflags = BitIsSet(opcode, 20); in EmulateMUL()
1578 if (setflags) { in EmulateMUL()
1612 if setflags then in EmulateMVNImm()
1624 bool setflags; in EmulateMVNImm() local
1628 setflags = BitIsSet(opcode, 20); in EmulateMVNImm()
1633 setflags = BitIsSet(opcode, 20); in EmulateMVNImm()
1638 if (Rd == 15 && setflags) in EmulateMVNImm()
1651 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateMVNImm()
1673 if setflags then in EmulateMVNReg()
1686 bool setflags; in EmulateMVNReg() local
1692 setflags = !InITBlock(); in EmulateMVNReg()
1701 setflags = BitIsSet(opcode, 20); in EmulateMVNReg()
1710 setflags = BitIsSet(opcode, 20); in EmulateMVNReg()
1732 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateMVNReg()
1841 if setflags then in EmulateADDSPImm()
1857 bool setflags; in EmulateADDSPImm() local
1863 setflags = false; in EmulateADDSPImm()
1870 setflags = false; in EmulateADDSPImm()
1878 setflags = Bit32(opcode, 20); in EmulateADDSPImm()
1881 if (d == 15 && setflags == 1) in EmulateADDSPImm()
1885 if (d == 15 && setflags == 0) in EmulateADDSPImm()
1893 setflags = false; in EmulateADDSPImm()
1930 if (!WriteCoreRegOptionalFlags(context, res.result, d, setflags, in EmulateADDSPImm()
1953 if setflags then in EmulateADDSPRm()
2283 if setflags then in EmulateSUBR7IPImm()
2333 if setflags then in EmulateSUBIPSPImm()
2386 if setflags then in EmulateSUBSPImm()
2401 bool setflags; in EmulateSUBSPImm() local
2406 setflags = false; in EmulateSUBSPImm()
2411 setflags = BitIsSet(opcode, 20); in EmulateSUBSPImm()
2413 if (Rd == 15 && setflags) in EmulateSUBSPImm()
2415 if (Rd == 15 && !setflags) in EmulateSUBSPImm()
2420 setflags = false; in EmulateSUBSPImm()
2427 setflags = BitIsSet(opcode, 20); in EmulateSUBSPImm()
2432 if (Rd == 15 && setflags) in EmulateSUBSPImm()
2452 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSUBSPImm()
3022 if setflags then in EmulateADDImmThumb()
3034 bool setflags; in EmulateADDImmThumb() local
3045 setflags = !InITBlock(); in EmulateADDImmThumb()
3055 setflags = !InITBlock(); in EmulateADDImmThumb()
3066 setflags = BitIsSet(opcode, 20); in EmulateADDImmThumb()
3085 setflags = false; in EmulateADDImmThumb()
3127 if (!WriteCoreRegOptionalFlags(context, res.result, d, setflags, in EmulateADDImmThumb()
3148 if setflags then in EmulateADDImmARM()
3161 bool setflags; in EmulateADDImmARM() local
3166 setflags = BitIsSet(opcode, 20); in EmulateADDImmARM()
3192 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADDImmARM()
3214 if setflags then in EmulateADDReg()
3227 bool setflags; in EmulateADDReg() local
3233 setflags = !InITBlock(); in EmulateADDReg()
3240 setflags = false; in EmulateADDReg()
3252 setflags = BitIsSet(opcode, 20); in EmulateADDReg()
3282 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADDReg()
3543 if setflags then in EmulateASRImm()
3567 if setflags then in EmulateASRReg()
3591 if setflags then in EmulateLSLImm()
3614 if setflags then in EmulateLSLReg()
3639 if setflags then in EmulateLSRImm()
3662 if setflags then in EmulateLSRReg()
3687 if setflags then in EmulateRORImm()
3711 if setflags then in EmulateRORReg()
3737 if setflags then in EmulateRRX()
3763 bool setflags; in EmulateShiftImm() local
3783 setflags = !InITBlock(); in EmulateShiftImm()
3794 setflags = BitIsSet(opcode, 20); in EmulateShiftImm()
3802 setflags = BitIsSet(opcode, 20); in EmulateShiftImm()
3831 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateShiftImm()
3853 bool setflags; in EmulateShiftReg() local
3859 setflags = !InITBlock(); in EmulateShiftReg()
3865 setflags = BitIsSet(opcode, 20); in EmulateShiftReg()
3873 setflags = BitIsSet(opcode, 20); in EmulateShiftReg()
3902 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateShiftReg()
5813 if setflags then in EmulateADCImm()
5826 bool setflags; in EmulateADCImm() local
5831 setflags = BitIsSet(opcode, 20); in EmulateADCImm()
5839 setflags = BitIsSet(opcode, 20); in EmulateADCImm()
5842 if (Rd == 15 && setflags) in EmulateADCImm()
5860 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADCImm()
5883 if setflags then in EmulateADCReg()
5896 bool setflags; in EmulateADCReg() local
5901 setflags = !InITBlock(); in EmulateADCReg()
5909 setflags = BitIsSet(opcode, 20); in EmulateADCReg()
5918 setflags = BitIsSet(opcode, 20); in EmulateADCReg()
5921 if (Rd == 15 && setflags) in EmulateADCReg()
5947 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADCReg()
6030 if setflags then in EmulateANDImm()
6043 bool setflags; in EmulateANDImm() local
6049 setflags = BitIsSet(opcode, 20); in EmulateANDImm()
6054 if (Rd == 15 && setflags) in EmulateANDImm()
6056 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn)) in EmulateANDImm()
6062 setflags = BitIsSet(opcode, 20); in EmulateANDImm()
6067 if (Rd == 15 && setflags) in EmulateANDImm()
6085 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateANDImm()
6106 if setflags then in EmulateANDReg()
6119 bool setflags; in EmulateANDReg() local
6125 setflags = !InITBlock(); in EmulateANDReg()
6133 setflags = BitIsSet(opcode, 20); in EmulateANDReg()
6136 if (Rd == 15 && setflags) in EmulateANDReg()
6138 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn) || BadReg(Rm)) in EmulateANDReg()
6145 setflags = BitIsSet(opcode, 20); in EmulateANDReg()
6148 if (Rd == 15 && setflags) in EmulateANDReg()
6174 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateANDReg()
6195 if setflags then in EmulateBICImm()
6208 bool setflags; in EmulateBICImm() local
6214 setflags = BitIsSet(opcode, 20); in EmulateBICImm()
6224 setflags = BitIsSet(opcode, 20); in EmulateBICImm()
6231 if (Rd == 15 && setflags) in EmulateBICImm()
6249 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateBICImm()
6271 if setflags then in EmulateBICReg()
6284 bool setflags; in EmulateBICReg() local
6290 setflags = !InITBlock(); in EmulateBICReg()
6298 setflags = BitIsSet(opcode, 20); in EmulateBICReg()
6307 setflags = BitIsSet(opcode, 20); in EmulateBICReg()
6312 if (Rd == 15 && setflags) in EmulateBICReg()
6338 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateBICReg()
8837 if setflags then in EmulateEORImm()
8850 bool setflags; in EmulateEORImm() local
8856 setflags = BitIsSet(opcode, 20); in EmulateEORImm()
8861 if (Rd == 15 && setflags) in EmulateEORImm()
8863 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn)) in EmulateEORImm()
8869 setflags = BitIsSet(opcode, 20); in EmulateEORImm()
8876 if (Rd == 15 && setflags) in EmulateEORImm()
8894 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateEORImm()
8916 if setflags then in EmulateEORReg()
8929 bool setflags; in EmulateEORReg() local
8935 setflags = !InITBlock(); in EmulateEORReg()
8943 setflags = BitIsSet(opcode, 20); in EmulateEORReg()
8946 if (Rd == 15 && setflags) in EmulateEORReg()
8948 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn) || BadReg(Rm)) in EmulateEORReg()
8955 setflags = BitIsSet(opcode, 20); in EmulateEORReg()
8960 if (Rd == 15 && setflags) in EmulateEORReg()
8986 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateEORReg()
9006 if setflags then in EmulateORRImm()
9019 bool setflags; in EmulateORRImm() local
9025 setflags = BitIsSet(opcode, 20); in EmulateORRImm()
9038 setflags = BitIsSet(opcode, 20); in EmulateORRImm()
9043 if (Rd == 15 && setflags) in EmulateORRImm()
9061 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateORRImm()
9083 if setflags then in EmulateORRReg()
9096 bool setflags; in EmulateORRReg() local
9102 setflags = !InITBlock(); in EmulateORRReg()
9110 setflags = BitIsSet(opcode, 20); in EmulateORRReg()
9122 setflags = BitIsSet(opcode, 20); in EmulateORRReg()
9125 if (Rd == 15 && setflags) in EmulateORRReg()
9151 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateORRReg()
9171 if setflags then in EmulateRSBImm()
9182 bool setflags; in EmulateRSBImm() local
9189 setflags = !InITBlock(); in EmulateRSBImm()
9195 setflags = BitIsSet(opcode, 20); in EmulateRSBImm()
9203 setflags = BitIsSet(opcode, 20); in EmulateRSBImm()
9208 if (Rd == 15 && setflags) in EmulateRSBImm()
9225 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSBImm()
9244 if setflags then in EmulateRSBReg()
9256 bool setflags; in EmulateRSBReg() local
9264 setflags = BitIsSet(opcode, 20); in EmulateRSBReg()
9274 setflags = BitIsSet(opcode, 20); in EmulateRSBReg()
9279 if (Rd == 15 && setflags) in EmulateRSBReg()
9303 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSBReg()
9322 if setflags then in EmulateRSCImm()
9333 bool setflags; in EmulateRSCImm() local
9340 setflags = BitIsSet(opcode, 20); in EmulateRSCImm()
9345 if (Rd == 15 && setflags) in EmulateRSCImm()
9362 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSCImm()
9382 if setflags then in EmulateRSCReg()
9394 bool setflags; in EmulateRSCReg() local
9402 setflags = BitIsSet(opcode, 20); in EmulateRSCReg()
9407 if (Rd == 15 && setflags) in EmulateRSCReg()
9431 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSCReg()
9451 if setflags then in EmulateSBCImm()
9462 bool setflags; in EmulateSBCImm() local
9469 setflags = BitIsSet(opcode, 20); in EmulateSBCImm()
9477 setflags = BitIsSet(opcode, 20); in EmulateSBCImm()
9482 if (Rd == 15 && setflags) in EmulateSBCImm()
9499 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSBCImm()
9520 if setflags then in EmulateSBCReg()
9532 bool setflags; in EmulateSBCReg() local
9539 setflags = !InITBlock(); in EmulateSBCReg()
9547 setflags = BitIsSet(opcode, 20); in EmulateSBCReg()
9556 setflags = BitIsSet(opcode, 20); in EmulateSBCReg()
9561 if (Rd == 15 && setflags) in EmulateSBCReg()
9585 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSBCReg()
9600 if setflags then in EmulateSUBImmThumb()
9611 bool setflags; in EmulateSUBImmThumb() local
9618 setflags = !InITBlock(); in EmulateSUBImmThumb()
9623 setflags = !InITBlock(); in EmulateSUBImmThumb()
9629 setflags = BitIsSet(opcode, 20); in EmulateSUBImmThumb()
9633 if (Rd == 15 && setflags) in EmulateSUBImmThumb()
9641 if (Rd == 13 || (Rd == 15 && !setflags) || Rn == 15) in EmulateSUBImmThumb()
9647 setflags = BitIsSet(opcode, 20); in EmulateSUBImmThumb()
9675 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSUBImmThumb()
9693 if setflags then in EmulateSUBImmARM()
9705 bool setflags; in EmulateSUBImmARM() local
9712 setflags = BitIsSet(opcode, 20); in EmulateSUBImmARM()
9716 if (Rn == 15 && !setflags) in EmulateSUBImmARM()
9725 if (Rd == 15 && setflags) in EmulateSUBImmARM()
9749 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSUBImmARM()
10024 if setflags then in EmulateSUBSPReg()
10036 bool setflags; in EmulateSUBSPReg() local
10045 setflags = BitIsSet(opcode, 20); in EmulateSUBSPReg()
10064 setflags = BitIsSet(opcode, 20); in EmulateSUBSPReg()
10068 if (d == 15 && setflags) in EmulateSUBSPReg()
10103 if (!WriteCoreRegOptionalFlags(context, res.result, dwarf_r0 + d, setflags, in EmulateSUBSPReg()
10120 if setflags then in EmulateADDRegShift()
10134 bool setflags; in EmulateADDRegShift() local
10146 setflags = BitIsSet(opcode, 20); in EmulateADDRegShift()
10200 if (setflags) in EmulateADDRegShift()
10218 if setflags then in EmulateSUBReg()
10231 bool setflags; in EmulateSUBReg() local
10241 setflags = !InITBlock(); in EmulateSUBReg()
10254 setflags = BitIsSet(opcode, 20); in EmulateSUBReg()
10257 if (d == 15 && setflags == 1) in EmulateSUBReg()
10281 setflags = BitIsSet(opcode, 20); in EmulateSUBReg()
10285 if ((d == 15) && setflags) in EmulateSUBReg()
10330 if (!WriteCoreRegOptionalFlags(context, res.result, dwarf_r0 + d, setflags, in EmulateSUBReg()
14253 Context &context, const uint32_t result, const uint32_t Rd, bool setflags, in WriteCoreRegOptionalFlags() argument
14276 if (setflags) in WriteCoreRegOptionalFlags()