Lines Matching refs:encoding
52 reg_info.encoding = eEncodingVector; in LLDB_PLUGIN_DEFINE_ADV()
58 reg_info.encoding = eEncodingIEEE754; in LLDB_PLUGIN_DEFINE_ADV()
62 reg_info.encoding = eEncodingIEEE754; in LLDB_PLUGIN_DEFINE_ADV()
66 reg_info.encoding = eEncodingIEEE754; in LLDB_PLUGIN_DEFINE_ADV()
70 reg_info.encoding = eEncodingUint; in LLDB_PLUGIN_DEFINE_ADV()
895 const ARMEncoding encoding) { in EmulatePUSH() argument
931 switch (encoding) { in EmulatePUSH()
1017 const ARMEncoding encoding) { in EmulatePOP() argument
1046 switch (encoding) { in EmulatePOP()
1145 const ARMEncoding encoding) { in EmulateADDRdSPImm() argument
1172 switch (encoding) { in EmulateADDRdSPImm()
1206 const ARMEncoding encoding) { in EmulateMOVRdSP() argument
1232 switch (encoding) { in EmulateMOVRdSP()
1261 const ARMEncoding encoding) { in EmulateMOVLowHigh() argument
1262 return EmulateMOVRdRm(opcode, encoding); in EmulateMOVLowHigh()
1268 const ARMEncoding encoding) { in EmulateMOVRdRm() argument
1293 switch (encoding) { in EmulateMOVRdRm()
1328 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateMOVRdRm()
1359 const ARMEncoding encoding) { in EmulateMOVRdImm() argument
1386 switch (encoding) { in EmulateMOVRdImm()
1430 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateMOVRdImm()
1472 const ARMEncoding encoding) { in EmulateMUL() argument
1496 switch (encoding) { in EmulateMUL()
1601 const ARMEncoding encoding) { in EmulateMVNImm() argument
1625 switch (encoding) { in EmulateMVNImm()
1639 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateMVNImm()
1661 const ARMEncoding encoding) { in EmulateMVNReg() argument
1688 switch (encoding) { in EmulateMVNReg()
1742 const ARMEncoding encoding) { in EmulateLDRRtPCRelative() argument
1782 switch (encoding) { in EmulateLDRRtPCRelative()
1830 const ARMEncoding encoding) { in EmulateADDSPImm() argument
1858 switch (encoding) { in EmulateADDSPImm()
1941 const ARMEncoding encoding) { in EmulateADDSPRm() argument
1968 switch (encoding) { in EmulateADDSPRm()
2002 const ARMEncoding encoding) { in EmulateBLXImmediate() argument
2032 switch (encoding) { in EmulateBLXImmediate()
2106 const ARMEncoding encoding) { in EmulateBLXRm() argument
2133 switch (encoding) { in EmulateBLXRm()
2171 const ARMEncoding encoding) { in EmulateBXRm() argument
2185 switch (encoding) { in EmulateBXRm()
2219 const ARMEncoding encoding) { in EmulateBXJRm() argument
2239 switch (encoding) { in EmulateBXJRm()
2272 const ARMEncoding encoding) { in EmulateSUBR7IPImm() argument
2297 switch (encoding) { in EmulateSUBR7IPImm()
2322 const ARMEncoding encoding) { in EmulateSUBIPSPImm() argument
2347 switch (encoding) { in EmulateSUBIPSPImm()
2375 const ARMEncoding encoding) { in EmulateSUBSPImm() argument
2403 switch (encoding) { in EmulateSUBSPImm()
2433 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateSUBSPImm()
2461 const ARMEncoding encoding) { in EmulateSTRRtSP() argument
2488 switch (encoding) { in EmulateSTRRtSP()
2555 const ARMEncoding encoding) { in EmulateVPUSH() argument
2586 switch (encoding) { in EmulateVPUSH()
2648 const ARMEncoding encoding) { in EmulateVPOP() argument
2678 switch (encoding) { in EmulateVPOP()
2739 const ARMEncoding encoding) { in EmulateSVC() argument
2758 switch (encoding) { in EmulateSVC()
2785 const ARMEncoding encoding) { in EmulateIT() argument
2797 const ARMEncoding encoding) { in EmulateNop() argument
2804 const ARMEncoding encoding) { in EmulateB() argument
2824 switch (encoding) { in EmulateB()
2888 const ARMEncoding encoding) { in EmulateCB() argument
2912 switch (encoding) { in EmulateCB()
2942 const ARMEncoding encoding) { in EmulateTB() argument
2961 switch (encoding) { in EmulateTB()
3016 const ARMEncoding encoding) { in EmulateADDImmThumb() argument
3039 switch (encoding) { in EmulateADDImmThumb()
3138 const ARMEncoding encoding) { in EmulateADDImmARM() argument
3162 switch (encoding) { in EmulateADDImmARM()
3203 const ARMEncoding encoding) { in EmulateADDReg() argument
3228 switch (encoding) { in EmulateADDReg()
3292 const ARMEncoding encoding) { in EmulateCMNImm() argument
3308 switch (encoding) { in EmulateCMNImm()
3339 const ARMEncoding encoding) { in EmulateCMNReg() argument
3358 switch (encoding) { in EmulateCMNReg()
3405 const ARMEncoding encoding) { in EmulateCMPImm() argument
3421 switch (encoding) { in EmulateCMPImm()
3456 const ARMEncoding encoding) { in EmulateCMPReg() argument
3475 switch (encoding) { in EmulateCMPReg()
3533 const ARMEncoding encoding) { in EmulateASRImm() argument
3550 return EmulateShiftImm(opcode, encoding, SRType_ASR); in EmulateASRImm()
3559 const ARMEncoding encoding) { in EmulateASRReg() argument
3574 return EmulateShiftReg(opcode, encoding, SRType_ASR); in EmulateASRReg()
3581 const ARMEncoding encoding) { in EmulateLSLImm() argument
3598 return EmulateShiftImm(opcode, encoding, SRType_LSL); in EmulateLSLImm()
3606 const ARMEncoding encoding) { in EmulateLSLReg() argument
3621 return EmulateShiftReg(opcode, encoding, SRType_LSL); in EmulateLSLReg()
3629 const ARMEncoding encoding) { in EmulateLSRImm() argument
3646 return EmulateShiftImm(opcode, encoding, SRType_LSR); in EmulateLSRImm()
3654 const ARMEncoding encoding) { in EmulateLSRReg() argument
3669 return EmulateShiftReg(opcode, encoding, SRType_LSR); in EmulateLSRReg()
3677 const ARMEncoding encoding) { in EmulateRORImm() argument
3694 return EmulateShiftImm(opcode, encoding, SRType_ROR); in EmulateRORImm()
3703 const ARMEncoding encoding) { in EmulateRORReg() argument
3718 return EmulateShiftReg(opcode, encoding, SRType_ROR); in EmulateRORReg()
3727 const ARMEncoding encoding) { in EmulateRRX() argument
3744 return EmulateShiftImm(opcode, encoding, SRType_RRX); in EmulateRRX()
3748 const ARMEncoding encoding, in EmulateShiftImm() argument
3767 ARMEncoding use_encoding = encoding; in EmulateShiftImm()
3838 const ARMEncoding encoding, in EmulateShiftReg() argument
3854 switch (encoding) { in EmulateShiftReg()
3912 const ARMEncoding encoding) { in EmulateLDM() argument
3936 switch (encoding) { in EmulateLDM()
4055 const ARMEncoding encoding) { in EmulateLDMDA() argument
4082 switch (encoding) { in EmulateLDMDA()
4172 const ARMEncoding encoding) { in EmulateLDMDB() argument
4196 switch (encoding) { in EmulateLDMDB()
4311 const ARMEncoding encoding) { in EmulateLDMIB() argument
4334 switch (encoding) { in EmulateLDMIB()
4423 const ARMEncoding encoding) { in EmulateLDRRtRnImm() argument
4451 switch (encoding) { in EmulateLDRRtRnImm()
4586 const ARMEncoding encoding) { in EmulateSTM() argument
4614 switch (encoding) { in EmulateSTM()
4738 const ARMEncoding encoding) { in EmulateSTMDA() argument
4767 switch (encoding) { in EmulateSTMDA()
4860 const ARMEncoding encoding) { in EmulateSTMDB() argument
4889 switch (encoding) { in EmulateSTMDB()
5009 const ARMEncoding encoding) { in EmulateSTMIB() argument
5038 switch (encoding) { in EmulateSTMIB()
5131 const ARMEncoding encoding) { in EmulateSTRThumb() argument
5156 switch (encoding) { in EmulateSTRThumb()
5298 const ARMEncoding encoding) { in EmulateSTRRegister() argument
5331 switch (encoding) { in EmulateSTRRegister()
5488 const ARMEncoding encoding) { in EmulateSTRBThumb() argument
5508 switch (encoding) { in EmulateSTRBThumb()
5625 const ARMEncoding encoding) { in EmulateSTRHRegister() argument
5652 switch (encoding) { in EmulateSTRHRegister()
5803 const ARMEncoding encoding) { in EmulateADCImm() argument
5827 switch (encoding) { in EmulateADCImm()
5843 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateADCImm()
5872 const ARMEncoding encoding) { in EmulateADCReg() argument
5897 switch (encoding) { in EmulateADCReg()
5922 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateADCReg()
5957 const ARMEncoding encoding) { in EmulateADR() argument
5975 switch (encoding) { in EmulateADR()
6020 const ARMEncoding encoding) { in EmulateANDImm() argument
6045 switch (encoding) { in EmulateANDImm()
6068 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateANDImm()
6095 const ARMEncoding encoding) { in EmulateANDReg() argument
6121 switch (encoding) { in EmulateANDReg()
6149 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateANDReg()
6185 const ARMEncoding encoding) { in EmulateBICImm() argument
6210 switch (encoding) { in EmulateBICImm()
6232 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateBICImm()
6260 const ARMEncoding encoding) { in EmulateBICReg() argument
6286 switch (encoding) { in EmulateBICReg()
6313 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateBICReg()
6349 const ARMEncoding encoding) { in EmulateLDRImmediateARM() argument
6377 switch (encoding) { in EmulateLDRImmediateARM()
6486 const ARMEncoding encoding) { in EmulateLDRRegister() argument
6520 switch (encoding) { in EmulateLDRRegister()
6693 const ARMEncoding encoding) { in EmulateLDRBImmediate() argument
6714 switch (encoding) { in EmulateLDRBImmediate()
6840 const ARMEncoding encoding) { in EmulateLDRBLiteral() argument
6855 switch (encoding) { in EmulateLDRBLiteral()
6921 const ARMEncoding encoding) { in EmulateLDRBRegister() argument
6945 switch (encoding) { in EmulateLDRBRegister()
7083 const ARMEncoding encoding) { in EmulateLDRHImmediate() argument
7108 switch (encoding) { in EmulateLDRHImmediate()
7230 const ARMEncoding encoding) { in EmulateLDRHLiteral() argument
7251 switch (encoding) { in EmulateLDRHLiteral()
7334 const ARMEncoding encoding) { in EmulateLDRHRegister() argument
7362 switch (encoding) { in EmulateLDRHRegister()
7510 const ARMEncoding encoding) { in EmulateLDRSBImmediate() argument
7531 switch (encoding) { in EmulateLDRSBImmediate()
7659 const ARMEncoding encoding) { in EmulateLDRSBLiteral() argument
7676 switch (encoding) { in EmulateLDRSBLiteral()
7747 const ARMEncoding encoding) { in EmulateLDRSBRegister() argument
7771 switch (encoding) { in EmulateLDRSBRegister()
7907 const ARMEncoding encoding) { in EmulateLDRSHImmediate() argument
7932 switch (encoding) { in EmulateLDRSHImmediate()
8066 const ARMEncoding encoding) { in EmulateLDRSHLiteral() argument
8087 switch (encoding) { in EmulateLDRSHLiteral()
8167 const ARMEncoding encoding) { in EmulateLDRSHRegister() argument
8195 switch (encoding) { in EmulateLDRSHRegister()
8347 const ARMEncoding encoding) { in EmulateSXTB() argument
8363 switch (encoding) { in EmulateSXTB()
8432 const ARMEncoding encoding) { in EmulateSXTH() argument
8448 switch (encoding) { in EmulateSXTH()
8517 const ARMEncoding encoding) { in EmulateUXTB() argument
8533 switch (encoding) { in EmulateUXTB()
8600 const ARMEncoding encoding) { in EmulateUXTH() argument
8615 switch (encoding) { in EmulateUXTH()
8681 const ARMEncoding encoding) { in EmulateRFE() argument
8704 switch (encoding) { in EmulateRFE()
8827 const ARMEncoding encoding) { in EmulateEORImm() argument
8852 switch (encoding) { in EmulateEORImm()
8877 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateEORImm()
8905 const ARMEncoding encoding) { in EmulateEORReg() argument
8931 switch (encoding) { in EmulateEORReg()
8961 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateEORReg()
8996 const ARMEncoding encoding) { in EmulateORRImm() argument
9021 switch (encoding) { in EmulateORRImm()
9044 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateORRImm()
9072 const ARMEncoding encoding) { in EmulateORRReg() argument
9098 switch (encoding) { in EmulateORRReg()
9126 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateORRReg()
9161 const ARMEncoding encoding) { in EmulateRSBImm() argument
9185 switch (encoding) { in EmulateRSBImm()
9209 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateRSBImm()
9233 const ARMEncoding encoding) { in EmulateRSBReg() argument
9259 switch (encoding) { in EmulateRSBReg()
9280 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateRSBReg()
9312 const ARMEncoding encoding) { in EmulateRSCImm() argument
9336 switch (encoding) { in EmulateRSCImm()
9346 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateRSCImm()
9371 const ARMEncoding encoding) { in EmulateRSCReg() argument
9397 switch (encoding) { in EmulateRSCReg()
9408 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateRSCReg()
9441 const ARMEncoding encoding) { in EmulateSBCImm() argument
9465 switch (encoding) { in EmulateSBCImm()
9483 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateSBCImm()
9509 const ARMEncoding encoding) { in EmulateSBCReg() argument
9535 switch (encoding) { in EmulateSBCReg()
9562 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateSBCReg()
9593 const ARMEncoding encoding) { in EmulateSUBImmThumb() argument
9614 switch (encoding) { in EmulateSUBImmThumb()
9683 const ARMEncoding encoding) { in EmulateSUBImmARM() argument
9708 switch (encoding) { in EmulateSUBImmARM()
9726 return EmulateSUBSPcLrEtc(opcode, encoding); in EmulateSUBImmARM()
9760 const ARMEncoding encoding) { in EmulateTEQImm() argument
9779 switch (encoding) { in EmulateTEQImm()
9819 const ARMEncoding encoding) { in EmulateTEQReg() argument
9839 switch (encoding) { in EmulateTEQReg()
9885 const ARMEncoding encoding) { in EmulateTSTImm() argument
9904 switch (encoding) { in EmulateTSTImm()
9944 const ARMEncoding encoding) { in EmulateTSTReg() argument
9964 switch (encoding) { in EmulateTSTReg()
10014 const ARMEncoding encoding) { in EmulateSUBSPReg() argument
10040 switch (encoding) { in EmulateSUBSPReg()
10069 EmulateSUBSPcLrEtc(opcode, encoding); in EmulateSUBSPReg()
10112 const ARMEncoding encoding) { in EmulateADDRegShift() argument
10137 switch (encoding) { in EmulateADDRegShift()
10208 const ARMEncoding encoding) { in EmulateSUBReg() argument
10235 switch (encoding) { in EmulateSUBReg()
10286 EmulateSUBSPcLrEtc(opcode, encoding); in EmulateSUBReg()
10342 const ARMEncoding encoding) { in EmulateSTREX() argument
10363 switch (encoding) { in EmulateSTREX()
10453 const ARMEncoding encoding) { in EmulateSTRBImmARM() argument
10473 switch (encoding) { in EmulateSTRBImmARM()
10546 const ARMEncoding encoding) { in EmulateSTRImmARM() argument
10568 switch (encoding) { in EmulateSTRImmARM()
10655 const ARMEncoding encoding) { in EmulateLDRDImmediate() argument
10677 switch (encoding) { in EmulateLDRDImmediate()
10803 const ARMEncoding encoding) { in EmulateLDRDRegister() argument
10825 switch (encoding) { in EmulateLDRDRegister()
10932 const ARMEncoding encoding) { in EmulateSTRDImm() argument
10954 switch (encoding) { in EmulateSTRDImm()
11085 const ARMEncoding encoding) { in EmulateSTRDReg() argument
11107 switch (encoding) { in EmulateSTRDReg()
11223 const ARMEncoding encoding) { in EmulateVLDM() argument
11250 switch (encoding) { in EmulateVLDM()
11416 const ARMEncoding encoding) { in EmulateVSTM() argument
11444 switch (encoding) { in EmulateVSTM()
11621 ARMEncoding encoding) { in EmulateVLDR() argument
11645 switch (encoding) { in EmulateVLDR()
11748 ARMEncoding encoding) { in EmulateVSTR() argument
11771 switch (encoding) { in EmulateVSTR()
11881 ARMEncoding encoding) { in EmulateVLD1Multiple() argument
11907 switch (encoding) { in EmulateVLD1Multiple()
12039 const ARMEncoding encoding) { in EmulateVLD1Single() argument
12061 switch (encoding) { in EmulateVLD1Single()
12068 return EmulateVLD1SingleAll(opcode, encoding); in EmulateVLD1Single()
12216 ARMEncoding encoding) { in EmulateVST1Multiple() argument
12242 switch (encoding) { in EmulateVST1Multiple()
12372 ARMEncoding encoding) { in EmulateVST1Single() argument
12394 switch (encoding) { in EmulateVST1Single()
12531 const ARMEncoding encoding) { in EmulateVLD1SingleAll() argument
12555 switch (encoding) { in EmulateVLD1SingleAll()
12662 const ARMEncoding encoding) { in EmulateSUBSPcLrEtc() argument
12697 switch (encoding) { in EmulateSUBSPcLrEtc()
14346 opcode_data->encoding); in EvaluateInstruction()