Lines Matching refs:Rd
1170 uint32_t Rd; // the destination register in EmulateADDRdSPImm() local
1174 Rd = 7; in EmulateADDRdSPImm()
1178 Rd = Bits32(opcode, 15, 12); in EmulateADDRdSPImm()
1188 if (Rd == GetFramePointerRegisterNumber()) in EmulateADDRdSPImm()
1196 if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + Rd, in EmulateADDRdSPImm()
1231 uint32_t Rd; // the destination register in EmulateMOVRdSP() local
1234 Rd = 7; in EmulateMOVRdSP()
1237 Rd = 12; in EmulateMOVRdSP()
1244 if (Rd == GetFramePointerRegisterNumber()) in EmulateMOVRdSP()
1252 if (!WriteRegisterUnsigned(context, eRegisterKindDWARF, dwarf_r0 + Rd, sp)) in EmulateMOVRdSP()
1291 uint32_t Rd; // the destination register in EmulateMOVRdRm() local
1295 Rd = Bit32(opcode, 7) << 3 | Bits32(opcode, 2, 0); in EmulateMOVRdRm()
1298 if (Rd == 15 && InITBlock() && !LastInITBlock()) in EmulateMOVRdRm()
1302 Rd = Bits32(opcode, 2, 0); in EmulateMOVRdRm()
1309 Rd = Bits32(opcode, 11, 8); in EmulateMOVRdRm()
1313 if (setflags && (BadReg(Rd) || BadReg(Rm))) in EmulateMOVRdRm()
1317 if (!setflags && (Rd == 15 || Rm == 15 || (Rd == 13 && Rm == 13))) in EmulateMOVRdRm()
1321 Rd = Bits32(opcode, 15, 12); in EmulateMOVRdRm()
1327 if (Rd == 15 && setflags) in EmulateMOVRdRm()
1339 if (Rd == 13) in EmulateMOVRdRm()
1341 else if (Rd == GetFramePointerRegisterNumber() && Rm == 13) in EmulateMOVRdRm()
1349 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags)) in EmulateMOVRdRm()
1379 uint32_t Rd; // the destination register in EmulateMOVRdImm() local
1388 Rd = Bits32(opcode, 10, 8); in EmulateMOVRdImm()
1396 Rd = Bits32(opcode, 11, 8); in EmulateMOVRdImm()
1399 if (BadReg(Rd)) in EmulateMOVRdImm()
1407 Rd = Bits32(opcode, 11, 8); in EmulateMOVRdImm()
1416 if (BadReg(Rd)) in EmulateMOVRdImm()
1423 Rd = Bits32(opcode, 15, 12); in EmulateMOVRdImm()
1429 if ((Rd == 15) && setflags) in EmulateMOVRdImm()
1436 Rd = Bits32(opcode, 15, 12); in EmulateMOVRdImm()
1443 if (Rd == 15) in EmulateMOVRdImm()
1457 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateMOVRdImm()
1621 uint32_t Rd; // the destination register in EmulateMVNImm() local
1627 Rd = Bits32(opcode, 11, 8); in EmulateMVNImm()
1632 Rd = Bits32(opcode, 15, 12); in EmulateMVNImm()
1638 if (Rd == 15 && setflags) in EmulateMVNImm()
1651 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateMVNImm()
1683 uint32_t Rd; // the destination register in EmulateMVNReg() local
1690 Rd = Bits32(opcode, 2, 0); in EmulateMVNReg()
1699 Rd = Bits32(opcode, 11, 8); in EmulateMVNReg()
1704 if (BadReg(Rd) || BadReg(Rm)) in EmulateMVNReg()
1708 Rd = Bits32(opcode, 15, 12); in EmulateMVNReg()
1732 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateMVNReg()
2400 uint32_t Rd; in EmulateSUBSPImm() local
2405 Rd = 13; in EmulateSUBSPImm()
2410 Rd = Bits32(opcode, 11, 8); in EmulateSUBSPImm()
2413 if (Rd == 15 && setflags) in EmulateSUBSPImm()
2415 if (Rd == 15 && !setflags) in EmulateSUBSPImm()
2419 Rd = Bits32(opcode, 11, 8); in EmulateSUBSPImm()
2422 if (Rd == 15) in EmulateSUBSPImm()
2426 Rd = Bits32(opcode, 15, 12); in EmulateSUBSPImm()
2432 if (Rd == 15 && setflags) in EmulateSUBSPImm()
2441 if (Rd == 13) { in EmulateSUBSPImm()
2452 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSUBSPImm()
3158 uint32_t Rd, Rn; in EmulateADDImmARM() local
3164 Rd = Bits32(opcode, 15, 12); in EmulateADDImmARM()
3181 if (Rd == 13) in EmulateADDImmARM()
3183 else if (Rd == GetFramePointerRegisterNumber()) in EmulateADDImmARM()
3192 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADDImmARM()
3224 uint32_t Rd, Rn, Rm; in EmulateADDReg() local
3230 Rd = Bits32(opcode, 2, 0); in EmulateADDReg()
3238 Rd = Rn = Bit32(opcode, 7) << 3 | Bits32(opcode, 2, 0); in EmulateADDReg()
3245 if (Rd == 15 && InITBlock() && !LastInITBlock()) in EmulateADDReg()
3249 Rd = Bits32(opcode, 15, 12); in EmulateADDReg()
3282 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADDReg()
3759 uint32_t Rd; // the destination register in EmulateShiftImm() local
3781 Rd = Bits32(opcode, 2, 0); in EmulateShiftImm()
3792 Rd = Bits32(opcode, 11, 8); in EmulateShiftImm()
3796 if (BadReg(Rd) || BadReg(Rm)) in EmulateShiftImm()
3800 Rd = Bits32(opcode, 15, 12); in EmulateShiftImm()
3831 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateShiftImm()
3848 uint32_t Rd; // the destination register in EmulateShiftReg() local
3856 Rd = Bits32(opcode, 2, 0); in EmulateShiftReg()
3857 Rn = Rd; in EmulateShiftReg()
3862 Rd = Bits32(opcode, 11, 8); in EmulateShiftReg()
3866 if (BadReg(Rd) || BadReg(Rn) || BadReg(Rm)) in EmulateShiftReg()
3870 Rd = Bits32(opcode, 15, 12); in EmulateShiftReg()
3874 if (Rd == 15 || Rn == 15 || Rm == 15) in EmulateShiftReg()
3902 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateShiftReg()
5823 uint32_t Rd, Rn; in EmulateADCImm() local
5829 Rd = Bits32(opcode, 11, 8); in EmulateADCImm()
5833 if (BadReg(Rd) || BadReg(Rn)) in EmulateADCImm()
5837 Rd = Bits32(opcode, 15, 12); in EmulateADCImm()
5842 if (Rd == 15 && setflags) in EmulateADCImm()
5860 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADCImm()
5893 uint32_t Rd, Rn, Rm; in EmulateADCReg() local
5899 Rd = Rn = Bits32(opcode, 2, 0); in EmulateADCReg()
5906 Rd = Bits32(opcode, 11, 8); in EmulateADCReg()
5911 if (BadReg(Rd) || BadReg(Rn) || BadReg(Rm)) in EmulateADCReg()
5915 Rd = Bits32(opcode, 15, 12); in EmulateADCReg()
5921 if (Rd == 15 && setflags) in EmulateADCReg()
5947 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateADCReg()
5972 uint32_t Rd; in EmulateADR() local
5977 Rd = Bits32(opcode, 10, 8); in EmulateADR()
5983 Rd = Bits32(opcode, 11, 8); in EmulateADR()
5986 if (BadReg(Rd)) in EmulateADR()
5991 Rd = Bits32(opcode, 15, 12); in EmulateADR()
6010 if (!WriteCoreReg(context, result, Rd)) in EmulateADR()
6040 uint32_t Rd, Rn; in EmulateANDImm() local
6047 Rd = Bits32(opcode, 11, 8); in EmulateANDImm()
6054 if (Rd == 15 && setflags) in EmulateANDImm()
6056 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn)) in EmulateANDImm()
6060 Rd = Bits32(opcode, 15, 12); in EmulateANDImm()
6067 if (Rd == 15 && setflags) in EmulateANDImm()
6085 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateANDImm()
6116 uint32_t Rd, Rn, Rm; in EmulateANDReg() local
6123 Rd = Rn = Bits32(opcode, 2, 0); in EmulateANDReg()
6130 Rd = Bits32(opcode, 11, 8); in EmulateANDReg()
6136 if (Rd == 15 && setflags) in EmulateANDReg()
6138 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn) || BadReg(Rm)) in EmulateANDReg()
6142 Rd = Bits32(opcode, 15, 12); in EmulateANDReg()
6148 if (Rd == 15 && setflags) in EmulateANDReg()
6174 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateANDReg()
6205 uint32_t Rd, Rn; in EmulateBICImm() local
6212 Rd = Bits32(opcode, 11, 8); in EmulateBICImm()
6218 if (BadReg(Rd) || BadReg(Rn)) in EmulateBICImm()
6222 Rd = Bits32(opcode, 15, 12); in EmulateBICImm()
6231 if (Rd == 15 && setflags) in EmulateBICImm()
6249 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateBICImm()
6281 uint32_t Rd, Rn, Rm; in EmulateBICReg() local
6288 Rd = Rn = Bits32(opcode, 2, 0); in EmulateBICReg()
6295 Rd = Bits32(opcode, 11, 8); in EmulateBICReg()
6300 if (BadReg(Rd) || BadReg(Rn) || BadReg(Rm)) in EmulateBICReg()
6304 Rd = Bits32(opcode, 15, 12); in EmulateBICReg()
6312 if (Rd == 15 && setflags) in EmulateBICReg()
6338 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateBICReg()
8847 uint32_t Rd, Rn; in EmulateEORImm() local
8854 Rd = Bits32(opcode, 11, 8); in EmulateEORImm()
8861 if (Rd == 15 && setflags) in EmulateEORImm()
8863 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn)) in EmulateEORImm()
8867 Rd = Bits32(opcode, 15, 12); in EmulateEORImm()
8876 if (Rd == 15 && setflags) in EmulateEORImm()
8894 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateEORImm()
8926 uint32_t Rd, Rn, Rm; in EmulateEORReg() local
8933 Rd = Rn = Bits32(opcode, 2, 0); in EmulateEORReg()
8940 Rd = Bits32(opcode, 11, 8); in EmulateEORReg()
8946 if (Rd == 15 && setflags) in EmulateEORReg()
8948 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn) || BadReg(Rm)) in EmulateEORReg()
8952 Rd = Bits32(opcode, 15, 12); in EmulateEORReg()
8960 if (Rd == 15 && setflags) in EmulateEORReg()
8986 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateEORReg()
9016 uint32_t Rd, Rn; in EmulateORRImm() local
9023 Rd = Bits32(opcode, 11, 8); in EmulateORRImm()
9032 if (BadReg(Rd) || Rn == 13) in EmulateORRImm()
9036 Rd = Bits32(opcode, 15, 12); in EmulateORRImm()
9043 if (Rd == 15 && setflags) in EmulateORRImm()
9061 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateORRImm()
9093 uint32_t Rd, Rn, Rm; in EmulateORRReg() local
9100 Rd = Rn = Bits32(opcode, 2, 0); in EmulateORRReg()
9107 Rd = Bits32(opcode, 11, 8); in EmulateORRReg()
9115 if (BadReg(Rd) || Rn == 13 || BadReg(Rm)) in EmulateORRReg()
9119 Rd = Bits32(opcode, 15, 12); in EmulateORRReg()
9125 if (Rd == 15 && setflags) in EmulateORRReg()
9151 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry)) in EmulateORRReg()
9180 uint32_t Rd; // the destination register in EmulateRSBImm() local
9187 Rd = Bits32(opcode, 2, 0); in EmulateRSBImm()
9193 Rd = Bits32(opcode, 11, 8); in EmulateRSBImm()
9197 if (BadReg(Rd) || BadReg(Rn)) in EmulateRSBImm()
9201 Rd = Bits32(opcode, 15, 12); in EmulateRSBImm()
9208 if (Rd == 15 && setflags) in EmulateRSBImm()
9225 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSBImm()
9253 uint32_t Rd; // the destination register in EmulateRSBReg() local
9261 Rd = Bits32(opcode, 11, 8); in EmulateRSBReg()
9267 if (BadReg(Rd) || BadReg(Rn) || BadReg(Rm)) in EmulateRSBReg()
9271 Rd = Bits32(opcode, 15, 12); in EmulateRSBReg()
9279 if (Rd == 15 && setflags) in EmulateRSBReg()
9303 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSBReg()
9331 uint32_t Rd; // the destination register in EmulateRSCImm() local
9338 Rd = Bits32(opcode, 15, 12); in EmulateRSCImm()
9345 if (Rd == 15 && setflags) in EmulateRSCImm()
9362 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSCImm()
9391 uint32_t Rd; // the destination register in EmulateRSCReg() local
9399 Rd = Bits32(opcode, 15, 12); in EmulateRSCReg()
9407 if (Rd == 15 && setflags) in EmulateRSCReg()
9431 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateRSCReg()
9460 uint32_t Rd; // the destination register in EmulateSBCImm() local
9467 Rd = Bits32(opcode, 11, 8); in EmulateSBCImm()
9471 if (BadReg(Rd) || BadReg(Rn)) in EmulateSBCImm()
9475 Rd = Bits32(opcode, 15, 12); in EmulateSBCImm()
9482 if (Rd == 15 && setflags) in EmulateSBCImm()
9499 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSBCImm()
9529 uint32_t Rd; // the destination register in EmulateSBCReg() local
9537 Rd = Rn = Bits32(opcode, 2, 0); in EmulateSBCReg()
9544 Rd = Bits32(opcode, 11, 8); in EmulateSBCReg()
9549 if (BadReg(Rd) || BadReg(Rn) || BadReg(Rm)) in EmulateSBCReg()
9553 Rd = Bits32(opcode, 15, 12); in EmulateSBCReg()
9561 if (Rd == 15 && setflags) in EmulateSBCReg()
9585 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSBCReg()
9609 uint32_t Rd; // the destination register in EmulateSUBImmThumb() local
9616 Rd = Bits32(opcode, 2, 0); in EmulateSUBImmThumb()
9622 Rd = Rn = Bits32(opcode, 10, 8); in EmulateSUBImmThumb()
9627 Rd = Bits32(opcode, 11, 8); in EmulateSUBImmThumb()
9633 if (Rd == 15 && setflags) in EmulateSUBImmThumb()
9641 if (Rd == 13 || (Rd == 15 && !setflags) || Rn == 15) in EmulateSUBImmThumb()
9645 Rd = Bits32(opcode, 11, 8); in EmulateSUBImmThumb()
9658 if (BadReg(Rd)) in EmulateSUBImmThumb()
9675 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSUBImmThumb()
9703 uint32_t Rd; // the destination register in EmulateSUBImmARM() local
9710 Rd = Bits32(opcode, 15, 12); in EmulateSUBImmARM()
9725 if (Rd == 15 && setflags) in EmulateSUBImmARM()
9739 if (Rd == 13) in EmulateSUBImmARM()
9749 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags, in EmulateSUBImmARM()
14253 Context &context, const uint32_t result, const uint32_t Rd, bool setflags, in WriteCoreRegOptionalFlags() argument
14255 if (Rd == 15) { in WriteCoreRegOptionalFlags()
14261 switch (Rd) { in WriteCoreRegOptionalFlags()
14272 reg_num = dwarf_r0 + Rd; in WriteCoreRegOptionalFlags()