141     AtomicOrdering Ordering = AtomicOrdering::SequentiallyConsistent) {  in MakeBinaryAtomicValue()
224       Kind, Args[0], Args[1], llvm::AtomicOrdering::SequentiallyConsistent);  in EmitBinaryAtomicPost()
266       Args[0], Args[1], Args[2], llvm::AtomicOrdering::SequentiallyConsistent,  in MakeAtomicCmpXchgValue()
267       llvm::AtomicOrdering::SequentiallyConsistent);  in MakeAtomicCmpXchgValue()
293     AtomicOrdering SuccessOrdering = AtomicOrdering::SequentiallyConsistent) {  in EmitAtomicCmpXchgForMSIntrin()
385     AtomicOrdering Ordering = AtomicOrdering::SequentiallyConsistent) {  in EmitAtomicIncrementValue()
398     AtomicOrdering Ordering = AtomicOrdering::SequentiallyConsistent) {  in EmitAtomicDecrementValue()
908   case BitTest::Sequential: return llvm::AtomicOrdering::SequentiallyConsistent;  in getBitTestAtomicOrdering()
1564         *this, E, AtomicOrdering::SequentiallyConsistent);  in EmitMSVCBuiltinExpr()
3879     Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent);  in EmitBuiltinExpr()
3948             llvm::AtomicOrdering::SequentiallyConsistent);  in EmitBuiltinExpr()
3967         llvm::AtomicOrdering::SequentiallyConsistent};  in EmitBuiltinExpr()
4017         Store->setOrdering(llvm::AtomicOrdering::SequentiallyConsistent);  in EmitBuiltinExpr()
4032         llvm::AtomicOrdering::SequentiallyConsistent};  in EmitBuiltinExpr()
4080         Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, SSID);  in EmitBuiltinExpr()
4113     Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent, SSID);  in EmitBuiltinExpr()
4448       AtomicOrdering::Monotonic : AtomicOrdering::SequentiallyConsistent;  in EmitBuiltinExpr()
9544     return Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent,  in EmitAArch64BuiltinExpr()
10479       llvm::AtomicOrdering::SequentiallyConsistent);  in EmitAArch64BuiltinExpr()
14699     return Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent,  in EmitX86BuiltinExpr()
14717     return Builder.CreateFence(llvm::AtomicOrdering::SequentiallyConsistent,  in EmitX86BuiltinExpr()
16020       AO = llvm::AtomicOrdering::SequentiallyConsistent;  in ProcessOrderScopeAMDGCN()
16037   llvm::AtomicOrdering AO = llvm::AtomicOrdering::SequentiallyConsistent;  in EmitAMDGPUBuiltinExpr()
17135                                    AtomicOrdering::SequentiallyConsistent);  in EmitNVPTXBuiltinExpr()