282 	CSR_WRITE_2(sc, RECV_CONTROL_REG_W, RCR_SOFTRESET);  in sninit_locked()
284 	CSR_WRITE_2(sc, RECV_CONTROL_REG_W, 0x0000);  in sninit_locked()
288 	CSR_WRITE_2(sc, TXMIT_CONTROL_REG_W, 0x0000);  in sninit_locked()
296 	CSR_WRITE_2(sc, CONTROL_REG_W, (CTR_AUTO_RELEASE | CTR_TE_ENABLE |  in sninit_locked()
302 	CSR_WRITE_2(sc, CONFIG_REG_W, flags);  in sninit_locked()
308 	CSR_WRITE_2(sc, MMU_CMD_REG_W, MMUCR_RESET);  in sninit_locked()
331 	CSR_WRITE_2(sc, TXMIT_CONTROL_REG_W, flags);  in sninit_locked()
448 	CSR_WRITE_2(sc, MMU_CMD_REG_W, MMUCR_ALLOC | numPages);  in snstart_locked()
498 	CSR_WRITE_2(sc, POINTER_REG_W, PTR_AUTOINC | 0x0000);  in snstart_locked()
504 	CSR_WRITE_2(sc, DATA_REG_W, 0);  in snstart_locked()
537 		CSR_WRITE_2(sc, DATA_REG_W, 0);  in snstart_locked()
548 	CSR_WRITE_2(sc, DATA_REG_W, 0);  in snstart_locked()
558 	CSR_WRITE_2(sc, MMU_CMD_REG_W, MMUCR_ENQUEUE);  in snstart_locked()
690 		CSR_WRITE_2(sc, MMU_CMD_REG_W, MMUCR_FREEPKT);  in snresume()
697 	CSR_WRITE_2(sc, POINTER_REG_W, PTR_AUTOINC | 0x0000);  in snresume()
703 	CSR_WRITE_2(sc, DATA_REG_W, 0);  in snresume()
735 		CSR_WRITE_2(sc, DATA_REG_W, 0);  in snresume()
746 	CSR_WRITE_2(sc, DATA_REG_W, 0);  in snresume()
755 	CSR_WRITE_2(sc, MMU_CMD_REG_W, MMUCR_ENQUEUE);  in snresume()
892 		CSR_WRITE_2(sc, POINTER_REG_W, PTR_AUTOINC | PTR_READ | 0x0000);  in snintr_locked()
918 		CSR_WRITE_2(sc, TXMIT_CONTROL_REG_W, TCR_ENABLE);  in snintr_locked()
920 		CSR_WRITE_2(sc, TXMIT_CONTROL_REG_W, TCR_ENABLE | TCR_PAD_ENABLE);  in snintr_locked()
929 		CSR_WRITE_2(sc, MMU_CMD_REG_W, MMUCR_FREEPKT);  in snintr_locked()
1032 	CSR_WRITE_2(sc, POINTER_REG_W, PTR_READ | PTR_RCV | PTR_AUTOINC | 0x0000);  in snread()
1120 	CSR_WRITE_2(sc, MMU_CMD_REG_W, MMUCR_RELEASE);  in snread()
1206 	CSR_WRITE_2(sc, RECV_CONTROL_REG_W, 0x0000);  in snstop()
1207 	CSR_WRITE_2(sc, TXMIT_CONTROL_REG_W, 0x0000);  in snstop()
1309 	CSR_WRITE_2(sc, BANK_SELECT_REG_W, 0x0000);  in sn_probe()
1324 	CSR_WRITE_2(sc, BANK_SELECT_REG_W, 0x0001);  in sn_probe()
1346 	CSR_WRITE_2(sc, BANK_SELECT_REG_W, 0x3);  in sn_probe()
1397 			CSR_WRITE_2(sc, MULTICAST1_REG_W,  in sn_setmcast()
1399 			CSR_WRITE_2(sc, MULTICAST2_REG_W,  in sn_setmcast()
1401 			CSR_WRITE_2(sc, MULTICAST3_REG_W,  in sn_setmcast()
1403 			CSR_WRITE_2(sc, MULTICAST4_REG_W,  in sn_setmcast()
1410 	CSR_WRITE_2(sc, RECV_CONTROL_REG_W, flags);  in sn_setmcast()