859 fwohci_start(struct fwohci_softc *sc, struct fwohci_dbch *dbch)  argument
876 	if (&sc->atrq == dbch) {
878 	} else if (&sc->atrs == dbch) {
884 	if (dbch->flags & FWOHCI_DBCH_FULL)
887 	db_tr = dbch->top;
889 	xfer = STAILQ_FIRST(&dbch->xferq.q);
894 	if (dbch->xferq.queued == 0) {
898 	STAILQ_REMOVE_HEAD(&dbch->xferq.q, link);
935 	if (&sc->atrs == dbch) {
953 			err = bus_dmamap_load(dbch->dmat, db_tr->dma_map,
959 			err = bus_dmamap_load_mbuf(dbch->dmat, db_tr->dma_map,
984 		bus_dmamap_sync(dbch->dmat, db_tr->dma_map,
1006 	if (dbch->pdb_tr != NULL) {
1007 		LAST_DB(dbch->pdb_tr, db);
1010 	dbch->xferq.queued++;
1011 	dbch->pdb_tr = db_tr;
1013 	if (db_tr != dbch->bottom) {
1017 		dbch->flags |= FWOHCI_DBCH_FULL;
1021 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREREAD);
1022 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREWRITE);
1024 	if (dbch->xferq.flag & FWXFERQ_RUNNING) {
1030 		OWRITE(sc, OHCI_DMACMD(off), dbch->top->bus_addr | fsegment);
1032 		dbch->xferq.flag |= FWXFERQ_RUNNING;
1035 	dbch->top = db_tr;
1060 fwohci_txd(struct fwohci_softc *sc, struct fwohci_dbch *dbch)  argument
1071 	if (&sc->atrq == dbch) {
1074 	} else if (&sc->atrs == dbch) {
1081 	tr = dbch->bottom;
1083 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_POSTREAD);
1084 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_POSTWRITE);
1085 	while (dbch->xferq.queued > 0) {
1093 		bus_dmamap_sync(dbch->dmat, tr->dma_map,
1095 		bus_dmamap_unload(dbch->dmat, tr->dma_map);
1169 		dbch->xferq.queued--;
1175 		dbch->bottom = tr;
1176 		if (dbch->bottom == dbch->top) {
1178 			if (firewire_debug && dbch->xferq.queued > 0)
1184 	if ((dbch->flags & FWOHCI_DBCH_FULL) && packets > 0) {
1186 		dbch->flags &= ~FWOHCI_DBCH_FULL;
1188 		fwohci_start(sc, dbch);
1195 fwohci_db_free(struct fwohci_dbch *dbch)  argument
1200 	if ((dbch->flags & FWOHCI_DBCH_INIT) == 0)
1203 	for (db_tr = STAILQ_FIRST(&dbch->db_trq), idb = 0; idb < dbch->ndb;
1205 		if ((dbch->xferq.flag & FWXFERQ_EXTBUF) == 0 &&
1207 			fwdma_free_size(dbch->dmat, db_tr->dma_map,
1208 					db_tr->buf, dbch->xferq.psize);
1211 			bus_dmamap_destroy(dbch->dmat, db_tr->dma_map);
1213 	dbch->ndb = 0;
1214 	db_tr = STAILQ_FIRST(&dbch->db_trq);
1215 	fwdma_free_multiseg(dbch->am);
1217 	STAILQ_INIT(&dbch->db_trq);
1218 	dbch->flags &= ~FWOHCI_DBCH_INIT;
1222 fwohci_db_init(struct fwohci_softc *sc, struct fwohci_dbch *dbch)  argument
1227 	if ((dbch->flags & FWOHCI_DBCH_INIT) != 0)
1237 			/*maxsize*/ dbch->xferq.psize,
1238 			/*nsegments*/ dbch->ndesc > 3 ? dbch->ndesc - 2 : 1,
1243 			&dbch->dmat))
1248 	STAILQ_INIT(&dbch->db_trq);
1250 		malloc(sizeof(struct fwohcidb_tr) * dbch->ndb,
1254 	dbch->am = fwdma_malloc_multiseg(&sc->fc, sizeof(struct fwohcidb),
1255 		DB_SIZE(dbch), dbch->ndb, BUS_DMA_WAITOK);
1256 	if (dbch->am == NULL) {
1262 	for (idb = 0; idb < dbch->ndb; idb++) {
1264 		db_tr->db = (struct fwohcidb *)fwdma_v_addr(dbch->am, idb);
1265 		db_tr->bus_addr = fwdma_bus_addr(dbch->am, idb);
1269 		if (bus_dmamap_create(dbch->dmat, 0, &db_tr->dma_map) != 0) {
1271 			dbch->flags = FWOHCI_DBCH_INIT; /* XXX fake */
1272 			fwohci_db_free(dbch);
1275 		STAILQ_INSERT_TAIL(&dbch->db_trq, db_tr, link);
1276 		if (dbch->xferq.flag & FWXFERQ_EXTBUF) {
1277 			if (idb % dbch->xferq.bnpacket == 0)
1278 				dbch->xferq.bulkxfer[idb / dbch->xferq.bnpacket
1280 			if ((idb + 1) % dbch->xferq.bnpacket == 0)
1281 				dbch->xferq.bulkxfer[idb / dbch->xferq.bnpacket
1286 	STAILQ_LAST(&dbch->db_trq, fwohcidb_tr,link)->link.stqe_next
1287 			= STAILQ_FIRST(&dbch->db_trq);
1289 	dbch->xferq.queued = 0;
1290 	dbch->pdb_tr = NULL;
1291 	dbch->top = STAILQ_FIRST(&dbch->db_trq);
1292 	dbch->bottom = dbch->top;
1293 	dbch->flags = FWOHCI_DBCH_INIT;
1337 fwohci_tx_enable(struct fwohci_softc *sc, struct fwohci_dbch *dbch)  argument
1345 	if (!(dbch->xferq.flag & FWXFERQ_EXTBUF)) {
1349 	z = dbch->ndesc;
1351 		if (&sc->it[dmach] == dbch) {
1360 	if (dbch->xferq.flag & FWXFERQ_RUNNING)
1362 	dbch->xferq.flag |= FWXFERQ_RUNNING;
1363 	for (i = 0, dbch->bottom = dbch->top; i < (dbch->ndb - 1); i++) {
1364 		dbch->bottom = STAILQ_NEXT(dbch->bottom, link);
1366 	db_tr = dbch->top;
1367 	for (idb = 0; idb < dbch->ndb; idb++) {
1368 		fwohci_add_tx_buf(dbch, db_tr, idb);
1377 		if (dbch->xferq.flag & FWXFERQ_EXTBUF) {
1378 			if (((idb + 1) % dbch->xferq.bnpacket) == 0) {
1391 		dbch->bottom->db[dbch->bottom->dbcnt - 1].db.desc.depend, 0xf);
1396 fwohci_rx_enable(struct fwohci_softc *sc, struct fwohci_dbch *dbch)  argument
1404 	z = dbch->ndesc;
1405 	if (&sc->arrq == dbch) {
1407 	} else if (&sc->arrs == dbch) {
1411 			if (&sc->ir[dmach] == dbch) {
1421 	if (dbch->xferq.flag & FWXFERQ_STREAM) {
1422 		if (dbch->xferq.flag & FWXFERQ_RUNNING)
1425 		if (dbch->xferq.flag & FWXFERQ_RUNNING) {
1430 	dbch->xferq.flag |= FWXFERQ_RUNNING;
1431 	dbch->top = STAILQ_FIRST(&dbch->db_trq);
1432 	for (i = 0, dbch->bottom = dbch->top; i < (dbch->ndb - 1); i++) {
1433 		dbch->bottom = STAILQ_NEXT(dbch->bottom, link);
1435 	db_tr = dbch->top;
1436 	for (idb = 0; idb < dbch->ndb; idb++) {
1437 		fwohci_add_rx_buf(dbch, db_tr, idb, &sc->dummy_dma);
1444 		if (dbch->xferq.flag & FWXFERQ_EXTBUF) {
1445 			if (((idb + 1) % dbch->xferq.bnpacket) == 0) {
1457 		dbch->bottom->db[db_tr->dbcnt - 1].db.desc.depend, 0xf);
1458 	dbch->buf_offset = 0;
1459 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREREAD);
1460 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREWRITE);
1461 	if (dbch->xferq.flag & FWXFERQ_STREAM) {
1464 		OWRITE(sc, OHCI_DMACMD(off), dbch->top->bus_addr | z);
1507 	struct fwohci_dbch *dbch;  local
1513 	dbch = &sc->it[dmach];
1514 	it = &dbch->xferq;
1518 	if ((dbch->flags & FWOHCI_DBCH_INIT) == 0) {
1519 		dbch->ndb = it->bnpacket * it->bnchunk;
1520 		dbch->ndesc = 3;
1521 		fwohci_db_init(sc, dbch);
1522 		if ((dbch->flags & FWOHCI_DBCH_INIT) == 0)
1525 		err = fwohci_tx_enable(sc, dbch);
1530 	ldesc = dbch->ndesc - 1;
1549 				(chunk->start))->bus_addr | dbch->ndesc;
1551 			FWOHCI_DMA_SET(db[0].db.desc.depend, dbch->ndesc);
1552 			FWOHCI_DMA_SET(db[ldesc].db.desc.depend, dbch->ndesc);
1560 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREWRITE);
1561 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREREAD);
1580 		((struct fwohcidb_tr *)(first->start))->bus_addr | dbch->ndesc);
1629 	struct fwohci_dbch *dbch;  local
1634 	dbch = &sc->ir[dmach];
1635 	ir = &dbch->xferq;
1643 		dbch->ndb = ir->bnpacket * ir->bnchunk;
1644 		dbch->ndesc = 2;
1645 		fwohci_db_init(sc, dbch);
1646 		if ((dbch->flags & FWOHCI_DBCH_INIT) == 0)
1648 		err = fwohci_rx_enable(sc, dbch);
1659 	ldesc = dbch->ndesc - 1;
1671 			err = bus_dmamap_load_mbuf(dbch->dmat, db_tr->dma_map,
1684 			FWOHCI_DMA_SET(db[ldesc].db.desc.depend, dbch->ndesc);
1692 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREWRITE);
1693 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREREAD);
1712 							| dbch->ndesc);
1928 			struct fwohci_dbch *dbch;  local
1931 				dbch = &sc->ir[i];
1932 				if ((dbch->xferq.flag & FWXFERQ_OPEN) == 0) {
2295 	struct fwohci_dbch *dbch;  local
2303 		dbch = &sc->atrq;
2306 		dbch = &sc->atrs;
2309 		dbch = &sc->arrq;
2312 		dbch = &sc->arrs;
2315 		dbch = &sc->it[ch - ITX_CH];
2318 		dbch = &sc->ir[ch - IRX_CH];
2322 	if (dbch->ndb == 0) {
2326 	pp = dbch->top;
2328 	for (idb = 0; idb < dbch->ndb; idb++) {
2335 		for (jdb = 0; jdb < dbch->ndesc; jdb++) {
2357 		print_db(pp, prev, ch, dbch->ndesc);
2360 		print_db(cp, curr, ch, dbch->ndesc);
2363 		print_db(np, next, ch, dbch->ndesc);
2492 	struct fwohci_dbch *dbch;  local
2501 	dbch = &sc->it[dmach];
2509 	for (idb = 0; idb < dbch->xferq.bnpacket; idb++) {
2531 			= db[dbch->ndesc - 1].db.desc.depend
2532 			= STAILQ_NEXT(db_tr, link)->bus_addr | dbch->ndesc;
2534 		FWOHCI_DMA_SET(db[0].db.desc.depend, dbch->ndesc);
2535 		FWOHCI_DMA_SET(db[dbch->ndesc - 1].db.desc.depend, dbch->ndesc);
2542 	FWOHCI_DMA_CLEAR(db[dbch->ndesc - 1].db.desc.depend, 0xf);
2544 	db[dbch->ndesc - 1].db.desc.control |= OHCI_INTERRUPT_ALWAYS;
2557 fwohci_add_tx_buf(struct fwohci_dbch *dbch, struct fwohcidb_tr *db_tr,  argument
2564 	it = &dbch->xferq;
2589 fwohci_add_rx_buf(struct fwohci_dbch *dbch, struct fwohcidb_tr *db_tr,  argument
2598 	ir = &dbch->xferq;
2599 	if (ir->buf == NULL && (dbch->xferq.flag & FWXFERQ_EXTBUF) == 0) {
2601 			db_tr->buf = fwdma_malloc_size(dbch->dmat,
2609 		bus_dmamap_sync(dbch->dmat, db_tr->dma_map,
2690 fwohci_get_plen(struct fwohci_softc *sc, struct fwohci_dbch *dbch, struct fw_pkt *fp)  argument
2707 	if (r > dbch->xferq.psize) {
2717 fwohci_arcv_free_buf(struct fwohci_softc *sc, struct fwohci_dbch *dbch,  argument
2723 	FWOHCI_DMA_WRITE(db->db.desc.res, dbch->xferq.psize);
2724 	FWOHCI_DMA_SET(dbch->bottom->db[0].db.desc.depend, 1);
2725 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_PREWRITE);
2726 	dbch->bottom = db_tr;
2733 fwohci_arcv(struct fwohci_softc *sc, struct fwohci_dbch *dbch, int count)  argument
2748 	if (&sc->arrq == dbch) {
2750 	} else if (&sc->arrs == dbch) {
2757 	db_tr = dbch->top;
2760 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_POSTREAD);
2761 	fwdma_sync_multiseg_all(dbch->am, BUS_DMASYNC_POSTWRITE);
2771 		len = dbch->xferq.psize - resCount;
2773 		if (dbch->pdb_tr == NULL) {
2774 			len -= dbch->buf_offset;
2775 			ld += dbch->buf_offset;
2778 			bus_dmamap_sync(dbch->dmat, db_tr->dma_map,
2783 			if (dbch->pdb_tr != NULL) {
2787 				offset = dbch->buf_offset;
2790 				buf = dbch->pdb_tr->buf + offset;
2791 				rlen = dbch->xferq.psize - offset;
2794 						rlen, dbch->buf_offset);
2795 				if (dbch->buf_offset < 0) {
2832 					dbch->pdb_tr = db_tr;
2833 					dbch->buf_offset = - dbch->buf_offset;
2845 			plen = fwohci_get_plen(sc, dbch, fp) - offset;
2856 					dbch->pdb_tr = db_tr;
2873 			dbch->buf_offset = ld - (uint8_t *)db_tr->buf;
2916 				    dbch->buf_offset, len,
2925 			if (dbch->pdb_tr != NULL) {
2926 				fwohci_arcv_free_buf(sc, dbch, dbch->pdb_tr,
2928 				dbch->pdb_tr = NULL;
2935 			if (dbch->pdb_tr == NULL) {
2936 				fwohci_arcv_free_buf(sc, dbch, db_tr, off, 1);
2937 				dbch->buf_offset = 0;
2939 				if (dbch->pdb_tr != db_tr)
2947 			dbch->top = db_tr;
2949 			dbch->buf_offset = dbch->xferq.psize - resCount;
2964 	dbch->pdb_tr = NULL;
2969 		fwohci_arcv_free_buf(sc, dbch, db_tr, off, 0);
2975 	dbch->top = db_tr;
2976 	dbch->buf_offset = dbch->xferq.psize - resCount;