Lines Matching refs:CSR_WRITE_2
384 CSR_WRITE_2(sc, RCV_BAR, sc->rx_lower_limit); in ex_init_locked()
386 CSR_WRITE_2(sc, RCV_STOP_REG, sc->rx_upper_limit | 0xfe); in ex_init_locked()
387 CSR_WRITE_2(sc, XMT_BAR, sc->tx_lower_limit); in ex_init_locked()
503 CSR_WRITE_2(sc, HOST_ADDR_REG, dest); in ex_start_locked()
504 CSR_WRITE_2(sc, IO_PORT_REG, Transmit_CMD); in ex_start_locked()
505 CSR_WRITE_2(sc, IO_PORT_REG, 0); in ex_start_locked()
506 CSR_WRITE_2(sc, IO_PORT_REG, next); in ex_start_locked()
507 CSR_WRITE_2(sc, IO_PORT_REG, data_len); in ex_start_locked()
538 CSR_WRITE_2(sc, HOST_ADDR_REG, in ex_start_locked()
540 CSR_WRITE_2(sc, IO_PORT_REG, dest); in ex_start_locked()
542 CSR_WRITE_2(sc, HOST_ADDR_REG, in ex_start_locked()
545 CSR_WRITE_2(sc, HOST_ADDR_REG, in ex_start_locked()
547 CSR_WRITE_2(sc, IO_PORT_REG, i | Ch_bit); in ex_start_locked()
563 CSR_WRITE_2(sc, XMT_BAR, dest); in ex_start_locked()
682 CSR_WRITE_2(sc, HOST_ADDR_REG, sc->tx_head); in ex_tx_intr()
732 CSR_WRITE_2(sc, HOST_ADDR_REG, sc->rx_head); in ex_rx_intr()
803 CSR_WRITE_2(sc, HOST_ADDR_REG, sc->rx_head); in ex_rx_intr()
808 CSR_WRITE_2(sc, RCV_STOP_REG, sc->rx_upper_limit); in ex_rx_intr()
810 CSR_WRITE_2(sc, RCV_STOP_REG, sc->rx_head - 2); in ex_rx_intr()
898 CSR_WRITE_2(sc, HOST_ADDR_REG, sc->tx_lower_limit); in ex_setmulti()
899 CSR_WRITE_2(sc, IO_PORT_REG, MC_Setup_CMD); in ex_setmulti()
900 CSR_WRITE_2(sc, IO_PORT_REG, 0); in ex_setmulti()
901 CSR_WRITE_2(sc, IO_PORT_REG, 0); in ex_setmulti()
902 CSR_WRITE_2(sc, IO_PORT_REG, (count + 1) * 6); in ex_setmulti()
911 CSR_WRITE_2(sc, IO_PORT_REG, *addr++); in ex_setmulti()
912 CSR_WRITE_2(sc, IO_PORT_REG, *addr++); in ex_setmulti()
913 CSR_WRITE_2(sc, IO_PORT_REG, *addr++); in ex_setmulti()
921 CSR_WRITE_2(sc, IO_PORT_REG, *addr++); in ex_setmulti()
922 CSR_WRITE_2(sc, IO_PORT_REG, *addr++); in ex_setmulti()
923 CSR_WRITE_2(sc, IO_PORT_REG, *addr++); in ex_setmulti()
926 CSR_WRITE_2(sc, XMT_BAR, sc->tx_lower_limit); in ex_setmulti()