Lines Matching refs:reduced_clock
4279 intel_clock_t *reduced_clock) in i9xx_update_pll_dividers() argument
4289 if (reduced_clock) in i9xx_update_pll_dividers()
4290 fp2 = (1 << reduced_clock->n) << 16 | in i9xx_update_pll_dividers()
4291 reduced_clock->m1 << 8 | reduced_clock->m2; in i9xx_update_pll_dividers()
4294 if (reduced_clock) in i9xx_update_pll_dividers()
4295 fp2 = reduced_clock->n << 16 | reduced_clock->m1 << 8 | in i9xx_update_pll_dividers()
4296 reduced_clock->m2; in i9xx_update_pll_dividers()
4303 reduced_clock && i915_powersave) { in i9xx_update_pll_dividers()
4359 intel_clock_t *clock, intel_clock_t *reduced_clock, in vlv_update_pll() argument
4459 intel_clock_t *clock, intel_clock_t *reduced_clock, in i9xx_update_pll() argument
4469 i9xx_update_pll_dividers(crtc, clock, reduced_clock); in i9xx_update_pll()
4496 if (IS_G4X(dev) && reduced_clock) in i9xx_update_pll()
4497 dpll |= (1 << (reduced_clock->p1 - 1)) << DPLL_FPA1_P1_POST_DIV_SHIFT; in i9xx_update_pll()
4571 intel_clock_t *clock, intel_clock_t *reduced_clock, in i8xx_update_pll() argument
4580 i9xx_update_pll_dividers(crtc, clock, reduced_clock); in i8xx_update_pll()
4701 intel_clock_t clock, reduced_clock; in i9xx_crtc_mode_set() local
4760 &reduced_clock); in i9xx_crtc_mode_set()
4768 has_reduced_clock ? &reduced_clock : NULL, in i9xx_crtc_mode_set()
4772 has_reduced_clock ? &reduced_clock : NULL, in i9xx_crtc_mode_set()
4776 has_reduced_clock ? &reduced_clock : NULL, in i9xx_crtc_mode_set()
5261 intel_clock_t *reduced_clock) in ironlake_compute_clocks() argument
5311 reduced_clock); in ironlake_compute_clocks()
5598 intel_clock_t clock, reduced_clock; in ironlake_crtc_mode_set() local
5629 &has_reduced_clock, &reduced_clock); in ironlake_crtc_mode_set()
5646 fp2 = reduced_clock.n << 16 | reduced_clock.m1 << 8 | in ironlake_crtc_mode_set()
5647 reduced_clock.m2; in ironlake_crtc_mode_set()
5781 intel_clock_t clock, reduced_clock; in haswell_crtc_mode_set() local
5831 &reduced_clock); in haswell_crtc_mode_set()
5853 fp2 = reduced_clock.n << 16 | reduced_clock.m1 << 8 | in haswell_crtc_mode_set()
5854 reduced_clock.m2; in haswell_crtc_mode_set()