6021 	uint8_t *eld = connector->eld;  in intel_eld_uptodate()  local
6027 	if (!eld[0])  in intel_eld_uptodate()
6037 	for (i = 0; i < eld[2]; i++)  in intel_eld_uptodate()
6038 		if (I915_READ(reg_edid) != *((uint32_t *)eld + i))  in intel_eld_uptodate()
6048 	uint8_t *eld = connector->eld;  in g4x_write_eld()  local
6071 	if (!eld[0])  in g4x_write_eld()
6074 	len = min_t(uint8_t, eld[2], len);  in g4x_write_eld()
6077 		I915_WRITE(G4X_HDMIW_HDMIEDID, *((uint32_t *)eld + i));  in g4x_write_eld()
6088 	uint8_t *eld = connector->eld;  in haswell_write_eld()  local
6134 		eld[5] |= (1 << 2);	/* Conn_Type, 0x1 = DisplayPort */  in haswell_write_eld()
6149 	if (!eld[0])  in haswell_write_eld()
6158 	len = min_t(uint8_t, eld[2], 21);	/* 84 bytes of hw ELD buffer */  in haswell_write_eld()
6161 		I915_WRITE(hdmiw_hdmiedid, *((uint32_t *)eld + i));  in haswell_write_eld()
6173 	uint8_t *eld = connector->eld;  in ironlake_write_eld()  local
6212 		eld[5] |= (1 << 2);	/* Conn_Type, 0x1 = DisplayPort */  in ironlake_write_eld()
6227 	if (!eld[0])  in ironlake_write_eld()
6234 	len = min_t(uint8_t, eld[2], 21);	/* 84 bytes of hw ELD buffer */  in ironlake_write_eld()
6237 		I915_WRITE(hdmiw_hdmiedid, *((uint32_t *)eld + i));  in ironlake_write_eld()
6262 	connector->eld[6] = drm_av_sync_delay(connector, mode) / 2;  in intel_write_eld()