936 	return intel_crtc->cpu_transcoder;  in intel_pipe_to_cpu_transcoder()
1011 	enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv,  in intel_wait_for_pipe_off()  local
1015 		int reg = PIPECONF(cpu_transcoder);  in intel_wait_for_pipe_off()
1117 	enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv,  in assert_fdi_tx()  local
1122 		reg = TRANS_DDI_FUNC_CTL(cpu_transcoder);  in assert_fdi_tx()
1219 	enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv,  in assert_pipe()  local
1226 	reg = PIPECONF(cpu_transcoder);  in assert_pipe()
1713 				      enum transcoder cpu_transcoder)  in lpt_enable_pch_transcoder()  argument
1721 	assert_fdi_tx_enabled(dev_priv, (enum pipe)cpu_transcoder);  in lpt_enable_pch_transcoder()
1730 	pipeconf_val = I915_READ(PIPECONF(cpu_transcoder));  in lpt_enable_pch_transcoder()
1807 	enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv,  in intel_enable_pipe()  local
1829 			assert_fdi_tx_pll_enabled(dev_priv, (enum pipe)cpu_transcoder);  in intel_enable_pipe()
1834 	reg = PIPECONF(cpu_transcoder);  in intel_enable_pipe()
1858 	enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv,  in intel_disable_pipe()  local
1873 	reg = PIPECONF(cpu_transcoder);  in intel_disable_pipe()
3200 	enum transcoder cpu_transcoder = intel_crtc->cpu_transcoder;  in lpt_pch_enable()  local
3207 	I915_WRITE(_TRANS_HTOTAL_A, I915_READ(HTOTAL(cpu_transcoder)));  in lpt_pch_enable()
3208 	I915_WRITE(_TRANS_HBLANK_A, I915_READ(HBLANK(cpu_transcoder)));  in lpt_pch_enable()
3209 	I915_WRITE(_TRANS_HSYNC_A,  I915_READ(HSYNC(cpu_transcoder)));  in lpt_pch_enable()
3211 	I915_WRITE(_TRANS_VTOTAL_A, I915_READ(VTOTAL(cpu_transcoder)));  in lpt_pch_enable()
3212 	I915_WRITE(_TRANS_VBLANK_A, I915_READ(VBLANK(cpu_transcoder)));  in lpt_pch_enable()
3213 	I915_WRITE(_TRANS_VSYNC_A,  I915_READ(VSYNC(cpu_transcoder)));  in lpt_pch_enable()
3214 	I915_WRITE(_TRANS_VSYNCSHIFT_A, I915_READ(VSYNCSHIFT(cpu_transcoder)));  in lpt_pch_enable()
3216 	lpt_enable_pch_transcoder(dev_priv, cpu_transcoder);  in lpt_pch_enable()
3578 	enum transcoder cpu_transcoder = intel_crtc->cpu_transcoder;  in haswell_crtc_disable()  local
3600 	intel_ddi_disable_transcoder_func(dev_priv, cpu_transcoder);  in haswell_crtc_disable()
3637 	intel_crtc->cpu_transcoder = (enum transcoder)intel_crtc->pipe;  in haswell_crtc_off()
4638 	enum transcoder cpu_transcoder = intel_crtc->cpu_transcoder;  in intel_set_pipe_timings()  local
4652 		I915_WRITE(VSYNCSHIFT(cpu_transcoder), vsyncshift);  in intel_set_pipe_timings()
4654 	I915_WRITE(HTOTAL(cpu_transcoder),  in intel_set_pipe_timings()
4657 	I915_WRITE(HBLANK(cpu_transcoder),  in intel_set_pipe_timings()
4660 	I915_WRITE(HSYNC(cpu_transcoder),  in intel_set_pipe_timings()
4664 	I915_WRITE(VTOTAL(cpu_transcoder),  in intel_set_pipe_timings()
4667 	I915_WRITE(VBLANK(cpu_transcoder),  in intel_set_pipe_timings()
4670 	I915_WRITE(VSYNC(cpu_transcoder),  in intel_set_pipe_timings()
4678 	if (IS_HASWELL(dev) && cpu_transcoder == TRANSCODER_EDP &&  in intel_set_pipe_timings()
4680 		I915_WRITE(VTOTAL(pipe), I915_READ(VTOTAL(cpu_transcoder)));  in intel_set_pipe_timings()
5238 	enum transcoder cpu_transcoder = intel_crtc->cpu_transcoder;  in haswell_set_pipeconf()  local
5241 	val = I915_READ(PIPECONF(cpu_transcoder));  in haswell_set_pipeconf()
5253 	I915_WRITE(PIPECONF(cpu_transcoder), val);  in haswell_set_pipeconf()
5254 	POSTING_READ(PIPECONF(cpu_transcoder));  in haswell_set_pipeconf()
5420 	enum transcoder cpu_transcoder = intel_crtc->cpu_transcoder;  in ironlake_set_m_n()  local
5477 	I915_WRITE(PIPE_DATA_M1(cpu_transcoder), TU_SIZE(m_n.tu) | m_n.gmch_m);  in ironlake_set_m_n()
5478 	I915_WRITE(PIPE_DATA_N1(cpu_transcoder), m_n.gmch_n);  in ironlake_set_m_n()
5479 	I915_WRITE(PIPE_LINK_M1(cpu_transcoder), m_n.link_m);  in ironlake_set_m_n()
5480 	I915_WRITE(PIPE_LINK_N1(cpu_transcoder), m_n.link_n);  in ironlake_set_m_n()
5809 		intel_crtc->cpu_transcoder = TRANSCODER_EDP;  in haswell_crtc_mode_set()
5811 		intel_crtc->cpu_transcoder = pipe;  in haswell_crtc_mode_set()
5820 	WARN_ON(I915_READ(PIPECONF(intel_crtc->cpu_transcoder)) &  in haswell_crtc_mode_set()
6920 	enum transcoder cpu_transcoder = intel_crtc->cpu_transcoder;  in intel_crtc_mode_get()  local
6922 	int htot = I915_READ(HTOTAL(cpu_transcoder));  in intel_crtc_mode_get()
6923 	int hsync = I915_READ(HSYNC(cpu_transcoder));  in intel_crtc_mode_get()
6924 	int vtot = I915_READ(VTOTAL(cpu_transcoder));  in intel_crtc_mode_get()
6925 	int vsync = I915_READ(VSYNC(cpu_transcoder));  in intel_crtc_mode_get()
8368 	intel_crtc->cpu_transcoder = pipe;  in intel_crtc_init()
9111 	reg = PIPECONF(crtc->cpu_transcoder);  in intel_sanitize_crtc()
9275 			crtc->cpu_transcoder = TRANSCODER_EDP;  in intel_modeset_setup_hw_state()
9285 		tmp = I915_READ(PIPECONF(crtc->cpu_transcoder));  in intel_modeset_setup_hw_state()
9494 	enum transcoder cpu_transcoder;  in intel_display_capture_error_state()  local
9502 		cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv, i);  in intel_display_capture_error_state()
9518 		error->pipe[i].conf = I915_READ(PIPECONF(cpu_transcoder));  in intel_display_capture_error_state()
9520 		error->pipe[i].htotal = I915_READ(HTOTAL(cpu_transcoder));  in intel_display_capture_error_state()
9521 		error->pipe[i].hblank = I915_READ(HBLANK(cpu_transcoder));  in intel_display_capture_error_state()
9522 		error->pipe[i].hsync = I915_READ(HSYNC(cpu_transcoder));  in intel_display_capture_error_state()
9523 		error->pipe[i].vtotal = I915_READ(VTOTAL(cpu_transcoder));  in intel_display_capture_error_state()
9524 		error->pipe[i].vblank = I915_READ(VBLANK(cpu_transcoder));  in intel_display_capture_error_state()
9525 		error->pipe[i].vsync = I915_READ(VSYNC(cpu_transcoder));  in intel_display_capture_error_state()