Lines Matching refs:addr_len
2952 uint32_t em, addr_len; in validate_mem_range() local
2966 addr_len = t4_read_reg(sc, A_MA_EDRAM0_BAR); in validate_mem_range()
2967 r->size = G_EDRAM0_SIZE(addr_len) << 20; in validate_mem_range()
2969 r->start = G_EDRAM0_BASE(addr_len) << 20; in validate_mem_range()
2978 addr_len = t4_read_reg(sc, A_MA_EDRAM1_BAR); in validate_mem_range()
2979 r->size = G_EDRAM1_SIZE(addr_len) << 20; in validate_mem_range()
2981 r->start = G_EDRAM1_BASE(addr_len) << 20; in validate_mem_range()
2990 addr_len = t4_read_reg(sc, A_MA_EXT_MEMORY_BAR); in validate_mem_range()
2991 r->size = G_EXT_MEM_SIZE(addr_len) << 20; in validate_mem_range()
2993 r->start = G_EXT_MEM_BASE(addr_len) << 20; in validate_mem_range()
3002 addr_len = t4_read_reg(sc, A_MA_EXT_MEMORY1_BAR); in validate_mem_range()
3003 r->size = G_EXT_MEM1_SIZE(addr_len) << 20; in validate_mem_range()
3005 r->start = G_EXT_MEM1_BASE(addr_len) << 20; in validate_mem_range()
3098 uint32_t em, addr_len, maddr; in validate_mt_off_len() local
3109 addr_len = t4_read_reg(sc, A_MA_EDRAM0_BAR); in validate_mt_off_len()
3110 maddr = G_EDRAM0_BASE(addr_len) << 20; in validate_mt_off_len()
3115 addr_len = t4_read_reg(sc, A_MA_EDRAM1_BAR); in validate_mt_off_len()
3116 maddr = G_EDRAM1_BASE(addr_len) << 20; in validate_mt_off_len()
3121 addr_len = t4_read_reg(sc, A_MA_EXT_MEMORY_BAR); in validate_mt_off_len()
3122 maddr = G_EXT_MEM_BASE(addr_len) << 20; in validate_mt_off_len()
3127 addr_len = t4_read_reg(sc, A_MA_EXT_MEMORY1_BAR); in validate_mt_off_len()
3128 maddr = G_EXT_MEM1_BASE(addr_len) << 20; in validate_mt_off_len()