Lines Matching refs:outb
82 outb (port, cmd); in cx_cmd()
129 outb (BCR2(port), cr2); in cx_download()
131 outb (BCR0(port), BCR0800_TCK); in cx_download()
132 outb (BCR0(port), 0); in cx_download()
207 outb (BCR0(port), 0); in cx_probe_800_chained_board()
208 outb (BCR1(port), 0); in cx_probe_800_chained_board()
209 outb (BCR2(port), 0); in cx_probe_800_chained_board()
280 outb (BCR0(port), BCR0_NORESET); in cx_probe_board()
282 outb (BCR0(port + 0x10), BCR0_NORESET); in cx_probe_board()
296 outb (BCR0(port), 0); in cx_probe_board()
298 outb (BCR0(port + 0x10), 0); in cx_probe_board()
352 outb (0x20, 0x0a); in cx_probe_irq()
354 outb (0xa0, 0x0a); in cx_probe_irq()
358 outb (BCR0(b->port), BCR0_NORESET | irqmask[irq]); in cx_probe_irq()
359 outb (CAR(port), 0); in cx_probe_irq()
361 outb (CMR(port), CMR_HDLC); in cx_probe_irq()
362 outb (TCOR(port), 0); in cx_probe_irq()
363 outb (TBPR(port), 1); in cx_probe_irq()
365 outb (IER(port), IER_TXMPTY); in cx_probe_irq()
369 outb (0xa0, 0x60 | ((-irq) & 7)); in cx_probe_irq()
370 outb (0x20, 0x62); in cx_probe_irq()
372 outb (0x20, 0x60 | (-irq)); in cx_probe_irq()
374 outb (BCR0(b->port), 0); in cx_probe_irq()
413 outb (BCR0(port), BCR0_NORESET); in cx_init()
415 outb (BCR0(port+0x10), BCR0_NORESET); in cx_init()
424 outb (BCR0(port+0x10), 0); in cx_init()
426 outb (BCR0(port), 0); in cx_init()
915 outb (DMA_MASK, (b->dma & 3) | DMA_MASK_CLEAR); in cx_setup_board()
918 outb (BCR0(b->port), 0); in cx_setup_board()
920 outb (BCR0(b->port+0x10), 0); in cx_setup_board()
925 outb (BCR2(b->port), BCR2_TMS); in cx_setup_board()
927 outb (BCR2(b->port+0x10), BCR2_TMS); in cx_setup_board()
928 outb (BCR2(b->port), 0); in cx_setup_board()
930 outb (BCR2(b->port+0x10), 0); in cx_setup_board()
943 outb (BCR0(b->port), b->bcr0); in cx_setup_board()
945 outb (BCR0(b->port+0x10), b->bcr0b); in cx_setup_board()
953 outb (BCR2(b->port), b->opt.fast & in cx_setup_board()
962 outb (DMA_MODE, (b->dma & 3) | DMA_MODE_MASTER); in cx_setup_board()
965 outb (DMA_MASK, b->dma & 3); in cx_setup_board()
986 outb (RPILR(c->port), BRD_INTR_LEVEL); in cx_setup_chip()
987 outb (TPILR(c->port), BRD_INTR_LEVEL); in cx_setup_chip()
988 outb (MPILR(c->port), BRD_INTR_LEVEL); in cx_setup_chip()
991 outb (BERCNT(c->port), 0); in cx_setup_chip()
994 outb (DMR(c->port), 0); in cx_setup_chip()
997 outb (TPR(c->port), 10); in cx_setup_chip()
1016 outb (BCR0(c->board->port), c->board->bcr0); in cx_update_chan()
1025 outb (BCR0(c->board->port+0x10), c->board->bcr0b); in cx_update_chan()
1030 outb (CAR(c->port), c->num & 3); in cx_update_chan()
1038 outb (CMR(c->port), CMR_RXDMA | CMR_TXDMA | CMR_ASYNC); in cx_update_chan()
1039 outb (COR1(c->port), BYTE c->aopt.cor1); in cx_update_chan()
1040 outb (COR2(c->port), BYTE c->aopt.cor2); in cx_update_chan()
1041 outb (COR3(c->port), BYTE c->aopt.cor3); in cx_update_chan()
1042 outb (COR6(c->port), BYTE c->aopt.cor6); in cx_update_chan()
1043 outb (COR7(c->port), BYTE c->aopt.cor7); in cx_update_chan()
1044 outb (SCHR1(c->port), c->aopt.schr1); in cx_update_chan()
1045 outb (SCHR2(c->port), c->aopt.schr2); in cx_update_chan()
1046 outb (SCHR3(c->port), c->aopt.schr3); in cx_update_chan()
1047 outb (SCHR4(c->port), c->aopt.schr4); in cx_update_chan()
1048 outb (SCRL(c->port), c->aopt.scrl); in cx_update_chan()
1049 outb (SCRH(c->port), c->aopt.scrh); in cx_update_chan()
1050 outb (LNXT(c->port), c->aopt.lnxt); in cx_update_chan()
1053 outb (CMR(c->port), CMR_RXDMA | CMR_TXDMA | CMR_HDLC); in cx_update_chan()
1054 outb (COR1(c->port), BYTE c->hopt.cor1); in cx_update_chan()
1055 outb (COR2(c->port), BYTE c->hopt.cor2); in cx_update_chan()
1056 outb (COR3(c->port), BYTE c->hopt.cor3); in cx_update_chan()
1057 outb (RFAR1(c->port), c->hopt.rfar1); in cx_update_chan()
1058 outb (RFAR2(c->port), c->hopt.rfar2); in cx_update_chan()
1059 outb (RFAR3(c->port), c->hopt.rfar3); in cx_update_chan()
1060 outb (RFAR4(c->port), c->hopt.rfar4); in cx_update_chan()
1061 outb (CPSR(c->port), c->hopt.cpsr); in cx_update_chan()
1066 outb (COR4(c->port), BYTE c->opt.cor4); in cx_update_chan()
1067 outb (COR5(c->port), BYTE c->opt.cor5); in cx_update_chan()
1077 outb (RCOR(c->port), BYTE c->opt.rcor); in cx_update_chan()
1078 outb (RBPR(c->port), period); in cx_update_chan()
1091 outb (TCOR(c->port), BYTE c->opt.tcor); in cx_update_chan()
1092 outb (TBPR(c->port), period); in cx_update_chan()
1101 outb (CAR(c->port), c->num & 3); in cx_setup_chan()
1107 outb (LIVR(c->port), c->board->num << 6 | c->num << 2); in cx_setup_chan()
1110 outb (MSVR_RTS(c->port), 0); in cx_setup_chan()
1111 outb (MSVR_DTR(c->port), c->mode==M_ASYNC ? 0 : MSV_TXCOUT); in cx_setup_chan()
1155 outb (BCR1(b->port+0x10), b->bcr1b); in cx_set_dtr()
1159 outb (BCR1(b->port), b->bcr1); in cx_set_dtr()
1164 outb (CAR(c->port), c->num & 3); in cx_set_dtr()
1165 outb (MSVR_DTR(c->port), on ? MSV_DTR : 0); in cx_set_dtr()
1202 outb (CAR(c->port), c->num & 3); in cx_set_rts()
1203 outb (MSVR_RTS(c->port), on ? MSV_RTS : 0); in cx_set_rts()
1216 outb (CAR(c->port), c->num & 3); in cx_get_dsr()
1254 outb (CAR(c->port), c->num & 3); in cx_get_cd()
1287 outb (CAR(c->port), c->num & 3); in cx_get_cts()
1319 outb (BCR0(b->port), b->bcr0); in cx_led()
1328 outb (DMA_MASK, (b->dma & 3) | DMA_MASK_CLEAR); in cx_disable_dma()