Lines Matching refs:uint16_t
326 uint16_t link_speed;
327 uint16_t support_speeds;
328 uint16_t auto_link_speeds;
329 uint16_t auto_link_speed;
330 uint16_t force_link_speed;
338 uint16_t req_link_speed;
356 uint16_t max_rsscos_ctxs;
357 uint16_t max_cp_rings;
358 uint16_t max_tx_rings;
359 uint16_t max_rx_rings;
360 uint16_t max_hw_ring_grps;
361 uint16_t max_irqs;
362 uint16_t max_l2_ctxs;
363 uint16_t max_vnics;
364 uint16_t max_stat_ctxs;
372 uint16_t active_vfs;
373 uint16_t max_vfs;
381 uint16_t hwrm_cmd_req_pages;
387 uint16_t fw_fid;
389 uint16_t max_rsscos_ctxs;
390 uint16_t max_cp_rings;
391 uint16_t max_tx_rings;
392 uint16_t max_rx_rings;
393 uint16_t max_hw_ring_grps;
394 uint16_t max_l2_ctxs;
395 uint16_t max_irqs;
396 uint16_t max_vnics;
397 uint16_t max_stat_ctxs;
417 uint16_t tpid;
418 uint16_t tag;
422 uint16_t id;
423 uint16_t def_ring_grp;
424 uint16_t cos_rule;
425 uint16_t lb_rule;
426 uint16_t mru;
442 uint16_t rss_id;
452 uint16_t stats_ctx;
453 uint16_t grp_id;
454 uint16_t rx_ring_id;
455 uint16_t cp_ring_id;
456 uint16_t ag_ring_id;
465 uint16_t id; /* Logical ID */
466 uint16_t phys_id;
510 uint16_t chip_num;
525 uint16_t mfg_id;
526 uint16_t device_id;
537 uint16_t alloc_completion_rings;
538 uint16_t alloc_tx_rings;
539 uint16_t alloc_rx_rings;
540 uint16_t alloc_vnics;
544 uint16_t enable;
545 uint16_t is_mode_gro;
546 uint16_t max_agg_segs;
547 uint16_t max_aggs;
573 uint16_t hwrm_cmd_seq;
580 uint16_t hwrm_max_req_len;
623 uint16_t rx_coal_usecs;
624 uint16_t rx_coal_usecs_irq;
625 uint16_t rx_coal_frames;
626 uint16_t rx_coal_frames_irq;
627 uint16_t tx_coal_usecs;
628 uint16_t tx_coal_usecs_irq;
629 uint16_t tx_coal_frames;
630 uint16_t tx_coal_frames_irq;
642 #define INVALID_MAC_INDEX ((uint16_t)-1)
643 uint16_t mac_index;
650 uint16_t l2_ovlan;
651 uint16_t l2_ovlan_mask;
652 uint16_t l2_ivlan;
653 uint16_t l2_ivlan_mask;
656 uint16_t t_l2_ovlan;
657 uint16_t t_l2_ovlan_mask;
658 uint16_t t_l2_ivlan;
659 uint16_t t_l2_ivlan_mask;
661 uint16_t mirror_vnic_id;