Lines Matching refs:pdata
129 static unsigned int xgbe_usec_to_riwt(struct xgbe_prv_data *pdata, in xgbe_usec_to_riwt() argument
137 rate = pdata->sysclk_rate; in xgbe_usec_to_riwt()
152 static unsigned int xgbe_riwt_to_usec(struct xgbe_prv_data *pdata, in xgbe_riwt_to_usec() argument
160 rate = pdata->sysclk_rate; in xgbe_riwt_to_usec()
175 static int xgbe_config_pblx8(struct xgbe_prv_data *pdata) in xgbe_config_pblx8() argument
180 channel = pdata->channel; in xgbe_config_pblx8()
181 for (i = 0; i < pdata->channel_count; i++, channel++) in xgbe_config_pblx8()
183 pdata->pblx8); in xgbe_config_pblx8()
188 static int xgbe_get_tx_pbl_val(struct xgbe_prv_data *pdata) in xgbe_get_tx_pbl_val() argument
190 return XGMAC_DMA_IOREAD_BITS(pdata->channel, DMA_CH_TCR, PBL); in xgbe_get_tx_pbl_val()
193 static int xgbe_config_tx_pbl_val(struct xgbe_prv_data *pdata) in xgbe_config_tx_pbl_val() argument
198 channel = pdata->channel; in xgbe_config_tx_pbl_val()
199 for (i = 0; i < pdata->channel_count; i++, channel++) { in xgbe_config_tx_pbl_val()
204 pdata->tx_pbl); in xgbe_config_tx_pbl_val()
210 static int xgbe_get_rx_pbl_val(struct xgbe_prv_data *pdata) in xgbe_get_rx_pbl_val() argument
212 return XGMAC_DMA_IOREAD_BITS(pdata->channel, DMA_CH_RCR, PBL); in xgbe_get_rx_pbl_val()
215 static int xgbe_config_rx_pbl_val(struct xgbe_prv_data *pdata) in xgbe_config_rx_pbl_val() argument
220 channel = pdata->channel; in xgbe_config_rx_pbl_val()
221 for (i = 0; i < pdata->channel_count; i++, channel++) { in xgbe_config_rx_pbl_val()
226 pdata->rx_pbl); in xgbe_config_rx_pbl_val()
232 static int xgbe_config_osp_mode(struct xgbe_prv_data *pdata) in xgbe_config_osp_mode() argument
237 channel = pdata->channel; in xgbe_config_osp_mode()
238 for (i = 0; i < pdata->channel_count; i++, channel++) { in xgbe_config_osp_mode()
243 pdata->tx_osp_mode); in xgbe_config_osp_mode()
249 static int xgbe_config_rsf_mode(struct xgbe_prv_data *pdata, unsigned int val) in xgbe_config_rsf_mode() argument
253 for (i = 0; i < pdata->rx_q_count; i++) in xgbe_config_rsf_mode()
254 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, RSF, val); in xgbe_config_rsf_mode()
259 static int xgbe_config_tsf_mode(struct xgbe_prv_data *pdata, unsigned int val) in xgbe_config_tsf_mode() argument
263 for (i = 0; i < pdata->tx_q_count; i++) in xgbe_config_tsf_mode()
264 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TSF, val); in xgbe_config_tsf_mode()
269 static int xgbe_config_rx_threshold(struct xgbe_prv_data *pdata, in xgbe_config_rx_threshold() argument
274 for (i = 0; i < pdata->rx_q_count; i++) in xgbe_config_rx_threshold()
275 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, RTC, val); in xgbe_config_rx_threshold()
280 static int xgbe_config_tx_threshold(struct xgbe_prv_data *pdata, in xgbe_config_tx_threshold() argument
285 for (i = 0; i < pdata->tx_q_count; i++) in xgbe_config_tx_threshold()
286 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TTC, val); in xgbe_config_tx_threshold()
291 static int xgbe_config_rx_coalesce(struct xgbe_prv_data *pdata) in xgbe_config_rx_coalesce() argument
296 channel = pdata->channel; in xgbe_config_rx_coalesce()
297 for (i = 0; i < pdata->channel_count; i++, channel++) { in xgbe_config_rx_coalesce()
302 pdata->rx_riwt); in xgbe_config_rx_coalesce()
308 static int xgbe_config_tx_coalesce(struct xgbe_prv_data *pdata) in xgbe_config_tx_coalesce() argument
313 static void xgbe_config_rx_buffer_size(struct xgbe_prv_data *pdata) in xgbe_config_rx_buffer_size() argument
318 channel = pdata->channel; in xgbe_config_rx_buffer_size()
319 for (i = 0; i < pdata->channel_count; i++, channel++) { in xgbe_config_rx_buffer_size()
324 pdata->rx_buf_size); in xgbe_config_rx_buffer_size()
328 static void xgbe_config_tso_mode(struct xgbe_prv_data *pdata) in xgbe_config_tso_mode() argument
333 channel = pdata->channel; in xgbe_config_tso_mode()
334 for (i = 0; i < pdata->channel_count; i++, channel++) { in xgbe_config_tso_mode()
342 static void xgbe_config_sph_mode(struct xgbe_prv_data *pdata) in xgbe_config_sph_mode() argument
347 channel = pdata->channel; in xgbe_config_sph_mode()
348 for (i = 0; i < pdata->channel_count; i++, channel++) { in xgbe_config_sph_mode()
355 XGMAC_IOWRITE_BITS(pdata, MAC_RCR, HDSMS, XGBE_SPH_HDSMS_SIZE); in xgbe_config_sph_mode()
358 static int xgbe_disable_rss(struct xgbe_prv_data *pdata) in xgbe_disable_rss() argument
360 if (!pdata->hw_feat.rss) in xgbe_disable_rss()
363 XGMAC_IOWRITE_BITS(pdata, MAC_RSSCR, RSSE, 0); in xgbe_disable_rss()
368 static void xgbe_config_rss(struct xgbe_prv_data *pdata) in xgbe_config_rss() argument
371 if (!pdata->hw_feat.rss) in xgbe_config_rss()
374 xgbe_disable_rss(pdata); in xgbe_config_rss()
377 static int xgbe_disable_tx_flow_control(struct xgbe_prv_data *pdata) in xgbe_disable_tx_flow_control() argument
384 for (i = 0; i < pdata->rx_q_count; i++) in xgbe_disable_tx_flow_control()
385 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, EHFC, 0); in xgbe_disable_tx_flow_control()
389 q_count = min_t(unsigned int, pdata->tx_q_count, max_q_count); in xgbe_disable_tx_flow_control()
392 reg_val = XGMAC_IOREAD(pdata, reg); in xgbe_disable_tx_flow_control()
394 XGMAC_IOWRITE(pdata, reg, reg_val); in xgbe_disable_tx_flow_control()
402 static int xgbe_enable_tx_flow_control(struct xgbe_prv_data *pdata) in xgbe_enable_tx_flow_control() argument
409 for (i = 0; i < pdata->rx_q_count; i++) { in xgbe_enable_tx_flow_control()
410 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, EHFC, 1); in xgbe_enable_tx_flow_control()
415 q_count = min_t(unsigned int, pdata->tx_q_count, max_q_count); in xgbe_enable_tx_flow_control()
418 reg_val = XGMAC_IOREAD(pdata, reg); in xgbe_enable_tx_flow_control()
425 XGMAC_IOWRITE(pdata, reg, reg_val); in xgbe_enable_tx_flow_control()
433 static int xgbe_disable_rx_flow_control(struct xgbe_prv_data *pdata) in xgbe_disable_rx_flow_control() argument
435 XGMAC_IOWRITE_BITS(pdata, MAC_RFCR, RFE, 0); in xgbe_disable_rx_flow_control()
440 static int xgbe_enable_rx_flow_control(struct xgbe_prv_data *pdata) in xgbe_enable_rx_flow_control() argument
442 XGMAC_IOWRITE_BITS(pdata, MAC_RFCR, RFE, 1); in xgbe_enable_rx_flow_control()
447 static int xgbe_config_tx_flow_control(struct xgbe_prv_data *pdata) in xgbe_config_tx_flow_control() argument
450 if (pdata->tx_pause) in xgbe_config_tx_flow_control()
451 xgbe_enable_tx_flow_control(pdata); in xgbe_config_tx_flow_control()
453 xgbe_disable_tx_flow_control(pdata); in xgbe_config_tx_flow_control()
458 static int xgbe_config_rx_flow_control(struct xgbe_prv_data *pdata) in xgbe_config_rx_flow_control() argument
461 if (pdata->rx_pause) in xgbe_config_rx_flow_control()
462 xgbe_enable_rx_flow_control(pdata); in xgbe_config_rx_flow_control()
464 xgbe_disable_rx_flow_control(pdata); in xgbe_config_rx_flow_control()
469 static void xgbe_config_flow_control(struct xgbe_prv_data *pdata) in xgbe_config_flow_control() argument
472 xgbe_config_tx_flow_control(pdata); in xgbe_config_flow_control()
473 xgbe_config_rx_flow_control(pdata); in xgbe_config_flow_control()
475 XGMAC_IOWRITE_BITS(pdata, MAC_RFCR, PFCE, 0); in xgbe_config_flow_control()
478 static void xgbe_enable_dma_interrupts(struct xgbe_prv_data *pdata) in xgbe_enable_dma_interrupts() argument
484 channel = pdata->channel; in xgbe_enable_dma_interrupts()
485 for (i = 0; i < pdata->channel_count; i++, channel++) { in xgbe_enable_dma_interrupts()
507 if (!pdata->per_channel_irq) in xgbe_enable_dma_interrupts()
517 if (!pdata->per_channel_irq) in xgbe_enable_dma_interrupts()
525 static void xgbe_enable_mtl_interrupts(struct xgbe_prv_data *pdata) in xgbe_enable_mtl_interrupts() argument
530 q_count = max(pdata->hw_feat.tx_q_cnt, pdata->hw_feat.rx_q_cnt); in xgbe_enable_mtl_interrupts()
533 mtl_q_isr = XGMAC_MTL_IOREAD(pdata, i, MTL_Q_ISR); in xgbe_enable_mtl_interrupts()
534 XGMAC_MTL_IOWRITE(pdata, i, MTL_Q_ISR, mtl_q_isr); in xgbe_enable_mtl_interrupts()
537 XGMAC_MTL_IOWRITE(pdata, i, MTL_Q_IER, 0); in xgbe_enable_mtl_interrupts()
541 static void xgbe_enable_mac_interrupts(struct xgbe_prv_data *pdata) in xgbe_enable_mac_interrupts() argument
548 XGMAC_IOWRITE(pdata, MAC_IER, mac_ier); in xgbe_enable_mac_interrupts()
551 XGMAC_IOWRITE_BITS(pdata, MMC_RIER, ALL_INTERRUPTS, 0xffffffff); in xgbe_enable_mac_interrupts()
552 XGMAC_IOWRITE_BITS(pdata, MMC_TIER, ALL_INTERRUPTS, 0xffffffff); in xgbe_enable_mac_interrupts()
555 static int xgbe_set_gmii_speed(struct xgbe_prv_data *pdata) in xgbe_set_gmii_speed() argument
557 if (XGMAC_IOREAD_BITS(pdata, MAC_TCR, SS) == 0x3) in xgbe_set_gmii_speed()
560 XGMAC_IOWRITE_BITS(pdata, MAC_TCR, SS, 0x3); in xgbe_set_gmii_speed()
565 static int xgbe_set_gmii_2500_speed(struct xgbe_prv_data *pdata) in xgbe_set_gmii_2500_speed() argument
567 if (XGMAC_IOREAD_BITS(pdata, MAC_TCR, SS) == 0x2) in xgbe_set_gmii_2500_speed()
570 XGMAC_IOWRITE_BITS(pdata, MAC_TCR, SS, 0x2); in xgbe_set_gmii_2500_speed()
575 static int xgbe_set_xgmii_speed(struct xgbe_prv_data *pdata) in xgbe_set_xgmii_speed() argument
577 if (XGMAC_IOREAD_BITS(pdata, MAC_TCR, SS) == 0) in xgbe_set_xgmii_speed()
580 XGMAC_IOWRITE_BITS(pdata, MAC_TCR, SS, 0); in xgbe_set_xgmii_speed()
585 static int xgbe_enable_rx_vlan_stripping(struct xgbe_prv_data *pdata) in xgbe_enable_rx_vlan_stripping() argument
588 XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, EVLRXS, 1); in xgbe_enable_rx_vlan_stripping()
591 XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, DOVLTC, 1); in xgbe_enable_rx_vlan_stripping()
594 XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, ERSVLM, 0); in xgbe_enable_rx_vlan_stripping()
597 XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, ESVL, 0); in xgbe_enable_rx_vlan_stripping()
600 XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, EVLS, 0x3); in xgbe_enable_rx_vlan_stripping()
605 static int xgbe_disable_rx_vlan_stripping(struct xgbe_prv_data *pdata) in xgbe_disable_rx_vlan_stripping() argument
607 XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, EVLS, 0); in xgbe_disable_rx_vlan_stripping()
612 static int xgbe_enable_rx_vlan_filtering(struct xgbe_prv_data *pdata) in xgbe_enable_rx_vlan_filtering() argument
615 XGMAC_IOWRITE_BITS(pdata, MAC_PFR, VTFE, 1); in xgbe_enable_rx_vlan_filtering()
618 XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, VTHM, 1); in xgbe_enable_rx_vlan_filtering()
621 XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, VTIM, 0); in xgbe_enable_rx_vlan_filtering()
624 XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, ETV, 1); in xgbe_enable_rx_vlan_filtering()
632 XGMAC_IOWRITE_BITS(pdata, MAC_VLANTR, VL, 1); in xgbe_enable_rx_vlan_filtering()
637 static int xgbe_disable_rx_vlan_filtering(struct xgbe_prv_data *pdata) in xgbe_disable_rx_vlan_filtering() argument
640 XGMAC_IOWRITE_BITS(pdata, MAC_PFR, VTFE, 0); in xgbe_disable_rx_vlan_filtering()
645 static int xgbe_update_vlan_hash_table(struct xgbe_prv_data *pdata) in xgbe_update_vlan_hash_table() argument
650 XGMAC_IOWRITE_BITS(pdata, MAC_VLANHTR, VLHT, vlan_hash_table); in xgbe_update_vlan_hash_table()
655 static int xgbe_set_promiscuous_mode(struct xgbe_prv_data *pdata, in xgbe_set_promiscuous_mode() argument
660 if (XGMAC_IOREAD_BITS(pdata, MAC_PFR, PR) == val) in xgbe_set_promiscuous_mode()
663 XGMAC_IOWRITE_BITS(pdata, MAC_PFR, PR, val); in xgbe_set_promiscuous_mode()
666 xgbe_disable_rx_vlan_filtering(pdata); in xgbe_set_promiscuous_mode()
671 static int xgbe_set_all_multicast_mode(struct xgbe_prv_data *pdata, in xgbe_set_all_multicast_mode() argument
676 if (XGMAC_IOREAD_BITS(pdata, MAC_PFR, PM) == val) in xgbe_set_all_multicast_mode()
679 XGMAC_IOWRITE_BITS(pdata, MAC_PFR, PM, val); in xgbe_set_all_multicast_mode()
684 static void xgbe_set_mac_reg(struct xgbe_prv_data *pdata, in xgbe_set_mac_reg() argument
706 XGMAC_IOWRITE(pdata, *mac_reg, mac_addr_hi); in xgbe_set_mac_reg()
708 XGMAC_IOWRITE(pdata, *mac_reg, mac_addr_lo); in xgbe_set_mac_reg()
712 static void xgbe_set_mac_addn_addrs(struct xgbe_prv_data *pdata) in xgbe_set_mac_addn_addrs() argument
718 addn_macs = pdata->hw_feat.addn_mac; in xgbe_set_mac_addn_addrs()
720 xgbe_set_mac_reg(pdata, pdata->mac_addr, &mac_reg); in xgbe_set_mac_addn_addrs()
725 xgbe_set_mac_reg(pdata, NULL, &mac_reg); in xgbe_set_mac_addn_addrs()
728 static int xgbe_add_mac_addresses(struct xgbe_prv_data *pdata) in xgbe_add_mac_addresses() argument
730 xgbe_set_mac_addn_addrs(pdata); in xgbe_add_mac_addresses()
735 static int xgbe_set_mac_address(struct xgbe_prv_data *pdata, u8 *addr) in xgbe_set_mac_address() argument
743 XGMAC_IOWRITE(pdata, MAC_MACA0HR, mac_addr_hi); in xgbe_set_mac_address()
744 XGMAC_IOWRITE(pdata, MAC_MACA0LR, mac_addr_lo); in xgbe_set_mac_address()
749 static int xgbe_config_rx_mode(struct xgbe_prv_data *pdata) in xgbe_config_rx_mode() argument
757 xgbe_set_promiscuous_mode(pdata, pr_mode); in xgbe_config_rx_mode()
758 xgbe_set_all_multicast_mode(pdata, am_mode); in xgbe_config_rx_mode()
760 xgbe_add_mac_addresses(pdata); in xgbe_config_rx_mode()
765 static int xgbe_read_mmd_regs(struct xgbe_prv_data *pdata, int prtad, in xgbe_read_mmd_regs() argument
775 mmd_address = (pdata->mdio_mmd << 16) | (mmd_reg & 0xffff); in xgbe_read_mmd_regs()
786 spin_lock_irqsave(&pdata->xpcs_lock, flags); in xgbe_read_mmd_regs()
787 XPCS_IOWRITE(pdata, PCS_MMD_SELECT << 2, mmd_address >> 8); in xgbe_read_mmd_regs()
788 mmd_data = XPCS_IOREAD(pdata, (mmd_address & 0xff) << 2); in xgbe_read_mmd_regs()
789 spin_unlock_irqrestore(&pdata->xpcs_lock, flags); in xgbe_read_mmd_regs()
794 static void xgbe_write_mmd_regs(struct xgbe_prv_data *pdata, int prtad, in xgbe_write_mmd_regs() argument
803 mmd_address = (pdata->mdio_mmd << 16) | (mmd_reg & 0xffff); in xgbe_write_mmd_regs()
814 spin_lock_irqsave(&pdata->xpcs_lock, flags); in xgbe_write_mmd_regs()
815 XPCS_IOWRITE(pdata, PCS_MMD_SELECT << 2, mmd_address >> 8); in xgbe_write_mmd_regs()
816 XPCS_IOWRITE(pdata, (mmd_address & 0xff) << 2, mmd_data); in xgbe_write_mmd_regs()
817 spin_unlock_irqrestore(&pdata->xpcs_lock, flags); in xgbe_write_mmd_regs()
825 static int xgbe_disable_rx_csum(struct xgbe_prv_data *pdata) in xgbe_disable_rx_csum() argument
827 XGMAC_IOWRITE_BITS(pdata, MAC_RCR, IPC, 0); in xgbe_disable_rx_csum()
832 static int xgbe_enable_rx_csum(struct xgbe_prv_data *pdata) in xgbe_enable_rx_csum() argument
834 XGMAC_IOWRITE_BITS(pdata, MAC_RCR, IPC, 1); in xgbe_enable_rx_csum()
887 static void xgbe_rx_desc_reset(struct xgbe_prv_data *pdata, in xgbe_rx_desc_reset() argument
918 struct xgbe_prv_data *pdata = channel->pdata; in xgbe_rx_desc_init() local
931 xgbe_rx_desc_reset(pdata, rdata, i); in xgbe_rx_desc_init()
971 struct xgbe_prv_data *pdata = channel->pdata; in xgbe_dev_xmit() local
994 if (!pdata->tx_frames) in xgbe_dev_xmit()
996 else if (packet->tx_packets > pdata->tx_frames) in xgbe_dev_xmit()
998 else if ((ring->coalesce_count % pdata->tx_frames) < in xgbe_dev_xmit()
1275 static int xgbe_exit(struct xgbe_prv_data *pdata) in xgbe_exit() argument
1282 XGMAC_IOWRITE_BITS(pdata, DMA_MR, SWR, 1); in xgbe_exit()
1286 while (--count && XGMAC_IOREAD_BITS(pdata, DMA_MR, SWR)) in xgbe_exit()
1297 static int xgbe_flush_tx_queues(struct xgbe_prv_data *pdata) in xgbe_flush_tx_queues() argument
1301 if (XGMAC_GET_BITS(pdata->hw_feat.version, MAC_VR, SNPSVER) < 0x21) in xgbe_flush_tx_queues()
1304 for (i = 0; i < pdata->tx_q_count; i++) in xgbe_flush_tx_queues()
1305 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, FTQ, 1); in xgbe_flush_tx_queues()
1308 for (i = 0; i < pdata->tx_q_count; i++) { in xgbe_flush_tx_queues()
1310 while (--count && XGMAC_MTL_IOREAD_BITS(pdata, i, in xgbe_flush_tx_queues()
1321 static void xgbe_config_dma_bus(struct xgbe_prv_data *pdata) in xgbe_config_dma_bus() argument
1324 XGMAC_IOWRITE_BITS(pdata, DMA_SBMR, EAME, 1); in xgbe_config_dma_bus()
1327 XGMAC_IOWRITE_BITS(pdata, DMA_SBMR, UNDEF, 1); in xgbe_config_dma_bus()
1328 XGMAC_IOWRITE_BITS(pdata, DMA_SBMR, BLEN_256, 1); in xgbe_config_dma_bus()
1331 static void xgbe_config_dma_cache(struct xgbe_prv_data *pdata) in xgbe_config_dma_cache() argument
1336 XGMAC_SET_BITS(arcache, DMA_AXIARCR, DRC, pdata->arcache); in xgbe_config_dma_cache()
1337 XGMAC_SET_BITS(arcache, DMA_AXIARCR, DRD, pdata->axdomain); in xgbe_config_dma_cache()
1338 XGMAC_SET_BITS(arcache, DMA_AXIARCR, TEC, pdata->arcache); in xgbe_config_dma_cache()
1339 XGMAC_SET_BITS(arcache, DMA_AXIARCR, TED, pdata->axdomain); in xgbe_config_dma_cache()
1340 XGMAC_SET_BITS(arcache, DMA_AXIARCR, THC, pdata->arcache); in xgbe_config_dma_cache()
1341 XGMAC_SET_BITS(arcache, DMA_AXIARCR, THD, pdata->axdomain); in xgbe_config_dma_cache()
1342 XGMAC_IOWRITE(pdata, DMA_AXIARCR, arcache); in xgbe_config_dma_cache()
1345 XGMAC_SET_BITS(awcache, DMA_AXIAWCR, DWC, pdata->awcache); in xgbe_config_dma_cache()
1346 XGMAC_SET_BITS(awcache, DMA_AXIAWCR, DWD, pdata->axdomain); in xgbe_config_dma_cache()
1347 XGMAC_SET_BITS(awcache, DMA_AXIAWCR, RPC, pdata->awcache); in xgbe_config_dma_cache()
1348 XGMAC_SET_BITS(awcache, DMA_AXIAWCR, RPD, pdata->axdomain); in xgbe_config_dma_cache()
1349 XGMAC_SET_BITS(awcache, DMA_AXIAWCR, RHC, pdata->awcache); in xgbe_config_dma_cache()
1350 XGMAC_SET_BITS(awcache, DMA_AXIAWCR, RHD, pdata->axdomain); in xgbe_config_dma_cache()
1351 XGMAC_SET_BITS(awcache, DMA_AXIAWCR, TDC, pdata->awcache); in xgbe_config_dma_cache()
1352 XGMAC_SET_BITS(awcache, DMA_AXIAWCR, TDD, pdata->axdomain); in xgbe_config_dma_cache()
1353 XGMAC_IOWRITE(pdata, DMA_AXIAWCR, awcache); in xgbe_config_dma_cache()
1356 static void xgbe_config_mtl_mode(struct xgbe_prv_data *pdata) in xgbe_config_mtl_mode() argument
1361 XGMAC_IOWRITE_BITS(pdata, MTL_OMR, ETSALG, MTL_ETSALG_WRR); in xgbe_config_mtl_mode()
1364 for (i = 0; i < pdata->hw_feat.tc_cnt; i++) { in xgbe_config_mtl_mode()
1365 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_TC_ETSCR, TSA, in xgbe_config_mtl_mode()
1367 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_TC_QWR, QW, 1); in xgbe_config_mtl_mode()
1371 XGMAC_IOWRITE_BITS(pdata, MTL_OMR, RAA, MTL_RAA_SP); in xgbe_config_mtl_mode()
1399 static void xgbe_config_tx_fifo_size(struct xgbe_prv_data *pdata) in xgbe_config_tx_fifo_size() argument
1404 fifo_size = xgbe_calculate_per_queue_fifo(pdata->hw_feat.tx_fifo_size, in xgbe_config_tx_fifo_size()
1405 pdata->tx_q_count); in xgbe_config_tx_fifo_size()
1407 for (i = 0; i < pdata->tx_q_count; i++) in xgbe_config_tx_fifo_size()
1408 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TQS, fifo_size); in xgbe_config_tx_fifo_size()
1411 static void xgbe_config_rx_fifo_size(struct xgbe_prv_data *pdata) in xgbe_config_rx_fifo_size() argument
1416 fifo_size = xgbe_calculate_per_queue_fifo(pdata->hw_feat.rx_fifo_size, in xgbe_config_rx_fifo_size()
1417 pdata->rx_q_count); in xgbe_config_rx_fifo_size()
1419 for (i = 0; i < pdata->rx_q_count; i++) in xgbe_config_rx_fifo_size()
1420 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, RQS, fifo_size); in xgbe_config_rx_fifo_size()
1423 static void xgbe_config_queue_mapping(struct xgbe_prv_data *pdata) in xgbe_config_queue_mapping() argument
1434 qptc = pdata->tx_q_count / pdata->hw_feat.tc_cnt; in xgbe_config_queue_mapping()
1435 qptc_extra = pdata->tx_q_count % pdata->hw_feat.tc_cnt; in xgbe_config_queue_mapping()
1437 for (i = 0, queue = 0; i < pdata->hw_feat.tc_cnt; i++) { in xgbe_config_queue_mapping()
1439 XGMAC_MTL_IOWRITE_BITS(pdata, queue, MTL_Q_TQOMR, in xgbe_config_queue_mapping()
1441 pdata->q2tc_map[queue++] = i; in xgbe_config_queue_mapping()
1445 XGMAC_MTL_IOWRITE_BITS(pdata, queue, MTL_Q_TQOMR, in xgbe_config_queue_mapping()
1447 pdata->q2tc_map[queue++] = i; in xgbe_config_queue_mapping()
1453 pdata->rx_q_count); in xgbe_config_queue_mapping()
1463 pdata->prio2q_map[prio++] = i; in xgbe_config_queue_mapping()
1468 pdata->prio2q_map[prio++] = i; in xgbe_config_queue_mapping()
1476 XGMAC_IOWRITE(pdata, reg, reg_val); in xgbe_config_queue_mapping()
1484 for (i = 0; i < pdata->rx_q_count;) { in xgbe_config_queue_mapping()
1487 if ((i % MTL_RQDCM_Q_PER_REG) && (i != pdata->rx_q_count)) in xgbe_config_queue_mapping()
1490 XGMAC_IOWRITE(pdata, reg, reg_val); in xgbe_config_queue_mapping()
1497 static void xgbe_config_flow_control_threshold(struct xgbe_prv_data *pdata) in xgbe_config_flow_control_threshold() argument
1501 for (i = 0; i < pdata->rx_q_count; i++) { in xgbe_config_flow_control_threshold()
1503 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQFCR, RFA, 2); in xgbe_config_flow_control_threshold()
1506 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQFCR, RFD, 4); in xgbe_config_flow_control_threshold()
1510 static void xgbe_config_mac_address(struct xgbe_prv_data *pdata) in xgbe_config_mac_address() argument
1513 xgbe_set_mac_address(pdata, IF_LLADDR(pdata->netdev)); in xgbe_config_mac_address()
1516 static void xgbe_config_jumbo_enable(struct xgbe_prv_data *pdata) in xgbe_config_jumbo_enable() argument
1520 val = (if_getmtu(pdata->netdev) > XGMAC_STD_PACKET_MTU) ? 1 : 0; in xgbe_config_jumbo_enable()
1522 XGMAC_IOWRITE_BITS(pdata, MAC_RCR, JE, val); in xgbe_config_jumbo_enable()
1525 static void xgbe_config_mac_speed(struct xgbe_prv_data *pdata) in xgbe_config_mac_speed() argument
1527 switch (pdata->phy_speed) { in xgbe_config_mac_speed()
1529 xgbe_set_xgmii_speed(pdata); in xgbe_config_mac_speed()
1533 xgbe_set_gmii_2500_speed(pdata); in xgbe_config_mac_speed()
1537 xgbe_set_gmii_speed(pdata); in xgbe_config_mac_speed()
1546 static void xgbe_config_checksum_offload(struct xgbe_prv_data *pdata) in xgbe_config_checksum_offload() argument
1548 if ((if_getcapenable(pdata->netdev) & IFCAP_RXCSUM) != 0) in xgbe_config_checksum_offload()
1549 xgbe_enable_rx_csum(pdata); in xgbe_config_checksum_offload()
1551 xgbe_disable_rx_csum(pdata); in xgbe_config_checksum_offload()
1554 static void xgbe_config_vlan_support(struct xgbe_prv_data *pdata) in xgbe_config_vlan_support() argument
1557 XGMAC_IOWRITE_BITS(pdata, MAC_VLANIR, CSVL, 0); in xgbe_config_vlan_support()
1558 XGMAC_IOWRITE_BITS(pdata, MAC_VLANIR, VLTI, 1); in xgbe_config_vlan_support()
1561 xgbe_update_vlan_hash_table(pdata); in xgbe_config_vlan_support()
1563 xgbe_disable_rx_vlan_filtering(pdata); in xgbe_config_vlan_support()
1564 xgbe_disable_rx_vlan_stripping(pdata); in xgbe_config_vlan_support()
1567 static u64 xgbe_mmc_read(struct xgbe_prv_data *pdata, unsigned int reg_lo) in xgbe_mmc_read() argument
1585 val = XGMAC_IOREAD(pdata, reg_lo); in xgbe_mmc_read()
1588 val |= ((u64)XGMAC_IOREAD(pdata, reg_lo + 4) << 32); in xgbe_mmc_read()
1593 static void xgbe_tx_mmc_int(struct xgbe_prv_data *pdata) in xgbe_tx_mmc_int() argument
1595 struct xgbe_mmc_stats *stats = &pdata->mmc_stats; in xgbe_tx_mmc_int()
1596 unsigned int mmc_isr = XGMAC_IOREAD(pdata, MMC_TISR); in xgbe_tx_mmc_int()
1600 xgbe_mmc_read(pdata, MMC_TXOCTETCOUNT_GB_LO); in xgbe_tx_mmc_int()
1604 xgbe_mmc_read(pdata, MMC_TXFRAMECOUNT_GB_LO); in xgbe_tx_mmc_int()
1608 xgbe_mmc_read(pdata, MMC_TXBROADCASTFRAMES_G_LO); in xgbe_tx_mmc_int()
1612 xgbe_mmc_read(pdata, MMC_TXMULTICASTFRAMES_G_LO); in xgbe_tx_mmc_int()
1616 xgbe_mmc_read(pdata, MMC_TX64OCTETS_GB_LO); in xgbe_tx_mmc_int()
1620 xgbe_mmc_read(pdata, MMC_TX65TO127OCTETS_GB_LO); in xgbe_tx_mmc_int()
1624 xgbe_mmc_read(pdata, MMC_TX128TO255OCTETS_GB_LO); in xgbe_tx_mmc_int()
1628 xgbe_mmc_read(pdata, MMC_TX256TO511OCTETS_GB_LO); in xgbe_tx_mmc_int()
1632 xgbe_mmc_read(pdata, MMC_TX512TO1023OCTETS_GB_LO); in xgbe_tx_mmc_int()
1636 xgbe_mmc_read(pdata, MMC_TX1024TOMAXOCTETS_GB_LO); in xgbe_tx_mmc_int()
1640 xgbe_mmc_read(pdata, MMC_TXUNICASTFRAMES_GB_LO); in xgbe_tx_mmc_int()
1644 xgbe_mmc_read(pdata, MMC_TXMULTICASTFRAMES_GB_LO); in xgbe_tx_mmc_int()
1648 xgbe_mmc_read(pdata, MMC_TXBROADCASTFRAMES_GB_LO); in xgbe_tx_mmc_int()
1652 xgbe_mmc_read(pdata, MMC_TXUNDERFLOWERROR_LO); in xgbe_tx_mmc_int()
1656 xgbe_mmc_read(pdata, MMC_TXOCTETCOUNT_G_LO); in xgbe_tx_mmc_int()
1660 xgbe_mmc_read(pdata, MMC_TXFRAMECOUNT_G_LO); in xgbe_tx_mmc_int()
1664 xgbe_mmc_read(pdata, MMC_TXPAUSEFRAMES_LO); in xgbe_tx_mmc_int()
1668 xgbe_mmc_read(pdata, MMC_TXVLANFRAMES_G_LO); in xgbe_tx_mmc_int()
1671 static void xgbe_rx_mmc_int(struct xgbe_prv_data *pdata) in xgbe_rx_mmc_int() argument
1673 struct xgbe_mmc_stats *stats = &pdata->mmc_stats; in xgbe_rx_mmc_int()
1674 unsigned int mmc_isr = XGMAC_IOREAD(pdata, MMC_RISR); in xgbe_rx_mmc_int()
1678 xgbe_mmc_read(pdata, MMC_RXFRAMECOUNT_GB_LO); in xgbe_rx_mmc_int()
1682 xgbe_mmc_read(pdata, MMC_RXOCTETCOUNT_GB_LO); in xgbe_rx_mmc_int()
1686 xgbe_mmc_read(pdata, MMC_RXOCTETCOUNT_G_LO); in xgbe_rx_mmc_int()
1690 xgbe_mmc_read(pdata, MMC_RXBROADCASTFRAMES_G_LO); in xgbe_rx_mmc_int()
1694 xgbe_mmc_read(pdata, MMC_RXMULTICASTFRAMES_G_LO); in xgbe_rx_mmc_int()
1698 xgbe_mmc_read(pdata, MMC_RXCRCERROR_LO); in xgbe_rx_mmc_int()
1702 xgbe_mmc_read(pdata, MMC_RXRUNTERROR); in xgbe_rx_mmc_int()
1706 xgbe_mmc_read(pdata, MMC_RXJABBERERROR); in xgbe_rx_mmc_int()
1710 xgbe_mmc_read(pdata, MMC_RXUNDERSIZE_G); in xgbe_rx_mmc_int()
1714 xgbe_mmc_read(pdata, MMC_RXOVERSIZE_G); in xgbe_rx_mmc_int()
1718 xgbe_mmc_read(pdata, MMC_RX64OCTETS_GB_LO); in xgbe_rx_mmc_int()
1722 xgbe_mmc_read(pdata, MMC_RX65TO127OCTETS_GB_LO); in xgbe_rx_mmc_int()
1726 xgbe_mmc_read(pdata, MMC_RX128TO255OCTETS_GB_LO); in xgbe_rx_mmc_int()
1730 xgbe_mmc_read(pdata, MMC_RX256TO511OCTETS_GB_LO); in xgbe_rx_mmc_int()
1734 xgbe_mmc_read(pdata, MMC_RX512TO1023OCTETS_GB_LO); in xgbe_rx_mmc_int()
1738 xgbe_mmc_read(pdata, MMC_RX1024TOMAXOCTETS_GB_LO); in xgbe_rx_mmc_int()
1742 xgbe_mmc_read(pdata, MMC_RXUNICASTFRAMES_G_LO); in xgbe_rx_mmc_int()
1746 xgbe_mmc_read(pdata, MMC_RXLENGTHERROR_LO); in xgbe_rx_mmc_int()
1750 xgbe_mmc_read(pdata, MMC_RXOUTOFRANGETYPE_LO); in xgbe_rx_mmc_int()
1754 xgbe_mmc_read(pdata, MMC_RXPAUSEFRAMES_LO); in xgbe_rx_mmc_int()
1758 xgbe_mmc_read(pdata, MMC_RXFIFOOVERFLOW_LO); in xgbe_rx_mmc_int()
1762 xgbe_mmc_read(pdata, MMC_RXVLANFRAMES_GB_LO); in xgbe_rx_mmc_int()
1766 xgbe_mmc_read(pdata, MMC_RXWATCHDOGERROR); in xgbe_rx_mmc_int()
1769 static void xgbe_read_mmc_stats(struct xgbe_prv_data *pdata) in xgbe_read_mmc_stats() argument
1771 struct xgbe_mmc_stats *stats = &pdata->mmc_stats; in xgbe_read_mmc_stats()
1774 XGMAC_IOWRITE_BITS(pdata, MMC_CR, MCF, 1); in xgbe_read_mmc_stats()
1777 xgbe_mmc_read(pdata, MMC_TXOCTETCOUNT_GB_LO); in xgbe_read_mmc_stats()
1780 xgbe_mmc_read(pdata, MMC_TXFRAMECOUNT_GB_LO); in xgbe_read_mmc_stats()
1783 xgbe_mmc_read(pdata, MMC_TXBROADCASTFRAMES_G_LO); in xgbe_read_mmc_stats()
1786 xgbe_mmc_read(pdata, MMC_TXMULTICASTFRAMES_G_LO); in xgbe_read_mmc_stats()
1789 xgbe_mmc_read(pdata, MMC_TX64OCTETS_GB_LO); in xgbe_read_mmc_stats()
1792 xgbe_mmc_read(pdata, MMC_TX65TO127OCTETS_GB_LO); in xgbe_read_mmc_stats()
1795 xgbe_mmc_read(pdata, MMC_TX128TO255OCTETS_GB_LO); in xgbe_read_mmc_stats()
1798 xgbe_mmc_read(pdata, MMC_TX256TO511OCTETS_GB_LO); in xgbe_read_mmc_stats()
1801 xgbe_mmc_read(pdata, MMC_TX512TO1023OCTETS_GB_LO); in xgbe_read_mmc_stats()
1804 xgbe_mmc_read(pdata, MMC_TX1024TOMAXOCTETS_GB_LO); in xgbe_read_mmc_stats()
1807 xgbe_mmc_read(pdata, MMC_TXUNICASTFRAMES_GB_LO); in xgbe_read_mmc_stats()
1810 xgbe_mmc_read(pdata, MMC_TXMULTICASTFRAMES_GB_LO); in xgbe_read_mmc_stats()
1813 xgbe_mmc_read(pdata, MMC_TXBROADCASTFRAMES_GB_LO); in xgbe_read_mmc_stats()
1816 xgbe_mmc_read(pdata, MMC_TXUNDERFLOWERROR_LO); in xgbe_read_mmc_stats()
1819 xgbe_mmc_read(pdata, MMC_TXOCTETCOUNT_G_LO); in xgbe_read_mmc_stats()
1822 xgbe_mmc_read(pdata, MMC_TXFRAMECOUNT_G_LO); in xgbe_read_mmc_stats()
1825 xgbe_mmc_read(pdata, MMC_TXPAUSEFRAMES_LO); in xgbe_read_mmc_stats()
1828 xgbe_mmc_read(pdata, MMC_TXVLANFRAMES_G_LO); in xgbe_read_mmc_stats()
1831 xgbe_mmc_read(pdata, MMC_RXFRAMECOUNT_GB_LO); in xgbe_read_mmc_stats()
1834 xgbe_mmc_read(pdata, MMC_RXOCTETCOUNT_GB_LO); in xgbe_read_mmc_stats()
1837 xgbe_mmc_read(pdata, MMC_RXOCTETCOUNT_G_LO); in xgbe_read_mmc_stats()
1840 xgbe_mmc_read(pdata, MMC_RXBROADCASTFRAMES_G_LO); in xgbe_read_mmc_stats()
1843 xgbe_mmc_read(pdata, MMC_RXMULTICASTFRAMES_G_LO); in xgbe_read_mmc_stats()
1846 xgbe_mmc_read(pdata, MMC_RXCRCERROR_LO); in xgbe_read_mmc_stats()
1849 xgbe_mmc_read(pdata, MMC_RXRUNTERROR); in xgbe_read_mmc_stats()
1852 xgbe_mmc_read(pdata, MMC_RXJABBERERROR); in xgbe_read_mmc_stats()
1855 xgbe_mmc_read(pdata, MMC_RXUNDERSIZE_G); in xgbe_read_mmc_stats()
1858 xgbe_mmc_read(pdata, MMC_RXOVERSIZE_G); in xgbe_read_mmc_stats()
1861 xgbe_mmc_read(pdata, MMC_RX64OCTETS_GB_LO); in xgbe_read_mmc_stats()
1864 xgbe_mmc_read(pdata, MMC_RX65TO127OCTETS_GB_LO); in xgbe_read_mmc_stats()
1867 xgbe_mmc_read(pdata, MMC_RX128TO255OCTETS_GB_LO); in xgbe_read_mmc_stats()
1870 xgbe_mmc_read(pdata, MMC_RX256TO511OCTETS_GB_LO); in xgbe_read_mmc_stats()
1873 xgbe_mmc_read(pdata, MMC_RX512TO1023OCTETS_GB_LO); in xgbe_read_mmc_stats()
1876 xgbe_mmc_read(pdata, MMC_RX1024TOMAXOCTETS_GB_LO); in xgbe_read_mmc_stats()
1879 xgbe_mmc_read(pdata, MMC_RXUNICASTFRAMES_G_LO); in xgbe_read_mmc_stats()
1882 xgbe_mmc_read(pdata, MMC_RXLENGTHERROR_LO); in xgbe_read_mmc_stats()
1885 xgbe_mmc_read(pdata, MMC_RXOUTOFRANGETYPE_LO); in xgbe_read_mmc_stats()
1888 xgbe_mmc_read(pdata, MMC_RXPAUSEFRAMES_LO); in xgbe_read_mmc_stats()
1891 xgbe_mmc_read(pdata, MMC_RXFIFOOVERFLOW_LO); in xgbe_read_mmc_stats()
1894 xgbe_mmc_read(pdata, MMC_RXVLANFRAMES_GB_LO); in xgbe_read_mmc_stats()
1897 xgbe_mmc_read(pdata, MMC_RXWATCHDOGERROR); in xgbe_read_mmc_stats()
1900 XGMAC_IOWRITE_BITS(pdata, MMC_CR, MCF, 0); in xgbe_read_mmc_stats()
1903 static void xgbe_config_mmc(struct xgbe_prv_data *pdata) in xgbe_config_mmc() argument
1906 XGMAC_IOWRITE_BITS(pdata, MMC_CR, ROR, 1); in xgbe_config_mmc()
1909 XGMAC_IOWRITE_BITS(pdata, MMC_CR, CR, 1); in xgbe_config_mmc()
1912 static void xgbe_prepare_tx_stop(struct xgbe_prv_data *pdata, in xgbe_prepare_tx_stop() argument
1938 tx_status = XGMAC_IOREAD(pdata, tx_dsr); in xgbe_prepare_tx_stop()
1948 static void xgbe_enable_tx(struct xgbe_prv_data *pdata) in xgbe_enable_tx() argument
1954 channel = pdata->channel; in xgbe_enable_tx()
1955 for (i = 0; i < pdata->channel_count; i++, channel++) { in xgbe_enable_tx()
1963 for (i = 0; i < pdata->tx_q_count; i++) in xgbe_enable_tx()
1964 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TXQEN, in xgbe_enable_tx()
1968 XGMAC_IOWRITE_BITS(pdata, MAC_TCR, TE, 1); in xgbe_enable_tx()
1971 static void xgbe_disable_tx(struct xgbe_prv_data *pdata) in xgbe_disable_tx() argument
1977 channel = pdata->channel; in xgbe_disable_tx()
1978 for (i = 0; i < pdata->channel_count; i++, channel++) { in xgbe_disable_tx()
1982 xgbe_prepare_tx_stop(pdata, channel); in xgbe_disable_tx()
1986 XGMAC_IOWRITE_BITS(pdata, MAC_TCR, TE, 0); in xgbe_disable_tx()
1989 for (i = 0; i < pdata->tx_q_count; i++) in xgbe_disable_tx()
1990 XGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TXQEN, 0); in xgbe_disable_tx()
1993 channel = pdata->channel; in xgbe_disable_tx()
1994 for (i = 0; i < pdata->channel_count; i++, channel++) { in xgbe_disable_tx()
2002 static void xgbe_prepare_rx_stop(struct xgbe_prv_data *pdata, in xgbe_prepare_rx_stop() argument
2014 rx_status = XGMAC_MTL_IOREAD(pdata, queue, MTL_Q_RQDR); in xgbe_prepare_rx_stop()
2023 static void xgbe_enable_rx(struct xgbe_prv_data *pdata) in xgbe_enable_rx() argument
2029 channel = pdata->channel; in xgbe_enable_rx()
2030 for (i = 0; i < pdata->channel_count; i++, channel++) { in xgbe_enable_rx()
2039 for (i = 0; i < pdata->rx_q_count; i++) in xgbe_enable_rx()
2041 XGMAC_IOWRITE(pdata, MAC_RQC0R, reg_val); in xgbe_enable_rx()
2044 XGMAC_IOWRITE_BITS(pdata, MAC_RCR, DCRCC, 1); in xgbe_enable_rx()
2045 XGMAC_IOWRITE_BITS(pdata, MAC_RCR, CST, 1); in xgbe_enable_rx()
2046 XGMAC_IOWRITE_BITS(pdata, MAC_RCR, ACS, 1); in xgbe_enable_rx()
2047 XGMAC_IOWRITE_BITS(pdata, MAC_RCR, RE, 1); in xgbe_enable_rx()
2050 static void xgbe_disable_rx(struct xgbe_prv_data *pdata) in xgbe_disable_rx() argument
2056 XGMAC_IOWRITE_BITS(pdata, MAC_RCR, DCRCC, 0); in xgbe_disable_rx()
2057 XGMAC_IOWRITE_BITS(pdata, MAC_RCR, CST, 0); in xgbe_disable_rx()
2058 XGMAC_IOWRITE_BITS(pdata, MAC_RCR, ACS, 0); in xgbe_disable_rx()
2059 XGMAC_IOWRITE_BITS(pdata, MAC_RCR, RE, 0); in xgbe_disable_rx()
2062 for (i = 0; i < pdata->rx_q_count; i++) in xgbe_disable_rx()
2063 xgbe_prepare_rx_stop(pdata, i); in xgbe_disable_rx()
2066 XGMAC_IOWRITE(pdata, MAC_RQC0R, 0); in xgbe_disable_rx()
2069 channel = pdata->channel; in xgbe_disable_rx()
2070 for (i = 0; i < pdata->channel_count; i++, channel++) { in xgbe_disable_rx()
2078 static void xgbe_powerup_tx(struct xgbe_prv_data *pdata) in xgbe_powerup_tx() argument
2084 channel = pdata->channel; in xgbe_powerup_tx()
2085 for (i = 0; i < pdata->channel_count; i++, channel++) { in xgbe_powerup_tx()
2093 XGMAC_IOWRITE_BITS(pdata, MAC_TCR, TE, 1); in xgbe_powerup_tx()
2096 static void xgbe_powerdown_tx(struct xgbe_prv_data *pdata) in xgbe_powerdown_tx() argument
2102 channel = pdata->channel; in xgbe_powerdown_tx()
2103 for (i = 0; i < pdata->channel_count; i++, channel++) { in xgbe_powerdown_tx()
2107 xgbe_prepare_tx_stop(pdata, channel); in xgbe_powerdown_tx()
2111 XGMAC_IOWRITE_BITS(pdata, MAC_TCR, TE, 0); in xgbe_powerdown_tx()
2114 channel = pdata->channel; in xgbe_powerdown_tx()
2115 for (i = 0; i < pdata->channel_count; i++, channel++) { in xgbe_powerdown_tx()
2123 static void xgbe_powerup_rx(struct xgbe_prv_data *pdata) in xgbe_powerup_rx() argument
2129 channel = pdata->channel; in xgbe_powerup_rx()
2130 for (i = 0; i < pdata->channel_count; i++, channel++) { in xgbe_powerup_rx()
2138 static void xgbe_powerdown_rx(struct xgbe_prv_data *pdata) in xgbe_powerdown_rx() argument
2144 channel = pdata->channel; in xgbe_powerdown_rx()
2145 for (i = 0; i < pdata->channel_count; i++, channel++) { in xgbe_powerdown_rx()
2153 static int xgbe_init(struct xgbe_prv_data *pdata) in xgbe_init() argument
2155 struct xgbe_desc_if *desc_if = &pdata->desc_if; in xgbe_init()
2161 ret = xgbe_flush_tx_queues(pdata); in xgbe_init()
2168 xgbe_config_dma_bus(pdata); in xgbe_init()
2169 xgbe_config_dma_cache(pdata); in xgbe_init()
2170 xgbe_config_osp_mode(pdata); in xgbe_init()
2171 xgbe_config_pblx8(pdata); in xgbe_init()
2172 xgbe_config_tx_pbl_val(pdata); in xgbe_init()
2173 xgbe_config_rx_pbl_val(pdata); in xgbe_init()
2174 xgbe_config_rx_coalesce(pdata); in xgbe_init()
2175 xgbe_config_tx_coalesce(pdata); in xgbe_init()
2176 xgbe_config_rx_buffer_size(pdata); in xgbe_init()
2177 xgbe_config_tso_mode(pdata); in xgbe_init()
2178 xgbe_config_sph_mode(pdata); in xgbe_init()
2179 xgbe_config_rss(pdata); in xgbe_init()
2180 desc_if->wrapper_tx_desc_init(pdata); in xgbe_init()
2181 desc_if->wrapper_rx_desc_init(pdata); in xgbe_init()
2182 xgbe_enable_dma_interrupts(pdata); in xgbe_init()
2187 xgbe_config_mtl_mode(pdata); in xgbe_init()
2188 xgbe_config_queue_mapping(pdata); in xgbe_init()
2189 xgbe_config_tsf_mode(pdata, pdata->tx_sf_mode); in xgbe_init()
2190 xgbe_config_rsf_mode(pdata, pdata->rx_sf_mode); in xgbe_init()
2191 xgbe_config_tx_threshold(pdata, pdata->tx_threshold); in xgbe_init()
2192 xgbe_config_rx_threshold(pdata, pdata->rx_threshold); in xgbe_init()
2193 xgbe_config_tx_fifo_size(pdata); in xgbe_init()
2194 xgbe_config_rx_fifo_size(pdata); in xgbe_init()
2195 xgbe_config_flow_control_threshold(pdata); in xgbe_init()
2199 xgbe_enable_mtl_interrupts(pdata); in xgbe_init()
2204 xgbe_config_mac_address(pdata); in xgbe_init()
2205 xgbe_config_rx_mode(pdata); in xgbe_init()
2206 xgbe_config_jumbo_enable(pdata); in xgbe_init()
2207 xgbe_config_flow_control(pdata); in xgbe_init()
2208 xgbe_config_mac_speed(pdata); in xgbe_init()
2209 xgbe_config_checksum_offload(pdata); in xgbe_init()
2210 xgbe_config_vlan_support(pdata); in xgbe_init()
2211 xgbe_config_mmc(pdata); in xgbe_init()
2212 xgbe_enable_mac_interrupts(pdata); in xgbe_init()