Lines Matching refs:RecVec
110 void ExpandProcResources(RecVec &PRVec, std::vector<int64_t> &Cycles,
209 RecVec ImpliesList = Feature->getValueAsListOfDefs("Implies"); in FeatureKeyValues()
244 RecVec FeatureList = Processor->getValueAsListOfDefs("Features"); in CPUKeyValues()
276 RecVec StageList = ItinData->getValueAsListOfDefs("Stages"); in FormItineraryStageString()
289 RecVec UnitList = Stage->getValueAsListOfDefs("Units"); in FormItineraryStageString()
336 RecVec BypassList = ItinData->getValueAsListOfDefs("Bypasses"); in FormItineraryBypassString()
367 RecVec FUs = ProcModel.ItinsDef->getValueAsListOfDefs("FU"); in EmitStageAndOperandCycleData()
381 RecVec BPs = ProcModel.ItinsDef->getValueAsListOfDefs("BP"); in EmitStageAndOperandCycleData()
606 RecVec ResUnits = PRDef->getValueAsListOfDefs("Resources"); in EmitProcessorResourceSubUnits()
770 RecVec ResUnits = PRDef->getValueAsListOfDefs("Resources"); in EmitProcessorResources()
912 void SubtargetEmitter::ExpandProcResources(RecVec &PRVec, in ExpandProcResources()
918 RecVec SubResources; in ExpandProcResources()
942 RecVec SuperResources = PR->getValueAsListOfDefs("Resources"); in ExpandProcResources()
1026 RecVec Matched = I->getValueAsListOfDefs("MatchedItinClasses"); in GenSchedClassTables()
1080 RecVec PRVec = WriteRes->getValueAsListOfDefs("ProcResources"); in GenSchedClassTables()
1139 RecVec ValidWrites = ReadAdvance->getValueAsListOfDefs("ValidWrites"); in GenSchedClassTables()